Fabrication of micro-mixer on printed circuit board using electrochemical micromachining

2019 ◽  
Vol 2 (2) ◽  
pp. 85-94
Author(s):  
Jitendra Singh ◽  
Shantanu Bhattacharya

Electrochemical micromachining (ECMM) has been mostly carried out in situations demanding precision, complexity in the shapes of final components and in case the surface integrity and performance are independent of the machining process. In this work, the following have been demonstrated: The first part of the work demonstrates the experimental setup for ECMM that is used to fabricate a micro-mixer on a printed circuit board (PCB) substrate by using a single point electrochemical machining tool with a tip diameter—150 µm. The method is able to show a promising route of fabrication where the circuit lines on a PCB substrate can be printed with high yield and processing speeds. The second part of the article points out that machining can be carried out on PCB substrates through electrochemical processes using a single point tool and a minimum feature size of 243 µm can be machined with a fine tolerance of 0.025 µm and roughness = 3.0459 µm~7.2404 µm. The third part of the article reports the geometrical parameters of a relatively complex geometry of a micro-mixer which is arrived at through a COMSOL based simulation platform that is fabricated using the mentioned manufacturing process. The process is further validated through the design of experiments, and fluid flow and mixing behaviour on the fabricated structure is evaluated through an epifluorescence microscope. The advantages that this technique may offer is in terms of achieving an overall low feature size in comparison to micro-milling and avoiding the complexities of lithography-driven processes to produce a process which has a much lower equipment dependency, is environmentally benign in comparison to the lithography driven techniques and is overall low in cost.

2020 ◽  
Vol 10 (14) ◽  
pp. 5022
Author(s):  
Andrius Čeponis ◽  
Dalius Mažeika ◽  
Piotr Vasiljev

A numerical and experimental investigation of a flat, cross-shaped piezoelectric rotary motor is presented. The design and configuration of the motor allow it to be mounted directly to the printed circuit board or integrated into the other system where mounting space is limited. The design of the motor is based on the cross-shaped stator with 16 piezo ceramic plates, which are glued on it. The rotor is placed at the center of the stator and consists of two hemispheres, a shaft, and a preloading spring. Special clamping of the stator was developed as well. It consists of four V-shaped beam structures that allow it to rigidly clamp the stator with reduced damping effect to vibrations. The operation principle of the motor is based on the first in-plane bending mode of the cross-shaped stator. The motor excitation is performed through four harmonic signals, which have a phase difference of π/2. A numerical investigation of the motor was conducted to optimize the geometrical parameters of the stator and to analyze the displacement characteristics of the contacting point. The prototype of the motor was made, and the electrical, as well as rotation speed characteristics of the motor, were measured. The results of the experimental investigation showed that the motor is able to provide a maximum rotation speed of 972.62 RPM at 200 Vp-p when the preload force of 22.65 mN was applied.


2019 ◽  
Vol 2019 (NOR) ◽  
pp. 000017-000020
Author(s):  
Sarthak Acharya ◽  
Shailesh Singh Chouhan ◽  
Jerker Delsing

Abstract As per the latest roadmap of iNEMI, the global electronics market is emphasizing to identify disruptive technologies that can contribute towards denser, robust and tighter integration on the board level. Therefore, reduction in packaging factor of printed board can accommodate greater number of ICs to support miniaturization. This paper has shown an experimental method to pattern the metallic layer on a Printed circuit Board (PCB) to the smallest feature size. To investigate this, a commercially available FR-4 PCB with photosensitive material coat and a Copper (Cu) layer on it, is used. A reverse-mode Laser assisted writing is implemented to pattern the desired copper tracks. Soon after, a well-controlled development and chemical etching of the Laser-activated regions are done using Sodium Hydroxide solution followed by an aqueous solution of Sodium Persulfate. Current PCB interconnects used by the industries are of the order (~20 μm). Whereas the present work is a contribution towards achieving Copper interconnects with feature size 3.0μm. This miniaturization corresponds to 70% reduction in the feature size from 20 μm to 3 μm. The natural adhesion of the Cu layer has remained intact even after the etching, shows the efficiency of the method adopted. Also, variation in the parameters such as etching time, etchant solution concentrations, temaperature, gain and exposure time of Laser beam and their corresponding effects are discussed. Other highlights of this subtractive method includes its cost-efficiency, lesser production time and repeatability.


2012 ◽  
Vol 132 (6) ◽  
pp. 404-410 ◽  
Author(s):  
Kenichi Nakayama ◽  
Kenichi Kagoshima ◽  
Shigeki Takeda

2014 ◽  
Vol 5 (1) ◽  
pp. 737-741
Author(s):  
Alejandro Dueñas Jiménez ◽  
Francisco Jiménez Hernández

Because of the high volume of processing, transmission, and information storage, electronic systems presently requires faster clock speeds tosynchronizethe integrated circuits. Presently the “speeds” on the connections of a printed circuit board (PCB) are in the order of the GHz. At these frequencies the behavior of the interconnects are more like that of a transmission line, and hence distortion, delay, and phase shift- effects caused by phenomena like cross talk, ringing and over shot are present and may be undesirable for the performance of a circuit or system.Some of these phrases were extracted from the chapter eight of book “2-D Electromagnetic Simulation of Passive Microstrip Circuits” from the corresponding author of this paper.


Author(s):  
Prabjit Singh ◽  
Ying Yu ◽  
Robert E. Davis

Abstract A land-grid array connector, electrically connecting an array of plated contact pads on a ceramic substrate chip carrier to plated contact pads on a printed circuit board (PCB), failed in a year after assembly due to time-delayed fracture of multiple C-shaped spring connectors. The land-grid-array connectors analyzed had arrays of connectors consisting of gold on nickel plated Be-Cu C-shaped springs in compression that made electrical connections between the pads on the ceramic substrates and the PCBs. Metallography, fractography and surface analyses revealed the root cause of the C-spring connector fracture to be plating solutions trapped in deep grain boundary grooves etched into the C-spring connectors during the pre-plating cleaning operation. The stress necessary for the stress corrosion cracking mechanism was provided by the C-spring connectors, in the land-grid array, being compressed between the ceramic substrate and the printed circuit board.


Author(s):  
William Ng ◽  
Kevin Weaver ◽  
Zachary Gemmill ◽  
Herve Deslandes ◽  
Rudolf Schlangen

Abstract This paper demonstrates the use of a real time lock-in thermography (LIT) system to non-destructively characterize thermal events prior to the failing of an integrated circuit (IC) device. A case study using a packaged IC mounted on printed circuit board (PCB) is presented. The result validated the failing model by observing the thermal signature on the package. Subsequent analysis from the backside of the IC identified a hot spot in internal circuitry sensitive to varying value of external discrete component (inductor) on PCB.


Author(s):  
Jun-Xian Fu ◽  
Shukri Souri ◽  
James S. Harris

Abstract Temperature and humidity dependent reliability analysis was performed based on a case study involving an indicator printed-circuit board with surface-mounted multiple-die red, green and blue light-emitting diode chips. Reported intermittent failures were investigated and the root cause was attributed to a non-optimized reflow process that resulted in micro-cracks and delaminations within the molding resin of the chips.


Author(s):  
Norman J. Armendariz ◽  
Prawin Paulraj

Abstract The European Union is banning the use of Pb in electronic products starting July 1st, 2006. Printed circuit board assemblies or “motherboards” require that planned CPU sockets and BGA chipsets use lead-free solder ball compositions at the second level interconnections (SLI) to attach to a printed circuit board (PCB) and survive various assembly and reliability test conditions for end-use deployment. Intel is pro-actively preparing for this anticipated Pb ban, by evaluating a new lead free (LF) solder alloy in the ternary Tin- Silver-Copper (Sn4.0Ag0.5Cu) system and developing higher temperature board assembly processes. This will be pursued with a focus on achieving the lowest process temperature required to avoid deleterious higher temperature effects and still achieve a metallurgically compatible solder joint. One primary factor is the elevated peak reflow temperature required for surface mount technology (SMT) LF assembly, which is approximately 250 °C compared to present eutectic tin/lead (Sn37Pb) reflow temperatures of around 220 °C. In addition, extended SMT time-above-liquidus (TAL) and subsequent cooling rates are also a concern not only for the critical BGA chipsets and CPU BGA sockets but to other components similarly attached to the same PCB substrate. PCBs used were conventional FR-4 substrates with organic solder preservative on the copper pads and mechanical daisychanged FCBGA components with direct immersion gold surface finish on their copper pads. However, a materials analysis method and approach is also required to characterize and evaluate the effect of low peak temperature LF SMT processing on the PBA SLI to identify the absolute limits or “cliffs” and determine if the minimum processing temperature and TAL could be further lowered. The SLI system is characterized using various microanalytical techniques, such as, conventional optical microscopy, scanning electron microscopy, energy dispersive spectroscopy and microhardness testing. In addition, the SLI is further characterized using macroanalytical techniques such as dye penetrant testing (DPT) with controlled tensile testing for mechanical strength in addition to disbond and crack area mapping to complete the analysis.


Author(s):  
O. Crépel ◽  
Y. Bouttement ◽  
P. Descamps ◽  
C. Goupil ◽  
P. Perdu ◽  
...  

Abstract We developed a system and a method to characterize the magnetic field induced by circuit board and electronic component, especially integrated inductor, with magnetic sensors. The different magnetic sensors are presented and several applications using this method are discussed. Particularly, in several semiconductor applications (e.g. Mobile phone), active dies are integrated with passive components. To minimize magnetic disturbance, arbitrary margin distances are used. We present a system to characterize precisely the magnetic emission to insure that the margin is sufficient and to reduce the size of the printed circuit board.


Sign in / Sign up

Export Citation Format

Share Document