Abstract
TI's commitment to meeting customer requirements has resulted in the development of package technologies and process to improve performance and higher power at lower cost for wire-bonded packages and automotive products are requiring more stringent reliability requirements.
Some of the strategies we have adopted include using thinner metal and low-K ILD for lower parasitics and higher performance, thick copper routings for higher power and larger wafer diameters and smaller scribe streets for lower cost and using Copper (Cu) wire. Cu wire is a key enabler due to higher electrical conductivity and lower cost than gold), but also poses integration challenges due to hardness, CTE mismatch and corrosion susceptibility. The hardness of the copper wire imposes significant challenges for wire-bonding on pads w thin metal and low-k ILD. This required co-design of die bond pad structure for enhanced reliability as well as Cu wire process development requires comprehensive approach encompassing multiple areas including ball and stitch parameters, capillary design, bonding processes like segmented bonding and validation of process margins using ‘hammer’ test. Copper wire also requires metrology and test/detection tools like Nomarski, stitch pull test in addition to the traditional wire pull at mid span and neck, rapid-bake test, measuring intermetallics & Al remaining under ball, and Al-splash. The susceptibility of Cu wire to corrosion required us to introduce new materials like PCC and Au-flash PCC, tight environmental controls in the form of forming gas, monitoring of Ph and ion-trappers in BOM, wire oxidation check at outgoing/incoming inspection as SERA (Sequential Electrochemical Reduction Analysis), and paying close attention to handling and non-process gases. More stringent qualification requirements like AEC-006 is driving additional changes to lead frame design and finish, selection of EMC and Die attach, to reduce delamination and epoxy bleed-out.
The demands for lower cost is driving us to use larger sized wafers (like 300mm) and narrower scribe width, while packing more functionality into smaller dies thereby driving higher metal densities. Additional requirements for thinner and 3D packages requiring post backgrind thickness as low as 50–75um imposing challenges in terms of warpage and saw. The demand for higher power applications is requiring us to use thick copper routings. We have developed test structures and redesigned layout of the scribe street and scribe seal and pursuing new saw methods. We have also learned many lessons in terms of handling and corrosion risks and implemented safeguards in terms of process and material selection.
Erratum: Corrigendum: Active layers of high-performance lead zirconate titanate at temperatures compatible with silicon nano- and microelectronic devices
