Laser Recrystallization and 3D Integration

1984 ◽  
Vol 35 ◽  
Author(s):  
J.P. Colinge
Keyword(s):  
Single Crystal ◽  
Grain Boundaries ◽  
High Speed ◽  
Silicon On Insulator ◽  
Cmos Circuits ◽  
3D Integration ◽  
Stages Of Development ◽  
3D Ics ◽  
Laser Recrystallization ◽  
Integrated Structures

ABSTRACTThere are various methods for producing device-worthy Silicon-on-Insulator films, most, however, are unsuitable for fabrication of 3D integrated structures. The laser recrystallization technique is currently the only one which has produced single-crystal devices for 3D ICs. Improvements on this technique have been such that defects such as grain boundaries can be localized and even eliminated. High speed CMOS circuits with VLSI features have been realized as well as new devices which take advantage of the 3D arrangement of vertically integrated structures. Although 3D integration is still in the early stages of development, it has already opened up new perspectives for applications such as high speed circuits, dense memories, and sensors.

Improved Soi Films By High Dose Oxygen Implantation and Lamp Annealing

1985 ◽  
Vol 53 ◽  
Author(s):  
G. K. Celler ◽  
P. L. F. Hemment ◽  
K. W. West ◽  
J. M. Gibson
Keyword(s):  
High Speed ◽  
Ion Beam ◽  
Silicon On Insulator ◽  
High Dose ◽  
Cmos Circuits ◽  
Radiation Hardened ◽  
Silicon On Insulator Technology ◽  
Annealing Procedure ◽  
Oxygen Precipitates ◽  
Sharp Interfaces

ABSTRACTIon beam synthesis of a buried SiO2 layer is an attractive silicon-on-insulator technology for high speed CMOS circuits and radiation hardened devices. We demonstrate here a new annealing procedure at 1405°C that produces silicon films of excellent quality, essentially free of oxygen precipitates and with sharp interfaces between the Si and the SiO2.

Planarization Issues in Wafer-Level Three-Dimensional (3D) Integration

2004 ◽  
Vol 816 ◽  
Author(s):  
J.-Q. Lu ◽  
G. Rajagopalan ◽  
M. Gupta ◽  
T.S. Cale ◽  
R.J. Gutmann
Keyword(s):  
Wafer Bonding ◽  
Three Dimensional ◽  
Silicon On Insulator ◽  
Wafer Level ◽  
3D Integration ◽  
Edge Chipping ◽  
3D Ics ◽  
Process Compatibility ◽  
Wafer Thinning ◽  
Thinning Process

AbstractMonolithic wafer-level three-dimensional (3D) ICs based upon bonding of processed wafers and die-to-wafer 3D ICs based upon bonding die to a host wafer require additional planarization considerations compared to conventional planar ICs and wafer-scale packaging. Various planarization issues are described, focusing on the more stringent technology requirements of monolithic wafer-level 3D ICs. The specific 3D IC technology approach considered here consists of wafer bonding with dielectric adhesives, a three-step thinning process of grinding, polishing and etching, and an inter-wafer interconnect process using copper damascene patterning. The use of a bonding adhesive to relax pre-bonding wafer planarization requirements is a key to process compatibility with standard IC processes. Minimizing edge chipping during wafer thinning requires understanding of the relationships between wafer bonding, thinning and pre-bonding IC processes. The advantage of silicon-on-insulator technology in alleviating planarization issues with wafer thinning for 3D ICs is described.

Grain Boundary Confinement in Soi Films Using Patterned Ar Coatings and Seeded Oscillatory Growth

1983 ◽  
Vol 23 ◽  
Author(s):  
C.I. Drowley ◽  
P. Zorabedian ◽  
T.I. Kamins
Keyword(s):  
Grain Boundary ◽  
Laser Beam ◽  
Single Crystal ◽  
Grain Boundaries ◽  
Silicon On Insulator ◽  
Mos Transistors ◽  
Etch Pits ◽  
Polysilicon Films ◽  
Regular Arrays ◽  
Ar Coating

ABSTRACTRegular arrays of grain-boundary-free silicon strips several hundred microns long have been produced in a silicon-on-insulator (SOI) structure by using a patterned anti-reflection (AR) coating in combination with seeded oscillatory growth techniques. The AR coating pattern consists of a series of parallel stripes (typically 10 μm wide, separated by 10 μm spaces) starting from a seeding window. A laser beam (typically a 50 μm × 250 μm elliptical beam) is scanned perpendicular to the stripes, with the long axis of the beam parallel to the scan direction. The beam is stepped 1–2 μm between successive scans to advance the single crystal along the direction of the AR stripes. Grain boundaries are confined to the region under the AR stripes. Stereographic analysis of KOH etch pits formed in the single crystal strips has shown that the orientation of the stripes gradually rotates from (001)[110] to (013)[331] as the crystal propagates away from the seed. MOS transistors formed in the single-crystal strips have mobilities comparable to devices formed in bulk films. These mobilities are approximately 20% higher than those found in devices formed in large-grain recrystallized polysilicon films.

Beam Shaping for Cw Laser Recrystallization of Polysilicon Films

1982 ◽  
Vol 13 ◽  
Author(s):  
P. Zorabedian ◽  
C.I. Drowley ◽  
T.I. Kamins ◽  
T.R. Cass
Keyword(s):  
Single Crystal ◽  
Grain Boundaries ◽  
Beam Shaping ◽  
Grain Structure ◽  
Shaped Beam ◽  
Cw Laser ◽  
Laser Recrystallization ◽  
Single Crystal Films ◽  
Crystal Films ◽  
Polysilicon Films

ABSTRACTA shaped laser beam has been used for laterally seeded recrystallization of polysilicon films over oxide. Direct maps of the shaped-beam intensity distribution in the wafer plane are correlated with the grain structure of the recrystallized polysilicon. Using 60% overlapping of shaped-beam scans along <100> directions, we have obtained seeded areas one mm wide and 50 to 500μm long. These consist of 40μm-wide adjacent single-crystal strips regularly separated by low-angle grain boundaries extending laterally away from the seed openings. The spacing between grain boundaries is equal to the scan spacing, providing a means for controlling the location of grain boundaries in otherwise defect-free, single-crystal films.

Structural changes in silicon-on-insulator material during post-implantation annealing

1986 ◽  
Vol 44 ◽  
pp. 736-737
Author(s):  
C. O. Jung ◽  
S. J. Krause ◽  
S.R. Wilson
Keyword(s):  
Integrated Circuits ◽  
Oxide Layer ◽  
High Speed ◽  
Structural Changes ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
High Quality ◽  
Radiation Hardened ◽  
Post Implantation ◽  
Very High

Silicon-on-insulator (SOI) structures have excellent potential for future use in radiation hardened and high speed integrated circuits. For device fabrication in SOI material a high quality superficial Si layer above a buried oxide layer is required. Recently, Celler et al. reported that post-implantation annealing of oxygen implanted SOI at very high temperatures would eliminate virtually all defects and precipiates in the superficial Si layer. In this work we are reporting on the effect of three different post implantation annealing cycles on the structure of oxygen implanted SOI samples which were implanted under the same conditions.

The observation of defects on (100) CdTe surfaces by chemical etching

1992 ◽  
Vol 50 (2) ◽  
pp. 1424-1425
Author(s):  
M.E. Lee
Keyword(s):  
Single Crystal ◽  
Grain Boundaries ◽  
Single Crystals ◽  
Chemical Etching ◽  
Crystalline Perfection ◽  
Crystalline Defects ◽  
High Incidence ◽  
Crystallographic Defects ◽  
Cdznte Substrates ◽  
Device Technology

The crystalline perfection of bulk CdTe substrates plays an important role in their use in infrared device technology. The application of chemical etchants to determine crystal polarity or the density and distribution of crystallographic defects in (100) CdTe is not well understood. The lack of data on (100) CdTe surfaces is a result of the apparent difficulty in growing (100) CdTe single crystal substrates which is caused by a high incidence of twinning. Many etchants have been reported to predict polarity on one or both (111) CdTe planes but are considered to be unsuitable as defect etchants. An etchant reported recently has been considered to be a true defect etchant for CdTe, MCT and CdZnTe substrates. This etchant has been reported to reveal crystalline defects such as dislocations, grain boundaries and inclusions in (110) and (111) CdTe. In this study the effect of this new etchant on (100) CdTe surfaces is investigated.The single crystals used in this study were (100) CdTe as-cut slices (1mm thickness) from Bridgman-grown ingots.

Analysis of Silicon-On-Insulator Structures Formed By Oxygen Ion Implantation

1985 ◽  
Vol 43 ◽  
pp. 300-301
Author(s):  
N. Lewis ◽  
E. L. Hall ◽  
A. Mogro-Campero ◽  
R. P. Love
Keyword(s):  
Ion Implantation ◽  
Single Crystal ◽  
Single Crystal Silicon ◽  
Silicon Layer ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
High Dose ◽  
Crystal Silicon ◽  
Oxygen Ion ◽  
Oxygen Ion Implantation

The formation of buried oxide structures in single crystal silicon by high-dose oxygen ion implantation has received considerable attention recently for applications in advanced electronic device fabrication. This process is performed in a vacuum, and under the proper implantation conditions results in a silicon-on-insulator (SOI) structure with a top single crystal silicon layer on an amorphous silicon dioxide layer. The top Si layer has the same orientation as the silicon substrate. The quality of the outermost portion of the Si top layer is important in device fabrication since it either can be used directly to build devices, or epitaxial Si may be grown on this layer. Therefore, careful characterization of the results of the ion implantation process is essential.

CMOS circuits made in lamp-recrystallised silicon-on-insulator

1984 ◽  
Vol 20 (7) ◽  
pp. 298 ◽  
Author(s):  
D.P. Vu ◽  
C. Leguet ◽  
M. Haond ◽  
D. Bensahel ◽  
J.P. Colinge
Keyword(s):  
Silicon On Insulator ◽  
Cmos Circuits ◽  
Made In

Top-down Fabricated Gold Nanostrip on Silicon-on-insulator Wafer: A Promising Building Block towards Ultra-compact Optical Device

Nanoscale ◽  
2020 ◽  
Author(s):  
Fuping Zhang ◽  
Weikang Liu ◽  
Li Chen ◽  
Zhiqiang Guan ◽  
Hongxing Xu
Keyword(s):  
Optical Communication ◽  
Data Transmission ◽  
Building Block ◽  
High Speed ◽  
Large Data ◽  
Low Energy ◽  
Silicon On Insulator ◽  
Fundamental Building Block ◽  
Low Energy Consumption ◽  
Controllable Fabrication

he plasmonic waveguide is the fundamental building block for high speed, large data transmission capacity, low energy consumption optical communication and sensing. Controllable fabrication and simultaneously optimization of the propagation...

scholarly journals A Flexible PI/Si/SiO2 Piezoresistive Microcantilever for Trace-Level Detection of Aflatoxin B1

Sensors ◽  
2021 ◽  
Vol 21 (4) ◽  
pp. 1118
Author(s):  
Yuan Tian ◽  
Yi Liu ◽  
Yang Wang ◽  
Jia Xu ◽  
Xiaomei Yu
Keyword(s):  
Single Crystal ◽  
Aflatoxin B1 ◽  
Single Crystal Silicon ◽  
Silicon Layer ◽  
Wheatstone Bridge ◽  
Silicon On Insulator ◽  
Passivation Layer ◽  
Spring Constant ◽  
Trace Level ◽  
Crystal Silicon

In this paper, a polyimide (PI)/Si/SiO2-based piezoresistive microcantilever biosensor was developed to achieve a trace level detection for aflatoxin B1. To take advantage of both the high piezoresistance coefficient of single-crystal silicon and the small spring constant of PI, the flexible piezoresistive microcantilever was designed using the buried oxide (BOX) layer of a silicon-on-insulator (SOI) wafer as a bottom passivation layer, the topmost single-crystal silicon layer as a piezoresistor layer, and a thin PI film as a top passivation layer. To obtain higher sensitivity and output voltage stability, four identical piezoresistors, two of which were located in the substrate and two integrated in the microcantilevers, were composed of a quarter-bridge configuration wheatstone bridge. The fabricated PI/Si/SiO2 microcantilever showed good mechanical properties with a spring constant of 21.31 nN/μm and a deflection sensitivity of 3.54 × 10−7 nm−1. The microcantilever biosensor also showed a stable voltage output in the Phosphate Buffered Saline (PBS) buffer with a fluctuation less than 1 μV @ 3 V. By functionalizing anti-aflatoxin B1 on the sensing piezoresistive microcantilever with a biotin avidin system (BAS), a linear aflatoxin B1 detection concentration resulting from 1 ng/mL to 100 ng/mL was obtained, and the toxic molecule detection also showed good specificity. The experimental results indicate that the PI/Si/SiO2 flexible piezoresistive microcantilever biosensor has excellent abilities in trace-level and specific detections of aflatoxin B1 and other biomolecules.

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