scholarly journals BCD to 7-Segment Decoder

2021 ◽  
Vol 7 (4) ◽  
pp. 134
Author(s):  
Yunman Hao
Keyword(s):  
Digital Circuit ◽  
Logic Circuit ◽  
Circuit Diagram ◽  
Truth Table

<p>This paper mainly studies the effect of binary algorithm and truth table on digital circuit, and analyzes its logic circuit (from 0 to 9). Binary algorithm is used to make its truth table, draw the circuit diagram and make its PCB template.</p>

Conversion Method of Description Files in Structural Testing of Digital Circuit

2013 ◽  
Vol 427-429 ◽  
pp. 1285-1288
Author(s):  
Kang Yi Wang
Keyword(s):  
Integrated Circuit ◽  
Large Scale ◽  
Digital Circuit ◽  
Logic Circuit ◽  
Structural Testing ◽  
Digital Logic ◽  
Continuous Development ◽  
Program Correctness ◽  
Testing Program ◽  
Circuit Technology

With the continuous development of large-scale integrated circuit technology, the importance of structural testing and testability design for digital logic circuit has become increasingly evident. In the testing domain, Bench is the most commonly used formats to describe a measured circuit. In order to test the measured circuit using computer, files with various formats must be converted to a netlist file which can be identified by computer. Lev format is a common netlist file. This paper mainly discusses how to convert the Bench file into Lev file, and it is proved by testing program correctness and robustness.

scholarly journals Design of Combinational Logic Circuit Prober

2019 ◽  
Vol 24 (4) ◽  
pp. 317-325
Author(s):  
Mohanad Abdulhamid ◽  
Okoth Masimba
Keyword(s):  
Logic Circuit ◽  
Truth Table ◽  
The Other ◽  
Combinational Logic ◽  
Oscilloscope Screen ◽  
Sinusoidal Signals ◽  
Combinational Logic Circuit ◽  
Truth Tables

Abstract The objective of this paper is to design and implement a logic circuit prober to display truth tables of a three input combinational logic circuit. The truth table is to be as “1” and “0” on an ordinary 60 MHz oscilloscope. This paper meets this objective by using Lissajous Patterns to plot a “0” or a “1” on the oscilloscope screen. To plot a “0” on the oscilloscope screen, two sinusoidal signals in quadrature are supplied to the two inputs of the oscilloscope with the scope set to X-Y mode. To plot a “1” on the oscilloscope, only the signal to the Y input is allowed to reach the oscilloscope screen. To display all the 32 patterns required to obtain a three input truth table, two staircase waveforms are employed. The staircase waveforms, one eight-step and the other four-step, are added to the two sinusoidal signals to shift the patterns along the X and Y directions to produce all the 32 patterns.

scholarly journals Comparative Analysis Domino Logic Based Techniques For VLSI Circuit

2014 ◽  
Vol 12 (8) ◽  
pp. 3803-3808 ◽  
Author(s):  
Shilpa Kamde ◽  
Jitesh Shinde ◽  
Sanjay Badjate ◽  
Pratik Hajare
Keyword(s):  
High Speed ◽  
High Performance ◽  
Circuit Simulation ◽  
Dynamic Logic ◽  
Digital Circuit ◽  
Logic Circuit ◽  
Vlsi Circuit ◽  
Short Channel ◽  
Domino Logic ◽  
Low Area

Domino logic is a CMOS-based evolution of the dynamic logic  techniques  based  on  either  PMOS  or  NMOS transistors. Domino logic technique is widely used in modern digital VLSI circuit. Dynamic logic is twice as fast as static CMOS logic because it uses only N fast transistors. The Dynamic (Domino) logic circuit are often favored in high performance designs because of the high speed and low area advantage.Four different dynamic circuit techniques including Basic domino logic circuit are compared in this paper for low power consumption and speed of domino logic circuits. For digital circuit simulation used BSIM(Berkeley Short Channel IGFET ) Model because it control leakage current.

Self-Replicating and Self-Repairing Multicellular Automata

1998 ◽  
Vol 4 (3) ◽  
pp. 259-282 ◽  
Author(s):  
Gianluca Tempesti ◽  
Daniel Mange ◽  
André Stauffer
Keyword(s):  
Field Programmable Gate Array ◽  
Digital Circuit ◽  
Logic Circuit ◽  
Massively Parallel ◽  
Complex Behavior ◽  
Reconfigurable Logic ◽  
Computing Systems ◽  
Field Programmable ◽  
Self Replication ◽  
Biological Organisms

Biological organisms are among the most intricate structures known to man, exhibiting highly complex behavior through the massively parallel cooperation of numerous relatively simple elements, the cells. As the development of computing systems approaches levels of complexity such that their synthesis begins to push the limits of human intelligence, engineers are starting to seek inspiration in nature for the design of computing systems, both at the software and at the hardware levels. We present one such endeavor, notably an attempt to draw inspiration from biology in the design of a novel digital circuit: a field-programmable gate array (FPGA). This reconfigurable logic circuit will be endowed with two features motivated and guided by the behavior of biological systems: self-replication and self-repair.

An Experimental Input System of Hand-Drawn Logic Circuit Diagram for LSI CAD

1979 ◽  
Author(s):  
M. Ishii ◽  
M. Yamamoto ◽  
M. Iwasaki ◽  
H. Shiraishi
Keyword(s):  
Logic Circuit ◽  
Circuit Diagram ◽  
Input System

scholarly journals A RANDOM COUNTER IN USING SHIFT REGISTER AND ENCODER

2018 ◽  
Vol 14 (1) ◽  
pp. 64-68
Author(s):  
Lianly Rompis
Keyword(s):  
Simple Form ◽  
Basic Concept ◽  
Digital Circuit ◽  
Truth Table ◽  
Shift Register ◽  
Logic Simulation ◽  
Flip Flop ◽  
Standard Format ◽  
Counter Circuit ◽  
The Right

Mostly some specific computer circuits and digital circuit applications need a random counter circuit module for handling specific tasks or operations. To design this kind of circuit, it is more common to use the standard format design of synchronous counter, although this will be more complicated to derive its truth table and karnaugh-maps in order to solve the right output equations for flip-flop inputs. This paper will introduce another way of designing a digital random counter, using shift register and encoder, which is easier to applied and the sequence of this counter can be managed randomly. The methodology being used for this research is mainly tounderstand the basic concept and combine the functions of shift register and encoder, to derive a new and simple form of designing a random counter. Using an Electronics Workbench software, the outputs are shown in logic simulation.

Combinational Logic Analysis Using Laser Voltage Probing

2015 ◽  
Author(s):  
Venkat Krishnan Ravikumar ◽  
Winson Lua ◽  
Seah Yi Xuan ◽  
Gopinath Ranganathan ◽  
Angeline Phoa
Keyword(s):  
Failure Analysis ◽  
Continuous Wave ◽  
Truth Table ◽  
Combinational Logic ◽  
Infra Red ◽  
Analysis Design ◽  
Logic State

Abstract Laser Voltage Probing (LVP) using continuous-wave near infra-red lasers are popular for failure analysis, design and test debug. LVP waveforms provide information on the logic state of the circuitry. This paper aims to explain the waveforms observed from combinational circuitries and use it to rebuild the truth table.

Replication of Quantum Computing towards an Unconventional Environment using QuIDE

2019 ◽  
Vol 8 (4) ◽  
pp. 9461-9464
Keyword(s):  
Quantum Computer ◽  
Source Code ◽  
Circuit Diagram ◽  
Quantum Computers ◽  
Coordinated Development ◽  
Development Environment ◽  
Integrated Development ◽  
Complexity Of Algorithms ◽  
Performance Results ◽  
Exponential Complexity

Current quantum computer simulation strategies are inefficient in simulation and their realizations are also failed to minimize those impacts of the exponential complexity for simulated quantum computations. We proposed a Quantum computer simulator model in this paper which is a coordinated Development Environment – QuIDE (Quantum Integrated Development Environment) to support the improvement of algorithm for future quantum computers. The development environment provides the circuit diagram of graphical building and flexibility of source code. Analyze the complexity of algorithms shows the performance results of the simulator and used for simulation as well as result of its deployment during simulation

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