scholarly journals Production and Electrical Properties of a CuZnAlMn(SMA)/p-Si Diode

2021 ◽  
Author(s):  
EMINE ALDIRMAZ ◽  
M. Güler ◽  
E. Güler
Keyword(s):  
Room Temperature ◽  
Schottky Contact ◽  
Phase Identification ◽  
Frequency Interval ◽  
Electrical Measurements ◽  
X Ray ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Type Semiconductor ◽  
Diode Current

Abstract In this study, the Cu-23.37%Zn-13.73%Al-2.92%Mn (at.%) alloy was used. Phase identification was performed with the Scanning electron microscope (SEM), and energy-dispersive X-ray (EDX). We observed in the austenite phase in Cu-23.37%Zn-13.73%Al-2.92%Mn (at.%) alloy. To produce a new Schottky diode, CuZnAlMn alloy was exploited as a Schottky contact on p-type semiconductor silicon substrate. To calculate the characteristics of the produced diode, current-voltage (I-V), capacitance-voltage (C-V) and conductance-voltage (G-V) analyzes were taken at room temperature (300 K), in the dark and under various lights. Using electrical measurements, the diode's ideality factor (n), barrier height (Φb), and other diode parameters were calculated. Besides, the conductance / capacitance-voltage (G/C-V) characteristics of the diode were studied and in a wide frequency interval at room temperature. Also, the capacitance and conductance values strongly ​​ rely on the frequency. From the present experimental results, the obtained diode can be used for optoelectronic devices.

Schottky Contacts to N-Type 4H-SiC Fabricated with Ti-, Mo-, Ni- and Al-Based Metallizations

2011 ◽  
Vol 679-680 ◽  
pp. 453-456
Author(s):  
Denis Perrone ◽  
Sergio Ferrero ◽  
Luciano Scaltrito ◽  
Marco Naretto ◽  
Edvige Celasco ◽  
...  
Keyword(s):  
Photoelectron Spectroscopy ◽  
Schottky Diodes ◽  
Schottky Contact ◽  
Structural Evolution ◽  
Schottky Contacts ◽  
Power Losses ◽  
X Ray ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Power Densities

In this work we studied different Schottky contacts to 4H-SiC with the aim to obtain Schottky Barrier diodes (SBDs) and Junction Barrier Schottky diodes (JBS) able to operate at high temperatures, frequencies and power densities with low power losses. Schottky contacts were fabricated using Mo and Mo/Al layers annealed up to 600 °C using a Rapid Thermal Process (RTP). A comparison with previous results obtained with Ni, Ti and Ti/Al layers annealed up to 400 °C is also proposed. The Schottky contacts were characterized by means of standard Current-Voltage (I-V) and Capacitance-Voltage (C-V) techniques. X-ray Photoelectron Spectroscopy (XPS) analyses were performed in depth profile mode in order to study the structural evolution of the interface Mo/SiC and Al/Mo during annealing treatments. Mo/Al contacts show a lower barrier height and better overall performances in forward polarization when compared to the Ti- and Ni-based contacts, and they are very promising for Schottky contact fabrication on SBD and JBS.

Chemical and Electrical Mechanisms in Titanium, Platinum, and Hafnium Contacts to Alpha (6H) Silicon Carbide

1992 ◽  
Vol 282 ◽  
Author(s):  
L. M. Porter ◽  
R. C. Glass ◽  
R. F. Davis ◽  
J. S. Bow ◽  
M. J. Kim ◽  
...  
Keyword(s):  
Room Temperature ◽  
Narrow Range ◽  
Electron Beam Evaporation ◽  
Semiconductor Surface ◽  
Interfacial Chemistry ◽  
Leakage Currents ◽  
X Ray ◽  
Barrier Heights ◽  
Current Voltage ◽  
Capacitance Voltage

ABSTRACTThin films (2 Å - 1000 Å) of titanium, platinum, and hafnium were deposited via UHV electron beam evaporation at room temperature on n-type, (0001) alpha (6H)-SiC and compared in terms of interfacial chemistry, energy barriers to electrical conduction, and macroscopic electrical behavior. Current-voltage measurements have shown that these contacts are rectifying, all with ideality factors between 1.01 and 1.09. The lowest leakage currents (∼5 × 10−8 A/cm2 at -10 V) were determined for unannealed Pt contacts and for Hf contacts annealed at 700°C for 20 minutes. Current-voltage (I-V), capacitance-voltage (C-V), and x-ray photoelectron spectro-scopy (XPS) were among the techniques used to determine barrier heights, all of which were within a few tenths of an electron volt of 1.0 eV. The narrow range of calculated barrier heights along with the XPS valence spectrum of the chemically prepared SiC surface give evidence that the Fermi level is pinned at the semiconductor surface.

Laser Engineering of Barrier Structures Based on Solid Solution ZnCdHgTe.

2002 ◽  
Vol 719 ◽  
Author(s):  
Galina Khlyap
Keyword(s):  
Room Temperature ◽  
Film Surface ◽  
Charge Carriers ◽  
Barrier Structure ◽  
Free Charge ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Laser Engineering ◽  
Charged Defects ◽  
Epilayer Surface

AbstractRoom-temperature electric investigations carried out in CO2-laser irradiated ZnCdHgTe epifilms revealed current-voltage and capacitance-voltage dependencies typical for the metal-semiconductor barrier structure. The epilayer surface studies had demonstrated that the cell-like relief has replaced the initial tessellated structure observed on the as-grown samples. The detailed numerical analysis of the experimental measurements and morphological investigations of the film surface showed that the boundaries of the cells formed under the laser irradiation are appeared as the regions of accumulation of derived charged defects of different type of conductivity supplying free charge carriers under the applied electric field.

Nanoprobing Applications with Capacitance-Voltage and Pulsed Current-Voltage Measurements for Device Failure Analysis

2015 ◽  
Author(s):  
LiLung Lai ◽  
Nan Li ◽  
Qi Zhang ◽  
Tim Bao ◽  
Robert Newton
Keyword(s):  
Failure Analysis ◽  
High Speed ◽  
Pulsed Current ◽  
Electrical Measurements ◽  
Device Failure ◽  
Mos Devices ◽  
Atomic Force ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Rising Time

Abstract Owing to the advancing progress of electrical measurements using SEM (Scanning Electron Microscope) or AFM (Atomic Force Microscope) based nanoprober systems on nanoscale devices in the modern semiconductor laboratory, we already have the capability to apply DC sweep for quasi-static I-V (Current-Voltage), high speed pulsing waveform for the dynamic I-V, and AC imposed for C-V (Capacitance-Voltage) analysis to the MOS devices. The available frequency is up to 100MHz at the current techniques. The specification of pulsed falling/rising time is around 10-1ns and the measurable capacitance can be available down to 50aF, for the nano-dimension down to 14nm. The mechanisms of dynamic applications are somewhat deeper than quasi-static current-voltage analysis. Regarding the operation, it is complicated for pulsing function but much easy for C-V. The effective FA (Failure Analysis) applications include the detection of resistive gate and analysis for abnormal channel doping issue.

ION CHANNELING AND PIXE STUDIES OF S IMPLANTATION IN GaAs

1992 ◽  
Vol 02 (02) ◽  
pp. 151-159
Author(s):  
LIU SHIJIE ◽  
WANG JIANG ◽  
HU ZAOHUEI ◽  
XIA ZHONGHUONG ◽  
GAO ZHIGIANG ◽  
...  
Keyword(s):  
Room Temperature ◽  
Dislocation Loops ◽  
Good Recovery ◽  
Electrical Measurements ◽  
X Ray ◽  
Defect Complexes ◽  
Ion Channeling ◽  
Transmission Electron ◽  
Activation Efficiency ◽  
Very High

GaAs (100) crystals were implanted with 100 keV S+ to a dose of 3×1015 cm−2 in a nonchanneling direction at room temperature, and treated with rapid thermal annealing (RTA). He+ Rutherford backscattering and particle-induced X-ray emission in channeling mode in combination with transmission electron microscopy (TEM) were used to study the damage and the lattice location of S atoms. It is revealed that the RTA at 950 °C for 10 sec has resulted in a very good recovery of crystallinity with a few residual defects in the form of dislocation loops, and a very high substitutionality (~90%). The activation efficiency and the Hall mobility of the implanted samples are found to be low after the electrical measurements. Based on these results an extended dopant diffusion effect for the residual defects and a correlation between the electrical properties and defect complexes are suggested.

Study on Schottky Diode Characteristics Improving by X-Ray Irradiation

2013 ◽  
Vol 717 ◽  
pp. 113-116
Author(s):  
Sani Klinsanit ◽  
Itsara Srithanachai ◽  
Surada Ueamanapong ◽  
Sunya Khunkhao ◽  
Budsara Nararug ◽  
...  
Keyword(s):  
Leakage Current ◽  
Schottky Diode ◽  
Room Temperature ◽  
The Other ◽  
Low Power Consumption ◽  
Initial Value ◽  
X Ray ◽  
Forward Current ◽  
Current Voltage ◽  
Current Voltage Characteristics

The effect of soft X-ray irradiation to the Schottky diode properties was analyzed in this paper. The built-in voltage, leakage current, and work function of Schottky diode were investigated. The current-voltage characteristics of the Schottky diode are measured at room temperature. After irradiation at 70 keV for 55 seconds the forward current and leakage current are increase slightly. On the other hand, the built-in voltage is decrease from the initial value about 0.12 V. Consequently, this method can cause the Schottky diode has low power consumption. The results show that soft X-ray can improve the characteristics of Schottky diode.

Morphology and I-V Characteristics of Electrochemically Deposited Zinc Oxide on Silicon

2021 ◽  
Vol 20 (3) ◽  
pp. 32-36
Author(s):  
Ahmad Bukhairi Md Rashid ◽  
Mastura Shafinaz Zainal Abidin ◽  
Shaharin Fadzli Abd Rahman ◽  
Amirjan Nawabjan
Keyword(s):  
Zinc Oxide ◽  
Electrochemical Deposition ◽  
Dark Current ◽  
Room Temperature ◽  
Volume Ratio ◽  
Deposition Process ◽  
X Ray ◽  
Current Voltage ◽  
Electrochemically Deposited ◽  
A Current

This paper reported on the electrochemical deposition of zinc oxide (ZnO) on p-silicon (p-Si) (100) substrate in the mixture of 0.1 M of zinc chloride (ZnCl2) and potassium chloride (KCl) electrolyte at a volume ratio of 1:1, 3:1 and 5:1 namely Sample A, B and C. The deposition process was done in room temperature with a current density of 10 mA/cm2 for 30 minutes. Prior to the experiment, all samples were treated by RCA cleaning steps. All samples were characterized using scanning electron microscopy (SEM) and energy dispersive X-ray (EDX). The results show that all samples have the same morphology of a flake-like structure with different Zn:O ratio that were 2.81, 2.35 and 2.49 for samples A, B and C. The current-voltage (I-V) characteristic graph was obtained by dark current measurement using Keithley SMU 2400 and the threshold voltage (Vth) values were determined at 2.21 V, 0.85 V and 1.22 V for sample A, B and C respectively which correspond with the Zn:O ratio where the highest value of Zn:O ratio can be found in sample A and the lowest in sample B. Based on these results, it shows that electrochemical deposition technique is capable of being used to deposit the flake-like structure ZnO on semiconductor material to form the p-n junction which behaves like a diode. The value of Vth seems to be depended on the ratio between Zn and O. Higher ratio of Zn and O will cause the higher value of intrinsic carrier concentration and built in potential which will increase the Vth value.

Efficient Cu(In, Ga)Se2 Based Solar Cells Prepared by Electrodeposition

2003 ◽  
Vol 763 ◽  
Author(s):  
D. Guimard ◽  
N. Bodereau ◽  
J. Kurdi ◽  
J.F. Guillemoles ◽  
D. Lincot ◽  
...  
Keyword(s):  
Band Gap ◽  
Room Temperature ◽  
Open Circuit Voltage ◽  
Spectral Response ◽  
Deposition Process ◽  
Open Circuit ◽  
Response Analysis ◽  
Cell Parameters ◽  
Current Voltage ◽  
Capacitance Voltage

AbstractCuInSe2 and Cu(In, Ga)Se2 precursor layers have been prepared by electrodeposition, with morphologies suitable for device completion. These precursor films were transformed into photovoltaic quality films after thermal annealing without any post-additional vacuum deposition process. Depending on the preparation parameters annealed films with different band gaps between 1eV and 1.5 eV have been prepared. The dependence of resulting solar cell parameters has been investigated. The best efficiency achieved is about 10,2 % for a band gap of 1.45 eV. This device presents an open circuit voltage value of 740 mV, in agreement with the higher band gap value. Device characterisations (current-voltage, capacitance-voltage and spectral response analysis) have been performed. Admittance spectroscopy at room temperature indicates the presence of two acceptor traps at 0.3 and 0.43 eV from the valance band with density of the order of 2. 1017 cm-3 eV-1.

EFFECT OF SURFACE PASSIVATION ON CAPACITANCE–VOLTAGE CHARACTERISTICS OF Sn/p-Si SCHOTTKY CONTACTS

2011 ◽  
Vol 25 (04) ◽  
pp. 531-542
Author(s):  
CABİR TEMİRCİ ◽  
BAHRI BATI
Keyword(s):  
Chemical Treatment ◽  
Room Temperature ◽  
Surface Passivation ◽  
Anodic Oxide ◽  
Treatment Method ◽  
Schottky Contacts ◽  
Metal Insulator ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Effect Of Surface

We have fabricated the Sn/p-Si Schottky barrier diodes with the interfacial layer metal–insulator–semiconductor (D-MIS) and the surface passivation metal–semiconductor MS (D-MS) by the anodization or chemical treatment method. The current–voltage (I–V) and capacitance–voltage (C–V) characteristics of the devices were measured at room temperature. We obtained that the excess capacitance (C0) value of the MIS Sn/p-Si diode with the anodic oxide layer of 16.88 pF and 0.12 pF for the MS Sn/p-Si ideal diode with the surface passivation by the anodization or chemical treatment method from reverse bias C–V characteristics. Thus, we have succeeded to diminish the excess capacitance value to the limit of 0.12 pF for the MS Sn/p-Si diode by using the anodization or chemical treatment method.

Schottky Barriers on p-GaN

1995 ◽  
Vol 395 ◽  
Author(s):  
N.I. Kuznetsov ◽  
E.V. Kalinina ◽  
V.A. Soloviev ◽  
V.A. Dmitriev
Keyword(s):  
Room Temperature ◽  
Current Flow ◽  
Thermal Evaporation ◽  
Chemical Vapor ◽  
Schottky Barriers ◽  
Flow Mechanism ◽  
Vacuum Thermal Evaporation ◽  
Forward Current ◽  
Current Voltage ◽  
Capacitance Voltage

ABSTRACTSchottky barriers were formed on p-GaN. p-GaN layers doped with Mg were grown by metalorganic chemical vapor deposition (MOCVD). 6H-SiC wafers were used as substrates. The barriers were made by vacuum thermal evaporation of Au. Capacitance-voltage (C-V) and current-voltage (I-V) characteristics of the barriers were investigated. The concentration of the ionized acceptors in the p-layers was measured to be about ∼1017 cm−3. The barrier height was determined to be 2.48 eV by C - V measurements at room temperature. The forward current flow mechanism through the barriers is discussed.

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