scholarly journals Specificity of solar cells thermal resistance measurement.

2021 ◽  
Author(s):  
V.I. Smirnov ◽  
◽  
V.A. Sergeev ◽  
A.A. Gavrikov ◽  
◽  
...  
Keyword(s):  
Solar Cells ◽  
Thermal Resistance ◽  
Modulation Frequency ◽  
High Heat ◽  
Junction Temperature ◽  
Modulation Method ◽  
Variable Component ◽  
Thermal Impedance ◽  
Current Pulses ◽  
Resistance Component

The results of power solar batteries' thermal resistance measurements are described. A distinctive feature of such batteries is the high heat capacity of the semiconductor material, as well as the high total electrical capacity of p-n-junctions. This complicates the thermal resistance of the measuring process, based on heating the object by the heating current pulses and measuring the temperature of the p-n-junction in the pauses between pulses. To measure the thermal resistance of power solar battery the modulation method was used, a device under test (DUT) heated with current pulses with duration modulated harmonically. The response to the heat (a variable component of the p-n-junction temperature) is measured in the pauses between the pulses. To detect the thermal resistance component junction-to-case, the dependence of the thermal impedance on heating power modulation frequency was measured. In the measured dependence, a frequency range is found when the real part of the thermal impedance value remains constant. This allows the determining of the "junction-to-case" thermal resistance component. Were made estimates of the duration of a single measurement of thermal resistance and a conclusion about the possibility of implementing selective technological control of this parameter in the production of powerful solar cells.

scholarly journals Thermal Impedance Characterization Using Optical Measurement Assisted by Multi-Physics Simulation for Multi-Chip SiC MOSFET Module

Micromachines ◽  
2020 ◽  
Vol 11 (12) ◽  
pp. 1060
Author(s):  
Min-Ki Kim ◽  
Sang Won Yoon
Keyword(s):  
Thermal Resistance ◽  
Fiber Optics ◽  
Optical Measurement ◽  
Field Effect Transistors ◽  
Oxide Semiconductor ◽  
Junction Temperature ◽  
Cooling Curve ◽  
Temperature Sensitive ◽  
Thermal Impedance ◽  
Power Module

In this paper, an approach to determine the thermal impedance of a multi-chip silicon carbide (SiC) power module is proposed, by fusing optical measurement and multi-physics simulations. The tested power module consists of four parallel SiC metal-oxide semiconductor field-effect transistors (MOSFETs) and four parallel SiC Schottky barrier diodes. This study mainly relies on junction temperature measurements performed using fiber optic temperature sensors instead of temperature-sensitive electrical parameters (TESPs). However, the fiber optics provide a relatively slow response compared to other available TSEP measurement methods and cannot detect fast responses. Therefore, the region corresponding to undetected signals is estimated via multi-physics simulations of the power module. This method provides a compensated cooling curve. We analyze the thermal resistance using network identification by deconvolution (NID). The estimated thermal resistance is compared to that obtained via a conventional method, and the difference is 3.8%. The proposed fusion method is accurate and reliable and does not require additional circuits or calibrations.

scholarly journals Influence of a Thermal Pad on Selected Parameters of Power LEDs

Energies ◽  
2020 ◽  
Vol 13 (14) ◽  
pp. 3732
Author(s):  
Krzysztof Górecki ◽  
Przemysław Ptak ◽  
Tomasz Torzewicz ◽  
Marcin Janicki
Keyword(s):  
Optical Properties ◽  
Thermal Resistance ◽  
Optical Power ◽  
Junction Temperature ◽  
Operating Parameters ◽  
Cold Plate ◽  
Optical Efficiency ◽  
Forward Current ◽  
Measurement Results ◽  
Set Up

This paper is devoted to the analysis of the influence of thermal pads on electric, optical, and thermal parameters of power LEDs. Measurements of parameters, such as thermal resistance, optical efficiency, and optical power, were performed for selected types of power LEDs operating with a thermal pad and without it at different values of the diode forward current and temperature of the cold plate. First, the measurement set-up used in the paper is described in detail. Then, the measurement results obtained for both considered manners of power LED assembly are compared. Some characteristics that illustrate the influence of forward current and temperature of the cold plate on electric, thermal, and optical properties of the tested devices are presented and discussed. It is shown that the use of the thermal pad makes it possible to achieve more advantageous values of operating parameters of the considered semiconductor devices at lower values of their junction temperature, which guarantees an increase in their lifetime.

Measuring the Junction Temperature of GaInP/GaInAs/Ge Multijunction Solar Cells Using Photoluminescence

2011 ◽  
Vol 50 (9) ◽  
pp. 092302 ◽  
Author(s):  
Gia-Wei Shu ◽  
Chiun-Hsiang Tung ◽  
Shr-Chang Tung ◽  
Po-Chen Su ◽  
Ji-Lin Shen ◽  
...  
Keyword(s):  
Solar Cells ◽  
Junction Temperature ◽  
Multijunction Solar Cells

Approximate Analytical Model for a First Level Package With Non-Uniformly Powered Die

2006 ◽  
Author(s):  
Abhijit Kaisare ◽  
Dereje Agonafer ◽  
A. Haji-Sheikh ◽  
Greg Chrysler ◽  
Ravi Mahajan
Keyword(s):  
Thermal Resistance ◽  
Analytical Model ◽  
Functional Integration ◽  
Thermal Design ◽  
Junction Temperature ◽  
Direct Result ◽  
Design Guideline ◽  
Functional Blocks ◽  
Distribution Of Power ◽  
Functional Components

Microprocessors continue to grow in capabilities, complexity and performance. Microprocessors typically integrate functional components such as logic and level two (L2) cache memory in their architecture. This functional integration of logic and memory results in improved performance of the microprocessor as the clock speed increases and the instruction execution time has decreased. However, the integration also introduces a layer of complexity to the thermal design and management of microprocessors. As a direct result of function integration, the power map on a microprocessor is typically highly non-uniform and the assumption of a uniform heat flux across the chip surface is not valid. The active side of the die is divided into several functional blocks with distinct power assigned to each functional block. Previous work [1,2] has been done to minimize the thermal resistance of the package by optimizing the distribution of the non-uniform powered functional blocks with different power matrices. This study further gives design guideline and key pointers to minimized thermal resistance for any number of functional blocks for a given non-uniformly powered microprocessor. In this paper, initially (Part I) temperature distribution of a typical package consisting of a uniformly powered die, heat spreader, TIM 1 & 2 and the base of the heat sink is calculated using an approximate analytical model. The results are then compared with a detailed numerical model and the agreement is within 5%. This study follows (Part II) with a thermal investigation of non-uniform powered functional blocks with a different power matrices with focus on distribution of power over die surface with an application of maximum, minimum and average uniform junction temperature over a given die area. This will help to predict the trend of the calculated distribution of power that will lead to the least thermal gradient over a given die area. This trend will further help to come up with design correlations for minimizing thermal resistance for any number of functional blocks for a given non-uniformly powered microprocessor numerically as well as analytically. The commercial finite element code ANSYS® is used for this analysis as a numerical tool.

Performance and Reliability Characteristics of 1200 V, 100 A, 200°C Half-Bridge SiC MOSFET-JBS Diode Power Modules

2010 ◽  
Vol 2010 (HITEC) ◽  
pp. 000289-000296 ◽  
Author(s):  
James D. Scofield ◽  
J. Neil Merrett ◽  
James Richmond ◽  
Anant Agarwal ◽  
Scott Leslie
Keyword(s):  
Selection Process ◽  
Free Module ◽  
Junction Temperature ◽  
Thermal Impedance ◽  
Power Module ◽  
Package Design ◽  
Module Design ◽  
Reliability Characteristics ◽  
Power Modules ◽  
Environmental Requirement

A custom multi-chip power module packaging was designed to exploit the electrical and thermal performance potential of silicon carbide MOSFETs and JBS diodes. The dual thermo-mechanical package design was based on an aggressive 200°C ambient environmental requirement and 1200 V blocking and 100 A conduction ratings. A novel baseplate-free module design minimizes thermal impedance and the associated device junction temperature rise. In addition, the design incorporates a free-floating substrate configuration to minimize thermal expansion coefficient induced stresses between the substrate and case. Details of the module design and materials selection process will be discussed in addition to highlighting deficiencies in current packaging materials technologies when attempting to achieve high thermal cycle life reliability over an extended temperature range.

Integration of Silver Heat Spreaders in LTCC utilizing Thick Silver Tape in the Co-fire Process

2015 ◽  
Vol 2015 (CICMT) ◽  
pp. 000062-000066 ◽  
Author(s):  
T. Welker ◽  
S. Günschmann ◽  
N. Gutzeit ◽  
J. Müller
Keyword(s):  
Thermal Conductivity ◽  
Thermal Resistance ◽  
Heat Sink ◽  
Junction Temperature ◽  
Large Area ◽  
Heat Spreader ◽  
Integration Density ◽  
Heat Spreaders ◽  
Cte Mismatch ◽  
Pattern Resolution

The integration density in semiconductor devices is significantly increased in the last years. This trend is already described by Moore's law what forecasts a doubling of the integration density every two years. This evolution makes greater demands on the substrate technology which is used for the first level interconnect between the semiconductor and the device package. Higher pattern resolution is required to connect more functions on a smaller chip. Also the thermal performance of the substrate is a crucial issue. The increased integration density leads to an increased power density, what means that more heat has to dissipate on a smaller area. Thus, substrates with a high thermal conductivity (e. g. direct bonded copper (DBC)) are utilized which spread the heat over a large area. However, the reduced pattern resolution caused by thick metal layers is disadvantageous for this substrate technology. Alternatively, low temperature co-fired ceramic (LTCC) can be used. This multilayer technology provides a high pattern resolution in combination with a high integration grade. The poor thermal conductivity of LTCC (3 … 5 W*m−1*K−1) requires thermal vias made of silver paste which are placed between the power chip and the heat sink and reduce the thermal resistance of the substrate. The via-pitch and diameter is limited by the LTCC technology, what allows a maximum filling grade of approx. 20 to 25 %. Alternatively, an opening in the ceramic is created, to bond the chip directly to the heat sink. This leads to technological challenges like the CTE mismatch between the chip and the heat sink material. Expensive materials like copper molybdenum composites with matched CTE have to be used. In the presented investigation, a thick silver tape is used to form a thick silver heat spreader through the LTCC substrate. An opening is structured by laser cutting in the LTCC tape and filled with a laser cut silver tape. After lamination, the substrate is fired using a constraint sintering process. The bond strength of the silver to LTCC interface is approx. 5.6 MPa. The thermal resistance of the silver structure is measured by a thermal test chip (Delphi PST1, 2.5 mm × 2.5 mm) glued with a high thermal conducting epoxy to the silver structure. The chip contains a resistor and diodes to generate heat and to determine the junction temperature respectively. The backside of the test structure is temperature stabilized by a temperature controlled heat sink. The resulting thermal resistance is in the range of 1.1 K/W to 1.5 K/W depending on the length of silver structure (5 mm to 7 mm). Advantages of the presented heat spreader are the low thermal resistance and the good embedding capability in the co-fire LTCC process.

Thermal Analysis of Cold Plate for Direct Liquid Cooling of High Performance Servers

2019 ◽  
Vol 141 (4) ◽  
Author(s):  
Bharath Ramakrishnan ◽  
Yaser Hadad ◽  
Sami Alkharabsheh ◽  
Paul R. Chiarot ◽  
Bahgat Sammakia
Keyword(s):  
Heat Transfer ◽  
Heat Flux ◽  
Thermal Resistance ◽  
High Heat ◽  
High Heat Flux ◽  
Cold Plate ◽  
Liquid Cooling ◽  
Maximum Heat ◽  
Effective Heat ◽  
Cold Plates

Data center energy usage keeps growing every year and will continue to increase with rising demand for ecommerce, scientific research, social networking, and use of streaming video services. The miniaturization of microelectronic devices and an increasing demand for clock speed result in high heat flux systems. By adopting direct liquid cooling, the high heat flux and high power demands can be met, while the reliability of the electronic devices is greatly improved. Cold plates which are mounted directly on to the chips facilitate a lower thermal resistance path originating from the chip to the incoming coolant. An attempt was made in the current study to characterize a commercially available cold plate which uses warm water in carrying the heat away from the chip. A mock package mimicking a processor chip with an effective heat transfer area of 6.45 cm2 was developed for this study using a copper block heater arrangement. The thermo-hydraulic performance of the cold plates was investigated by conducting experiments at varying chip power, coolant flow rates, and coolant temperature. The pressure drop (ΔP) and the temperature rise (ΔT) across the cold plates were measured, and the results were presented as flow resistance and thermal resistance curves. A maximum heat flux of 31 W/cm2 was dissipated at a flow rate of 13 cm3/s. A resistance network model was used to calculate an effective heat transfer coefficient by revealing different elements contributing to the total resistance. The study extended to different coolant temperatures ranging from 25 °C to 45 °C addresses the effect of coolant viscosity on the overall performance of the cold plate, and the results were presented as coefficient of performance (COP) curves. A numerical model developed using 6SigmaET was validated against the experimental findings for the flow and thermal performance with minimal percentage difference.

Numerical Simulation of Cu-Cu Interface Thermal Resistance by Utilizing Laser Photothermal Method

2011 ◽  
Vol 117-119 ◽  
pp. 195-200 ◽  
Author(s):  
Qing Zhi Zhang ◽  
Gang Wu ◽  
Zhi Yang Pang ◽  
Jin Zeng Chen ◽  
Guang Hua Li ◽  
...  
Keyword(s):  
Numerical Simulation ◽  
Thermal Resistance ◽  
Experimental Measurement ◽  
Modulation Frequency ◽  
Interface Temperature ◽  
Phase Lag ◽  
Photothermal Method ◽  
Interface Thermal Resistance ◽  
Measurement Results ◽  
Different Temperatures

By using the high purity Cu samples as the study objects and based on the experimental measurement results of the interface thermal resistance, the study on the relations between the interface thermal resistance, the laser modulation frequency and the phase lag under different temperatures has been carried out through the Matlab numerical simulation. It is shown that the corresponding phase lag is increasingly bigger but the interface thermal resistance is increasingly smaller while the interface temperature become higher at a certain pressure; furthermore, the study on relation between the interface thermal resistance and the temperature variation has been carried out and it may be concluded based on the analysis that the interface thermal resistance changes remarkably while the temperature scope is from 20K to 60K and the interface thermal resistance varies slightly while the temperature scope is from 60K to 120K.

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