TDR Analysis of Advanced Microprocessors

Author(s):  
David Bethke ◽  
Wayland Seifert

Abstract Time Domain Reflectrometry or TDR is an analytical technique used to determine the impedance and electrical length of conductors. This relatively inexpensive technique utilizes a pulse card and digital oscilloscope whereby the reflected signal amplitude from an initiating pulse is measured versus time. The technique is useful for characterizing the impedance of a conductor in the time domain, and has traditionally been employed in board level analysis. More recently, TDR has been shown to be useful in electrically isolating integrated circuit package failures1. Historically, open failures on non-flip chip devices were resolved through relatively straight-forward, low risk methods in a failure analysis lab. Typically, root cause analysis involved simple verification on a curve tracer, non-destructive inspection using X-Ray imaging, chemical, thermal or mechanical decapsulation, optical and electron microscopy and as necessary, the use of mechanical probe isolation. The implementation of advanced flip chip package technology rendered the traditional isolation methodologies inadequate. After verification and X-ray inspection, a decision had to be made prior to subsequent destructive physical analysis as to the most probable failure location. Since the board interconnects, board interposer, and bump locations were not geometrically aligned, isolation of opens through physical cross-sectioning became risky, tedious and lengthy. These constraints were overcome through the use of TDR analysis. The authors have successfully incorporated the TDR technique into AMD’s microprocessor failure analysis flow, improving success rate, reducing risk and decreasing turn-around time. The paper will include a brief description of TDR theory and hardware, technical barriers that the authors encountered during implementation, sample preparation as well as details where the technique was successfully employed in failure isolation. The remaining portion of this paper provides illustrative examples where TDR was effectively utilized in the analysis of slot A cards, ceramic flip chip PGA pins, and internal package trace failures.

Author(s):  
Damion T. Searls ◽  
Anura Don ◽  
Emilie Dy ◽  
Deepak Goyal

Abstract Detecting failure in electrical connectivity at the component packaging level is a major expenditure of the industry’s failure analysis (FA) resources. These package failures can result from material/manufacturing excursions, stress tests, and/or customer returns. However, many of the methods employed currently (such as X-ray or crosssectioning) can fall short in terms of throughput time, or success rate. Moreover, many FA techniques can be destructive and therefore leave the sample useless for subsequent tests. On the other hand, time domain reflectometry (TDR) can be used as a component packaging level FA tool which meets the needs of quickly, precisely, and non-destructively locating electrical connectivity problems in signal traces. Once the failure location has been pin pointed, other FA methods (X-ray, cross-section, etc.) can be used more easily to determine why the failure occurred. Since TDR testing involves no physical preparation, the sample will be completely intact for subsequent tests. TDR uses a low voltage, low current, and very short rise time voltage pulse to determine the impedance of a signal trace as a function of time. With a waveform of trace impedance versus time, not only can the presence of a failure be detected, but the distance along the trace to the anomaly can also be quickly determined. This paper presents TDR as a useful tool for package level failure analysis labs. The paper proposes one set of solutions for enabling effective TDR analysis (e.g., TDR test fixturing), and discusses some TDR methodologies for detecting and locating anomalies. The methodologies will be illustrated using three example cases that reflect some commonly used packaging technologies: Flip-Chip Organic Land Grid Array (FC-OLGA), Flip-Chip Pin Grid Array (FC-PGA), and Plastic Land Grid Array (PLGA).


Author(s):  
Kendall Scott Wills ◽  
Omar Diaz de Leon ◽  
Kartik Ramanujachar ◽  
Charles P. Todd

Abstract In the current generations of devices the die and its package are closely integrated to achieve desired performance and form factor. As a result, localization of continuity failures to either the die or the package is a challenging step in failure analysis of such devices. Time Domain Reflectometry [1] (TDR) is used to localize continuity failures. However the accuracy of measurement with TDR is inadequate for effective localization of the failsite. Additionally, this technique does not provide direct 3-Dimenstional information about the location of the defect. Super-conducting Quantum Interference Device (SQUID) Microscope is useful in localizing shorts in packages [2]. SQUID microscope can localize defects to within 5um in the X and Y directions and 35um in the Z direction. This accuracy is valuable in precise localization of the failsite within the die, package or the interfacial region in flipchip assemblies.


Author(s):  
Carlo Grilletto ◽  
Steve Hsiung ◽  
Andrew Komrowski ◽  
John Soopikian ◽  
Daniel J.D. Sullivan ◽  
...  

Abstract This paper describes a method to "non-destructively" inspect the bump side of an assembled flip-chip test die. The method is used in conjunction with a simple metal-connecting "modified daisy chain" die and makes use of the fact that polished silicon is transparent to infra-red (IR) light. The paper describes the technique, scope of detection and examples of failure mechanisms successfully identified. It includes an example of a shorting anomaly that was not detectable with the state of the art X-ray equipment, but was detected by an IR emission microscope. The anomalies, in many cases, have shown to be the cause of failure. Once this has been accomplished, then a reasonable deprocessing plan can be instituted to proceed with the failure analysis.


2011 ◽  
Vol 2011 (1) ◽  
pp. 001078-001083 ◽  
Author(s):  
K. Fahey ◽  
R. Estrada ◽  
L. Mirkarimi ◽  
R. Katkar ◽  
D. Buckminster ◽  
...  

This paper describes the utilization of non-destructive imaging using 3D x-ray microscopy for package development and failure analysis. Four case studies are discussed to explain our methodology and its impact on our advanced packaging development effort. Identifying and locating failures embedded deep inside the package, such as a solder fatigue failure within a flip chip package, without the need for physical cross-sectioning is of substantial benefit because it preserves the package for further analysis. Also of utility is the ability to reveal the structural details of the package while producing superior quality 2D and volumetric images. The technique could be used not only for analysis of defects and failures, but also to characterize geometries and morphologies during the process and package development stage.


2011 ◽  
Vol 110-116 ◽  
pp. 971-976
Author(s):  
Hong You Wang ◽  
Jin Guang Li

Micro-strip line is a kind of transmission line that is the most widely used in microwave integrated circuit. With the development of microwave integrated circuits and the increasing work frequency of the micro-strip line, a higher requirement for its electromagnetic compatibility has been raised. Finite-Difference Time-Domain (FDTD) method has characteristics of good adaptability in the analysis of electromagnetic compatibility issues and superiority in complexity of the structure modeling. For these reasons, this Article uses FDTD method which is widely used in electromagnetic field calculation to analyze the time-domain of micro-strip line, calculates its current and voltage induced in ports and discuss the response feature under different radiation conditions.


MRS Bulletin ◽  
2010 ◽  
Vol 35 (7) ◽  
pp. 514-519 ◽  
Author(s):  
Mariano Trigo ◽  
David Reis

AbstractRecent advances in pulsed x-ray sources have opened up new opportunities to study the dynamics of matter directly in the time domain with picosecond to femtosecond resolution. In this article, we present recent results from a variety of ultrafast sources on time-resolved x-ray scattering from elementary excitations in periodic solids. A few representative examples are given on folded acoustic phonons, coherent optical phonons, squeezed phonons, and polaritons excited by femtosecond lasers. Next-generation light sources, such as the x-ray-free electron laser, will lead to improvements in coherence, flux, and pulse duration. These experiments demonstrate potential opportunities for studying matter far from equilibrium on the fastest time scales and shortest distances that will be available in the coming years.


Author(s):  
Akira Mizoguchi ◽  
Minoru Sugawara ◽  
Masahide Nakamura ◽  
Koichiro Takeuchi

Abstract We have been paying attention to the development of the nondestructive physical analysis (NDPA) technology. We think that NDPA is a technology which doesn't depend on the worker's capability or experience. There are many NDPA techniques, and analysis using X-ray imaging is one of the principal techniques. Due to the progress of the image analysis using computers in recent years, X-ray imaging have been evolving from two dimensional images to three dimensional imaging. We have been applying X-ray CT imaging to actual failure analysis and reliability evaluation since 2008. At ISTFA 2009, we reported on the effectiveness of X-ray Computed Tomography (CT) images in the failure analysis. [1] We confirmed that the X-ray CT image had various applications, for example, screening for counterfeit parts, the detection of the defect of the multi-layers printed wiring boards (multi-layers PWB), the structure confirmation of caulking contacts, and the detection of cracks or voids of the solder joint. This paper discusses the effectiveness of X-ray CT imaging in failure analysis and discusses the effectiveness of applying X-ray CT imaging to the propagation of cracks occurring at solder joints during temperature cycling test.


Author(s):  
Ann N. Campbell ◽  
William F. Filter ◽  
Nicholas Antoniou

Abstract Both the increased complexity of integrated circuits, resulting in six or more levels of integration, and the increasing use of flip-chip packaging have driven the development of integrated circuit (IC) failure analysis tools that can be applied to the backside of the chip. Among these new approaches are focused ion beam (FIB) tools and processes for performing chip edits/repairs from the die backside. This paper describes the use of backside FIB for a failure analysis application rather than for chip repair. Specifically, we used FIB technology to prepare an IC for inspection of voided metal interconnects (“lines”) and vias. Conventional FIB milling was combined with a superenhanced gas assisted milling process that uses XeF2 for rapid removal of large volumes of bulk silicon. This combined approach allowed removal of the TiW underlayer from a large number of M1 lines simultaneously, enabling rapid localization and plan view imaging of voids in lines and vias with backscattered electron (BSE) imaging in a scanning electron microscope (SEM). Sequential cross sections of individual voided vias enabled us to develop a 3D reconstruction of these voids. This information clarified how the voids were formed, helping us identify the IC process steps that needed to be changed.


2011 ◽  
Vol 8 (3) ◽  
pp. 114-120
Author(s):  
K. Webb ◽  
H. Song

A compensation scheme that reduces the impact of the excess reactance of bond wires is introduced. From the 3D finite element code and the time domain reflectometry (TDR), physical models were evaluated and the excess reactance of the signal path was determined to optimize the compensation structure. The presented method can be employed to reduce the negative impact caused by the excess reactances in bond wires for high signal integrity integrated circuit (IC) packaging applications.


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