PCB thermal reliability characteristics analysis under ambient temperature

2020 ◽  
Vol 20 (3) ◽  
pp. 853-858
Author(s):  
Hailong Huang ◽  
Yi Wan ◽  
Kai Zhou

PCB is an important component for electronic devices – Mechanical connections and electrical transmission, thermal failure is its main failure mode, the heat flow analysis and thermal design is the basis and premise to improve thermal characteristics of PCBs. In this paper, based on the principles of fluid mechanics, using the finite volume method, the thermal characteristics of the PCB is modeled, and we obtain the maximum junction temperature of the PCB, PCB’s thermal distribution and effect of different ambient temperatures on the PCB thermal characteristics. The study provides a theoretical basis for the PCB thermal design.

Author(s):  
Patrick Loney

When developing a thermal model of a highly populated electronics board, a significant amount of time and effort is needed to track the thermal characteristics of all the dissipating components. In business sectors where multiple boards are thermally designed and analyzed each year, developing a components database and integrating it into the analysis tool will save time and ensure that consistent values are used in every design. With an “in tool” component database, multiple advantages are achieved. Once a component is entered into the database, the component information can be accessed in subsequent designs that employ the component. All engineers doing thermal design have access to the database. Once the thermal characteristics of a component are agreed upon, consistency across all boards is maintained. Additionally, values for each component in the database can be automatically brought into the analysis tool. By making a computer program develop the model of the component, human error is removed. The database tracks all major thermal aspects of a component. This includes the maximum junction temperature, Theta JC (case to junction resistance), leg/pin configuration (size, length, number, conductivity), and board to case gap thickness. Optional values can include top side cooling resistance, performance temperature limits, manufacturer, datasheet web address, and even an entry to identify the configuring engineer.


Author(s):  
Chih-Kuang Yu ◽  
Ming-Che Hsieh ◽  
Chun-Kai Liu ◽  
Ming-Ji Dai ◽  
Ra-Min Tain

In this study, the thermal simulations of 3 dimensional IC packages base on 4-layer vertical stacked die (bare die on bare die) with TSV (through silicon vias) and micro-bumps structure are conducted. The thermal models by finite volume method are developed for different geometrical parameters (TSV, micro-bumps distribution arrangement and spacer thickness) and material property (thermal conductivity of spacer). The thermal performance and the heat transfer mechanism for the stacked die package are analyzed for optimizing the geometrical and material parameters. Not only the temperature distributions but also the junction temperature and thermal resistances in 4-layer stacked die package with different multi-die power configurations are shown and discussed.


2014 ◽  
Vol 509 ◽  
pp. 70-74
Author(s):  
Xiao Zhang ◽  
Su Juan Zhang

Thermal performance is very important to power devices. Solder voids are detrimental to power devices thermal and reliability characteristics. According to above-mentioned problem, using computer software as an analysis tool, making some simulation and modeling on the influence of different solder voids distribution to power devices thermal characteristics. Focus on the solder voids around active region of power devices. Computing results show that solder voids under active region are the most evidently factor to power devices thermal characteristics and provide some suggests on the process of power devices thermal design.


2012 ◽  
Vol 2012 ◽  
pp. 1-6 ◽  
Author(s):  
Xing-ming Long ◽  
Rui-jin Liao ◽  
Jing Zhou

The electrical-thermal characteristics of gallium-nitride- (GaN-) based light-emitting diodes (LED), packaged by chips embedded in board (EIB) technology, were investigated using a multiphysics and multiscale finite element code, COMSOL. Three-dimensional (3D) finite element model for packaging structure has been developed and optimized with forward-voltage-based junction temperatures of a 9-chip EIB sample. The sensitivity analysis of the simulation model has been conducted to estimate the current and temperature distribution changes in EIB LED as the blue LED chip (substrate, indium tin oxide (ITO)), packaging structure (bonding wire and chip numbers), and system condition (injection current) changed. This method proved the reliability of simulated results in advance and useful material parameters. Furthermore, the method suggests that the parameter match on Shockley's equation parameters, Rs, nideal, and Is, is a potential method to reduce the current crowding effect for the EIB LED. Junction temperature decreases by approximately 3 K to 10 K can be achieved by substrate thinning, ITO, and wire bonding. The nonlinear-decreasing characteristics of total thermal resistance that decrease with an increase in chip numbers are likely to improve the thermal performance of EIB LED modules.


2011 ◽  
Vol 52-54 ◽  
pp. 1411-1414 ◽  
Author(s):  
Bo Chen

Thermal design and analysis of a satellite borne FPGA is described in this paper. Thermal-conductive glue, vias and an aluminum bar were used to the FPGA and the PCB under the FPGA in order to help conduct the heat of the FPGA to heat sink. The results of finite element analysis showed that the case temperature of the FPGA decreased from 132.5°C to 55.4°C and the junction temperature decreased from 136.1°C to59.0 °C after the thermal design, which matches the requirements of thermal design.


Author(s):  
Abhijit Kaisare ◽  
Dereje Agonafer ◽  
A. Haji-Sheikh ◽  
Greg Chrysler ◽  
Ravi Mahajan

Microprocessors continue to grow in capabilities, complexity and performance. Microprocessors typically integrate functional components such as logic and level two (L2) cache memory in their architecture. This functional integration of logic and memory results in improved performance of the microprocessor as the clock speed increases and the instruction execution time has decreased. However, the integration also introduces a layer of complexity to the thermal design and management of microprocessors. As a direct result of function integration, the power map on a microprocessor is typically highly non-uniform and the assumption of a uniform heat flux across the chip surface is not valid. The active side of the die is divided into several functional blocks with distinct power assigned to each functional block. Previous work [1,2] has been done to minimize the thermal resistance of the package by optimizing the distribution of the non-uniform powered functional blocks with different power matrices. This study further gives design guideline and key pointers to minimized thermal resistance for any number of functional blocks for a given non-uniformly powered microprocessor. In this paper, initially (Part I) temperature distribution of a typical package consisting of a uniformly powered die, heat spreader, TIM 1 & 2 and the base of the heat sink is calculated using an approximate analytical model. The results are then compared with a detailed numerical model and the agreement is within 5%. This study follows (Part II) with a thermal investigation of non-uniform powered functional blocks with a different power matrices with focus on distribution of power over die surface with an application of maximum, minimum and average uniform junction temperature over a given die area. This will help to predict the trend of the calculated distribution of power that will lead to the least thermal gradient over a given die area. This trend will further help to come up with design correlations for minimizing thermal resistance for any number of functional blocks for a given non-uniformly powered microprocessor numerically as well as analytically. The commercial finite element code ANSYS® is used for this analysis as a numerical tool.


Author(s):  
Thomas Mancuso ◽  
Abhijit Mukherjee

Thermal analysis is a critical function in the design of electric machinery. While the core design discipline is electro-magnetics, other classic mechanical engineering expertise is required to create state of the art electric machines. Various components of electric machines present the thermal design engineer with obvious applications of classic, well-known solutions. These would include simultaneous thermal and hydro-dynamically developing flow when considering the long, narrow cooling ducts placed between stator laminations. However, the cooling of end windings of a formed, lap-wound electric machine is more challenging. This area features insulated copper coils that extend out of the stator or rotor and return to another section of the machine to complete the loop of a single coil. Effective thermal and flow analysis of this basket-like shape does not easily lend itself to well-known solutions. The present study explores the current literature of this type of machine end-windings as related to thermal and flow solutions. Simple correlations are proposed to aid machine designers that would accelerate the design process. These correlations can be used in thermal and fluid network programs to quickly predict flows and temperatures in a machine. Recent work to characterize heat transfer performance from the pressure drop in heat exchangers using the Generalized Leveque Equation can be of particular value for this effort. Finally, simple Computational Fluid Dynamics (CFD) analysis is presented for a simple geometry similar to a single, isolated stator bar.


2010 ◽  
Vol 2010 (HITEC) ◽  
pp. 000289-000296 ◽  
Author(s):  
James D. Scofield ◽  
J. Neil Merrett ◽  
James Richmond ◽  
Anant Agarwal ◽  
Scott Leslie

A custom multi-chip power module packaging was designed to exploit the electrical and thermal performance potential of silicon carbide MOSFETs and JBS diodes. The dual thermo-mechanical package design was based on an aggressive 200°C ambient environmental requirement and 1200 V blocking and 100 A conduction ratings. A novel baseplate-free module design minimizes thermal impedance and the associated device junction temperature rise. In addition, the design incorporates a free-floating substrate configuration to minimize thermal expansion coefficient induced stresses between the substrate and case. Details of the module design and materials selection process will be discussed in addition to highlighting deficiencies in current packaging materials technologies when attempting to achieve high thermal cycle life reliability over an extended temperature range.


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