scholarly journals High CMRR Voltage Mode Instrumentation Amplifier Using a New CMOS Differential Difference Current Conveyor Realization

2020 ◽  
Vol 14 ◽  
Keyword(s):  
Dynamic Range ◽  
Supply Voltage ◽  
Current Source ◽  
Low Noise ◽  
Current Conveyor ◽  
Instrumentation Amplifier ◽  
Wide Bandwidth ◽  
Voltage Mode ◽  
Constant Bias ◽  
Adaptive Biasing

This paper describes a new CMOS realization of differential difference current conveyor circuit. The proposed design offers enhanced characteristics compared to DDCC circuits previously exhibited in the literature. It is characterized by a wide dynamic range with good accuracy thanks to use of adaptive biasing circuit instead of a constant bias current source as well as a wide bandwidth (560 MHz) and a low parasitic resistance at terminal X about 6.86 Ω. A voltage mode instrumentation amplifier circuit (VMIA) composed of a DDCC circuit and two active grounded resistances is shown as application. The proposed VMIA circuit is intended for high frequency applications. This configuration offers significant improvement in accuracy as compared to the state of the art. It is characterized by a controllable gain, a large dynamic range with THD less than 0.27 %, a low noise density (22 nV/Hz1/2) with a power consumption about 0.492 mW and a wide bandwidth nearly 83 MHz. All proposed circuits are simulated by TSPICE using CMOS 0.18 μm TSMC technology with ± 0.8 V supply voltage to verify the theoretical results.

scholarly journals A High Efficiency Low Noise RF-to-DC Converter Employing Gm-Boosting Envelope Detector and Offset Canceled Latch Comparator

Electronics ◽  
2021 ◽  
Vol 10 (9) ◽  
pp. 1078
Author(s):  
Thi Thuy Pham ◽  
Dongmin Kim ◽  
Seo-Hyeong Jeong ◽  
Junghyup Lee ◽  
Donggu Im
Keyword(s):  
Power Consumption ◽  
High Efficiency ◽  
Supply Voltage ◽  
Current Source ◽  
Low Noise ◽  
The Body ◽  
Common Source ◽  
Conversion Gain ◽  
Input Transistor ◽  
Envelope Detector

This work presents a high efficiency RF-to-DC conversion circuit composed of an LC-CL balun-based Gm-boosting envelope detector, a low noise baseband amplifier, and an offset canceled latch comparator. It was designed to have high sensitivity with low power consumption for wake-up receiver (WuRx) applications. The proposed envelope detector is based on a fully integrated inductively degenerated common-source amplifier with a series gate inductor. The LC-CL balun circuit is merged with the core of the envelope detector by sharing the on-chip gate and source inductors. The proposed technique doubles the transconductance of the input transistor of the envelope detector without any extra power consumption because the gate and source voltage on the input transistor operates in a differential mode. This results in a higher RF-to-DC conversion gain. In order to improve the sensitivity of the wake-up radio, the DC offset of the latch comparator circuit is canceled by controlling the body bias voltage of a pair of differential input transistors through a binary-weighted current source cell. In addition, the hysteresis characteristic is implemented in order to avoid unstable operation by the large noise at the compared signal. The hysteresis window is programmable by changing the channel width of the latch transistor. The low noise baseband amplifier amplifies the output signal of the envelope detector and transfers it into the comparator circuit with low noise. For the 2.4 GHz WuRx, the proposed envelope detector with no external matching components shows the simulated conversion gain of about 16.79 V/V when the input power is around the sensitivity of −60 dBm, and this is 1.7 times higher than that of the conventional envelope detector with the same current and load. The proposed RF-to-DC conversion circuit (WuRx) achieves a sensitivity of about −65.4 dBm based on 45% to 55% duty, dissipating a power of 22 μW from a 1.2 V supply voltage.

A Low-Noise, Low-Power, Wide Dynamic Range Logarithmic Amplifier for Biomedical Applications

2018 ◽  
Vol 27 (07) ◽  
pp. 1850104 ◽  
Author(s):  
Yuwadee Sundarasaradula ◽  
Apinunt Thanachayanont
Keyword(s):  
Low Power ◽  
Biomedical Applications ◽  
Dynamic Range ◽  
Supply Voltage ◽  
Low Noise ◽  
Power Supply Voltage ◽  
Wide Dynamic Range ◽  
Dc Offset ◽  
Limiting Amplifier ◽  
Logarithmic Amplifier

This paper presents the design and realization of a low-noise, low-power, wide dynamic range CMOS logarithmic amplifier for biomedical applications. The proposed amplifier is based on the true piecewise linear function by using progressive-compression parallel-summation architecture. A DC offset cancellation feedback loop is used to prevent output saturation and deteriorated input sensitivity from inherent DC offset voltages. The proposed logarithmic amplifier was designed and fabricated in a standard 0.18[Formula: see text][Formula: see text]m CMOS technology. The prototype chip includes six limiting amplifier stages and an on-chip bias generator, occupying a die area of 0.027[Formula: see text]mm2. The overall circuit consumes 9.75[Formula: see text][Formula: see text]W from a single 1.5[Formula: see text]V power supply voltage. Measured results showed that the prototype logarithmic amplifier exhibited an 80[Formula: see text]dB input dynamic range (from 10[Formula: see text][Formula: see text]V to 100[Formula: see text]mV), a bandwidth of 4[Formula: see text]Hz–10[Formula: see text]kHz, and a total input-referred noise of 5.52[Formula: see text][Formula: see text]V.

scholarly journals Monolithic CMOS sensor platform featuring an array of 9’216 carbon-nanotube-sensor elements and low-noise, wide-bandwidth and wide-dynamic-range readout circuitry

2019 ◽  
Vol 279 ◽  
pp. 255-266 ◽  
Author(s):  
Alexandra Dudina ◽  
Florent Seichepine ◽  
Yihui Chen ◽  
Alexander Stettler ◽  
Andreas Hierlemann ◽  
...  
Keyword(s):  
Carbon Nanotube ◽  
Dynamic Range ◽  
Low Noise ◽  
Wide Dynamic Range ◽  
Wide Bandwidth ◽  
Sensor Platform ◽  
Cmos Sensor

LOW-NOISE AND HIGH-BANDWIDTH 0.8 μm CMOS TRANSIMPEDANCE AMPLIFIER FOR OPTICAL RECEIVER CIRCUIT

2005 ◽  
Vol 14 (02) ◽  
pp. 267-279 ◽  
Author(s):  
M. B. GUERMAZ ◽  
L. BOUZERARA ◽  
H. ESCID ◽  
M. T. BELAROUSSI
Keyword(s):  
Dynamic Range ◽  
Supply Voltage ◽  
High Sensitivity ◽  
Low Noise ◽  
Transimpedance Amplifier ◽  
Power Supply Voltage ◽  
Stability Performance ◽  
High Bandwidth ◽  
The Stability ◽  
Transmission Speed

This paper describes and analyzes a low-noise and high-bandwidth transimpedance amplifier featuring a large dynamic range. The designed amplifier is configured on three identical stages that use an active load compensated by an active resistor to improve the stability performance of the amplifier. This topology displays a transimpedance gain of 150 kΩ, which is necessary to obtain a high sensitivity. This structure operates at 5 V power supply voltage, exhibits a gain bandwidth product of 18 THzΩ and a low-noise level of about [Formula: see text]. This transimpedance amplifier can reach a transmission speed of 240 Mb/s for a photocurrent of 0.5 μA. For a photocurrent of 9.5 μA, a transmission speed of 622 Mb/s can be achieved by using an optical fiber connection containing four channels. The predicted performance is verified by simulations using PSPICE and MAGIC tools with 0.8 μm CMOS AMS parameters.

scholarly journals Voltage Differencing Current Conveyor Based Voltage-Mode and Current-Mode Universal Biquad Filters with Electronic Tuning Facility

2021 ◽  
Vol 11 (2) ◽  
pp. 146-160
Author(s):  
Suvajit Roy ◽  
Tapas Kumar Paul ◽  
Saikat Maiti ◽  
Radha Raman Pal
Keyword(s):  
Supply Voltage ◽  
Current Mode ◽  
Current Conveyor ◽  
Pass Band ◽  
Voltage Mode ◽  
Single Output ◽  
Electronic Tuning ◽  
Low Pass ◽  
Single Input ◽  
Band Pass

The objective of this study is to present four new universal biquad filters, two voltage-mode multi-input-single-output (MISO), and two current-mode single-input-multi-output (SIMO). The filters employ one voltage differencing current conveyor (VDCC) as an active element and two capacitors along with two resistors as passive elements. All the five filter responses, i.e., high-pass, low-pass, band-pass, band-stop, and all-pass responses, are obtained from the same circuit topology. Moreover, the pole frequency and quality factor are independently tunable. Additionally, they do not require any double/inverted input signals for response realization. Furthermore, they enjoy low active and passive sensitivities. Various regular analyses support the design ideas. The functionality of the presented filters are tested by PSPICE simulations using TSMC 0.18 µm technology parameters with ± 0.9 V supply voltage. The circuits are also justified experimentally by creating the VDCC block using commercially available OPA860 ICs. The experimental and simulation results agree well with the theoretically predicted results.

Design of Wide Bandwidth, High-CMRR Voltage and Transadmittance-Mode Instrumentation Amplifier Using a Single CBTA

2019 ◽  
Vol 29 (04) ◽  
pp. 2050060
Author(s):  
Mehmet Sagbas ◽  
Umut Engin Ayten
Keyword(s):  
High Performance ◽  
Supply Voltage ◽  
High Gain ◽  
Instrumentation Amplifier ◽  
Cmos Process ◽  
Wide Bandwidth ◽  
Current Output ◽  
Transconductance Amplifier ◽  
Low Offset ◽  
Electronically Tunable

In this work, a high-performance voltage and current output instrumentation amplifier circuit is proposed. The proposed circuit also has voltage-mode (VM) and transadmittance-mode (TAM) outputs at a time. It employs a single current backward transconductance amplifier (CBTA) and a grounded resistor. It has the advantage of having low input and high output impedances which makes it easy for cascadability. The presented circuit has electronically tunable property due to the bias current of the CBTA. The validity of the proposed circuit is demonstrated by PSPICE simulations using a 0.18[Formula: see text][Formula: see text]m CMOS process with [Formula: see text][Formula: see text]V supply voltage. Simulation results show that the proposed circuit has a high common mode rejection ratio (CMRR), wide bandwidth, low offset and high gain properties.

scholarly journals A New Proposal for OFCC-based Instrumentation Amplifier

2017 ◽  
Vol 7 (1) ◽  
pp. 134 ◽  
Author(s):  
Deva Nand ◽  
Neeta Pandey
Keyword(s):  
Tracking Error ◽  
Current Conveyor ◽  
Experimental Results ◽  
Instrumentation Amplifier ◽  
Voltage Mode ◽  
Second Stage ◽  
Voltage Difference ◽  
High Impedance ◽  
Operational Floating Current Conveyor ◽  
Two Stages

This contribution puts forward a new voltage mode instrumentation amplifier (VMIA) based on operational floating current conveyor (OFCC). It presents high impedance at input terminals and provides output at low impedance making the proposal ideal for voltage mode operation. The proposed VMIA architecture has two stages - the first stage comprises of two OFCCs to sense input voltages and coverts the voltage difference to current while the second stage has single OFCC that converts the current to voltage. In addition it employs two resistors to provide gain and imposes no condition on the values of resistors.  The behavior of the proposed structure is also analyzed for OFCC non idealities namely finite transimpedance and tracking error. The proposal is verified through SPICE simulations using CMOS based schematic of OFCC. Experimental results, by bread boarding it using commercially available IC AD844, are also included.

scholarly journals A Chopper Stabilization Audio Instrumentation Amplifier for IoT Applications

2020 ◽  
Vol 10 (2) ◽  
pp. 13 ◽  
Author(s):  
Jamel Nebhen ◽  
Pietro M. Ferreira ◽  
Sofiene Mansouri
Keyword(s):  
Power Consumption ◽  
Silicon Nanowires ◽  
Supply Voltage ◽  
Complementary Metal Oxide Semiconductor ◽  
Low Noise ◽  
Oxide Semiconductor ◽  
Instrumentation Amplifier ◽  
Chopper Stabilization ◽  
Iot Applications ◽  
Trade Offs

A low-noise instrumentation amplifier dedicated to a nano- and micro-electro-mechanical system (M&NEMS) microphone for the use in Internet of Things (IoT) applications is presented. The piezoresistive sensor and the electronic interface are respectively, silicon nanowires and an instrumentation amplifier. To design an instrumentation amplifier for IoT applications, different trade-offs are discussed like power consumption, gain, noise and sensitivity. Because the most critical noisy block is the amplifier, a delay-time chopper stabilization (CHS) technique is implemented around it to eliminate its offset and 1/f noise. The low-noise instrumentation amplifier is implemented in a 65-nm CMOS (Complementary metal–oxide–semiconductor) technology. The supply voltage is 2.5 V while the power consumption is 0.4 mW and the core area is 1 mm2. The circuit of the M&NEMS microphone and the amplifier was fabricated and measured. From measurement results over a signal bandwidth of 20 kHz, it achieves a signal-to-noise ratio (SNR) of 77 dB.

Sign in / Sign up

Export Citation Format

Share Document