Stress Reduction of Amorphous Silicon Deposited by PECVD

2016 ◽  
Vol 1812 ◽  
pp. 109-116
Author(s):  
César B. Pérez ◽  
C. Reyes-Betanzo

ABSTRACTAmorphous silicon (α-Si) was deposited on glass substrates by PECVD at different deposition conditions in order to characterize the residual stress on the film. Subsequently, a thermal-annealing was applied for different times at 400 °C in a N2 atmosphere, aiming to reduce the stress in the films. The deposition power was between 15 and 30 W at 13.56 MHz, the pressure in the chamber was adjusted in a range from 600 to 900 mTorr, and the temperature was varied from 140 to 200 °C. The stress was determined by using the Stoney equation, measuring the curvature and thickness of the α-Si films with a stylus profilometer. A deposition rate between 7-24 nm/min was obtained, and the time for thermal-annealing needed to reduce the stress was reduced from 10 to 2-4 h, obtaining a minimum compressive stress of 17 MPa. With this value of stress, it was possible to use the α-Si as masking material for wet etching of glass during the manufacturing of microfluidic devices, in order to obtain microstructures in the glass with 150 μm in depth.

2008 ◽  
Vol 516 (5) ◽  
pp. 600-603 ◽  
Author(s):  
Keisuke Ohdaira ◽  
Yuki Abe ◽  
Makoto Fukuda ◽  
Shogo Nishizaki ◽  
Noritaka Usami ◽  
...  

2000 ◽  
Vol 609 ◽  
Author(s):  
Chingwen Yeh ◽  
James B. Boyce ◽  
Jackson Ho ◽  
Rachel Lau

ABSTRACTA new process of surface micromachining has been developed, where amorphous silicon (a-Si) and oxynitride films are used as structural and sacrificial layers on the glass substrate, respectively. Due to glass as the substrate material, the temperatures for all process steps need to be lower than 600°C. Some generic mechanical microstructures such as cantilever beams, bridges, and membranes have been fabricated. The stress changes of a-Si films with annealing temperatures are studied. It is found that the residual stress can be minimized using thermal annealing at 430°C for a few hours. In addition, some process issues such as a-Si film bubbling, the film adhesion of a-Si to the glass substrate, and stiction during structure release are discussed.


1989 ◽  
Vol 65 (5) ◽  
pp. 2069-2072 ◽  
Author(s):  
R. Kakkad ◽  
J. Smith ◽  
W. S. Lau ◽  
S. J. Fonash ◽  
R. Kerns

2010 ◽  
Vol 428-429 ◽  
pp. 540-543
Author(s):  
Rui Min Jin ◽  
Lan Li Chen ◽  
Peng Hui Luo ◽  
Xin Feng Guo ◽  
Jing Xiao Lu

Amorphous silicon films prepared by PECVD on glass substrate have been crystallized by rapid thermal annealing (RTA). By means of micro-Raman scattering and scanning electronic microscope (SEM), the quantum states in these processions are found and discussed.


2003 ◽  
Vol 762 ◽  
Author(s):  
Hwang Huh ◽  
Jung H. Shin

AbstractAmorphous silicon (a-Si) films prepared on oxidized silicon wafer were crystallized to a highly textured form using contact printing of rolled and annealed nickel tapes. Crystallization was achieved by first annealing the a-Si film in contact with patterned Ni tape at 600°C for 20 min in a flowing forming gas (90 % N2, 10 % H2) environment, then removing the Ni tape and further annealing the a-Si film in vacuum for2hrsat600°C. An array of crystalline regions with diameters of up to 20 μm could be formed. Electron microscopy indicates that the regions are essentially single-crystalline except for the presence of twins and/or type A-B formations, and that all regions have the same orientation in all 3 directions even when separated by more than hundreds of microns. High resolution TEM analysis shows that formation of such orientation-controlled, nearly single crystalline regions is due to formation of nearly single crystalline NiSi2 under the point of contact, which then acts as the template for silicide-induced lateral crystallization. Furthermore, the orientation relationship between Si grains and Ni tape is observed to be Si (110) || Ni (001)


2012 ◽  
Vol 1426 ◽  
pp. 331-337
Author(s):  
Hiroshi Noge ◽  
Akira Okada ◽  
Ta-Ko Chuang ◽  
J. Greg Couillard ◽  
Michio Kondo

ABSTRACTWe have succeeded in the rapid epitaxial growth of Si, Ge, and SiGe films on Si substrates below 670 ºC by reactive CVD utilizing the spontaneous exothermic reaction between SiH4, GeH4, and F2. Mono-crystalline SiGe epitaxial films with Ge composition ranging from 0.1 to 1.0 have been successfully grown by reactive CVD for the first time.This technique has also been successfully applied to the growth of these films on silicon-on-glass substrates by a 20 - 50 ºC increase of the heating temperature. Over 10 μm thick epitaxial films at 3 nm/s growth rate are obtained. The etch pit density of the 5.2 μm-thick Si0.5Ge0.5 film is as low as 5 x 106 cm-2 on top. Mobilities of the undoped SiGe and Si films are 180 to 550 cm2/Vs, confirming the good crystallinity of the epitaxial films.


Micromachines ◽  
2021 ◽  
Vol 12 (4) ◽  
pp. 429
Author(s):  
Tengyun Liu ◽  
Peiqi Ge ◽  
Wenbo Bi

Lower warp is required for the single crystal silicon wafers sawn by a fixed diamond wire saw with the thinness of a silicon wafer. The residual stress in the surface layer of the silicon wafer is the primary reason for warp, which is generated by the phase transitions, elastic-plastic deformation, and non-uniform distribution of thermal energy during wire sawing. In this paper, an experiment of multi-wire sawing single crystal silicon is carried out, and the Raman spectra technique is used to detect the phase transitions and residual stress in the surface layer of the silicon wafers. Three different wire speeds are used to study the effect of wire speed on phase transition and residual stress of the silicon wafers. The experimental results indicate that amorphous silicon is generated during resin bonded diamond wire sawing, of which the Raman peaks are at 178.9 cm−1 and 468.5 cm−1. The ratio of the amorphous silicon surface area and the surface area of a single crystal silicon, and the depth of amorphous silicon layer increases with the increasing of wire speed. This indicates that more amorphous silicon is generated. There is both compressive stress and tensile stress on the surface layer of the silicon wafer. The residual tensile stress is between 0 and 200 MPa, and the compressive stress is between 0 and 300 MPa for the experimental results of this paper. Moreover, the residual stress increases with the increase of wire speed, indicating more amorphous silicon generated as well.


Metals ◽  
2021 ◽  
Vol 11 (1) ◽  
pp. 127
Author(s):  
Zichen Liu ◽  
Xiaodong Hu ◽  
Zhiwei Yang ◽  
Bin Yang ◽  
Jingkai Chen ◽  
...  

In order to clarify the role of different post-weld heat treatment processes in the manufacturing process, welding tests, post-weld heat treatment tests, and finite element analysis (FEA) are carried out for 12C1MoV steel pipes. The simulated temperature field and residual stress field agree well with the measured results, which indicates that the simulation method is available. The influence of post-weld heat treatment process parameters on residual stress reduction results is further analyzed. It is found that the post weld dehydrogenation treatment could not release residual stress obviously. However, the residual stress can be relieved by 65% with tempering treatment. The stress relief effect of “post weld dehydrogenation treatment + temper heat treatment” is same with that of “temper heat treatment”. The higher the temperature, the greater the residual stress reduction, when the peak temperature is at 650–750 °C, especially for the stress concentration area. The longer holding time has no obvious positive effect on the reduction of residual stress.


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