Highly Reliable Thin Hafnium Oxide Gate Dielectric

1999 ◽  
Vol 592 ◽  
Author(s):  
Laegu Kang ◽  
Byoung-Hun Lee ◽  
Wen-Jie Qi ◽  
Yong-Joo Jeon ◽  
Renee Nieh ◽  
...  
Keyword(s):  
Hafnium Oxide ◽  
Interfacial Layer ◽  
Gate Dielectric ◽  
Frequency Dispersion ◽  
Deposition Process ◽  
Oxide Thickness ◽  
Mos Capacitors ◽  
Control Interface ◽  
High Resolution Tem ◽  
The One

ABSTRACTHfO2 is the one of the potential high-k dielectrics for replacing SiO2 as a gate dielectric. HfO2 is thermodynamically stable when in direct contact with Si and has a reasonable band gap (∼5.65eV). In this study, MOS capacitors (Pt/HfO2/Si) were fabricated by depositing HfO2 using reactive DC magnetron sputtering in the range of 33∼135Å followed by Pt deposition. During the HfO2 deposition, O2 flow was modulated to control interface quality and to suppress interfacial layer growing. By optimizing the HfO2 deposition process, equivalent oxide thickness (EOT) can be reduced down to ∼11.2 Å with the leakage current as low as 1X10−2 A/cm2 at +1.0V and negligible frequency dispersion. HfO2 films also show excellent breakdown characteristics and negligible hysteresis after high temperature annealing. From the high resolution TEM, there is a thin interfacial layer after annealing, suggesting a composite of Si-Hf-O with a dielectric constant of ≈ 2 X K SiO2.

Scalability of MOCVD-deposited Hafnium Oxide

2003 ◽  
Vol 765 ◽  
Author(s):  
S. Van Elshocht ◽  
R. Carter ◽  
M. Caymax ◽  
M. Claes ◽  
T. Conard ◽  
...  
Keyword(s):  
Hafnium Oxide ◽  
Interfacial Layer ◽  
Gate Dielectric ◽  
Deposition Process ◽  
Oxide Thickness ◽  
Process Conditions ◽  
Primary Concern ◽  
Gate Electrode ◽  
K Value ◽  
High K

AbstractBecause of aggressive downscaling to increase transistor performance, the physical thickness of the SiO2 gate dielectric is rapidly approaching the limit where it will only consist of a few atomic layers. As a consequence, this will result in very high leakage currents due to direct tunneling. To allow further scaling, materials with a k-value higher than SiO2 (“high-k materials”) are explored, such that the thickness of the dielectric can be increased without degrading performance.Based on our experimental results, we discuss the potential of MOCVD-deposited HfO2 to scale to (sub)-1-nm EOTs (Equivalent Oxide Thickness). A primary concern is the interfacial layer that is formed between the Si and the HfO2, during the MOCVD deposition process, for both H-passivated and SiO2-like starting surfaces. This interfacial layer will, because of its lower k-value, significantly contribute to the EOT and reduce the benefit of the high-k material. In addition, we have experienced serious issues integrating HfO2 with a polySi gate electrode at the top interface depending on the process conditions of polySi deposition and activation anneal used. Furthermore, we have determined, based on a thickness series, the k-value for HfO2 deposited at various temperatures and found that the k-value of the HfO2 depends upon the gate electrode deposited on top (polySi or TiN).Based on our observations, the combination of MOCVD HfO2 with a polySi gate electrode will not be able to scale below the 1-nm EOT marker. The use of a metal gate however, does show promise to scale down to very low EOT values.

Electrical Characteristics of TaOxNy/ZrSixOy Stack Gate Dielectric for MOS Device Applications

2001 ◽  
Vol 670 ◽  
Author(s):  
Hyungsuk Jung ◽  
Hyundoek Yang ◽  
Kiju Im ◽  
Hyunsang Hwang
Keyword(s):  
Interfacial Layer ◽  
Silicon Oxide ◽  
Gate Dielectric ◽  
Oxide Thickness ◽  
Tem Analysis ◽  
Mos Capacitors ◽  
Zirconium Silicate ◽  
Transmission Electron ◽  
High K ◽  
Device Applications

ABSTRACTThis letter describes a unique process for the preparation of high quality tantalum oxynitride (TaOxNy) with zirconium silicate (ZrSixOy) as an interfacial layer for use in gate dielectric applications. Compared with conventional native silicon oxide and oxynitride as an interfacial layer, tantalum oxynitride (TaOxNy) MOS capacitors using zirconium silicate (ZrSixOy) as an interfacial layer exhibit lower leakage current levels at the same equivalent oxide thickness. We were able to confirm TaOxNy/ZrSixOy stack structure by auger electron spectroscopy (AES) and transmission electron microscope (TEM) analysis. The estimated dielectric constant of TaOxNy and ZrSixOywere approximately 67 and 7, respectively. The zirconium silicate is a promising interfacial layer for future high-k gate dielectric applications.

Nitrogen (N2) Implantation to Suppress Growth of Interfacial Oxide in Mocvd Bst and Sputtered Bst Films

1999 ◽  
Vol 567 ◽  
Author(s):  
Renee Nieh ◽  
Wen-Jie Qi ◽  
Yongjoo Jeon ◽  
Byoung Hun Lee ◽  
Aaron Lucas ◽  
...  
Keyword(s):  
Photoelectron Spectroscopy ◽  
Interfacial Layer ◽  
Gate Dielectric ◽  
Nitrogen Concentration ◽  
Chemical Vapor ◽  
Future Generation ◽  
Oxide Thickness ◽  
Layer Growth ◽  
X Ray ◽  
Bst Films

ABSTRACTBa0.5Sr0.5TiO3 (BST) is one of the high-k candidates for replacing SiO2 as the gate dielectric in future generation devices. The biggest obstacle to scaling the equivalent oxide thickness (EOT) of BST is an interfacial layer, SixOy, which forms between BST and Si. Nitrogen (N2) implantation into the Si substrate has been proposed to reduce the growth of this interfacial layer. In this study, capacitors (Pt/BST/Si) were fabricated by depositing thin BST films (50Å) onto N2 implanted Si in order to evaluate the effects of implant dose and annealing conditions on EOT. It was found that N2 implantation reduced the EOT of RF magnetron sputtered and Metal Oxide Chemical Vapor Deposition (MOCVD) BST films by ∼20% and ∼33%, respectively. For sputtered BST, an implant dose of 1×1014cm−;2 provided sufficient nitrogen concentration without residual implant damage after annealing. X-ray photoelectron spectroscopy data confirmed that the reduction in EOT is due to a reduction in the interfacial layer growth. X-ray diffraction spectra revealed typical polycrystalline structure with (111) and (200) preferential orientations for both films. Leakage for these 50Å BST films is on the order of 10−8 to 10−5 A/cm2—lower than oxynitrides with comparable EOTs.

Characterization of LaxHfyO Gate Dielectrics in 4H-SiC MOS Capacitor

2014 ◽  
Vol 778-780 ◽  
pp. 549-552 ◽  
Author(s):  
Jing Hua Xia ◽  
David M. Martin ◽  
Sethu Saveda Suvanam ◽  
Carl Mikael Zetterling ◽  
Mikael Östling
Keyword(s):  
Gate Dielectric ◽  
Gate Dielectrics ◽  
Atomic Layer ◽  
Deposition Process ◽  
Mos Capacitors ◽  
Mos Capacitor ◽  
Layer Deposition ◽  
High K ◽  
Film Characteristics

LaxHfyO nanolaminated thin film deposited using atomic layer deposition process has been studied as a high-K gate dielectric in 4H-SiC MOS capacitors. The electrical and nano-laminated film characteristics were studied with increasing post deposition annealing (PDA) in N2O ambient. The result shows that high quality LaxHfyO nano-laminated thin films with good interface and bulk qualities are fabricated using high PDA temperature.

An Advanced High-k Transistor Utilizing Metal-Organic Precursors in an ALD Deposition of Hafnium Oxide and Hafnium Silicate with Ozone as Oxidizer

2004 ◽  
Vol 811 ◽  
Author(s):  
J. Gutt ◽  
G.A. Brown ◽  
Yoshi Senzaki ◽  
Seung Park
Keyword(s):  
Hafnium Oxide ◽  
High Performance ◽  
Gate Dielectric ◽  
Electrical Characterization ◽  
Atomic Layer ◽  
Oxide Thickness ◽  
Cmos Technology ◽  
Hafnium Silicate ◽  
High K ◽  
Metal Organic

AbstractThe International Technology Roadmap for Semiconductors (ITRS) has projected that continued scaling of planar CMOS technology to the 65nm node and beyond will require development of high-k films for transistor gate dielectric applications to allow further scaling of overall device sizes according to Moore's Law [1]. Researchers have recently been studying hafnium-based high-k dielectrics as an alternative to SiO2 [2]. The method of deposition of these films has been found to impact the applicability of the films for both low standby power and high performance applications [3]. Atomic Layer Deposition (ALD) has been among the more widely studied deposition techniques for these films, but previous work has emphasized ALD utilizing inorganic precursors [4]. In this paper, we shall describe a process in which hafnium oxide and hafnium silicate films were deposited from alternating pulses of volatile metal-organic Hf/Si liquid precursors and ozone on 200mm diameter Si substrates using a single wafer ALD system. Electrical characterization of the films is presented, including equivalent oxide thickness (EOT), gate leakage, and electron mobility data, showing an achievement of EOT's ranging from 1.19 to 1.69 nm with high field mobilities from 74% to more than 90% of that of SiO2 (2.1 nm film), and Jg in the range of 80mA to 3 A/cm2.

Growth and Physical Properties of MOCVD-Deposited Hafnium Oxide Films and Their Properties on Silicon

2002 ◽  
Vol 745 ◽  
Author(s):  
S. Van Elshocht ◽  
M. Caymax ◽  
S. De Gendt ◽  
T. Conard ◽  
J. Pétry ◽  
...  
Keyword(s):  
Physical Properties ◽  
Hafnium Oxide ◽  
Deposition Temperature ◽  
Chemical Vapor ◽  
Deposition Process ◽  
Oxide Thickness ◽  
State Density ◽  
Organic Chemical ◽  
Organic Contamination ◽  
Metal Organic

ABSTRACTThis paper discusses metal organic chemical vapor deposited (MOCVD) HfO2 layers using tetrakis(diethylamido)hafnium (TDEAH) as precursor. We have studied the influence of the starting surface and deposition temperature on the growth kinetics and physical properties of the HfO2 layers. Important characteristics such as crystalline state, density, and organic contamination in the layers were found to be dependent on these parameters.Typical for this deposition process is the formation of an interfacial layer underneath the high-k layer. Its composition and thickness, affecting scaling of the equivalent oxide thickness, are shown to be closely related to the HfO2 process parameters mentioned above.Finally, we will show electrical results for HfO2/polySi gate stacks indicating the effect for deposition temperature.

Evaluation of Candidate Metals for Dual-Metal Gate CMOS with HfO2 Gate Dielectric

2002 ◽  
Vol 716 ◽  
Author(s):  
S.B. Samavedam ◽  
J.K. Schaeffer ◽  
D.C. Gilmer ◽  
V. Dhandapani ◽  
P.J. Tobin ◽  
...  
Keyword(s):  
Thermal Stability ◽  
Gate Dielectric ◽  
Oxide Thickness ◽  
Metal Gate ◽  
Mos Capacitors ◽  
Dielectric Thickness ◽  
Metal Gates ◽  
Polysilicon Gate ◽  
Dual Metal ◽  
High Dielectric

AbstractAs the MOSFET gate lengths are scaled down to 50 nm or below, the expected increase in gate leakage will be countered by the use of a high dielectric constant (high K) material. The series capacitance from polysilicon gate electrode depletion significantly reduces the gate capacitance as the dielectric thickness is scaled down to 10 Å equivalent oxide thickness (EOT) or below. Metal gates promise to solve this problem and address other problems like boron penetration and enhanced gate resistance that will have increased focus as the polysilicon gate thickness is reduced. Extensive simulations have shown that the optimal gate work-functions for the sub-50 nm channel lengths should be 0.2 eV below (above) the conduction (valence) band edge of silicon for n-MOSFETs (p-MOSFETs). This study summarizes the evaluations of TiN, TaSiN, WN, TaN, TaSi, Ir and IrO2 as candidate metals for dual-metal gate CMOS using HfO2 as the gate dielectric. The gate work-function was determined by fabricating MOS capacitors with varying dielectric thicknesses and different post-gate anneals. The metal-dielectric compatibility and thermal stability was studied by annealing the stacks at different temperatures. The gate stacks were characterized using TEM, SIMS and X-ray diffraction. Based on workfunctions and thermal stability, TaSiN and TaN show most promise as metal electrodes for HfO2 n-MOSFETs.

Ultrathin HfO2 gate dielectric grown by plasma-enhanced chemical vapor deposition using Hf[OC(CH3)3]4 as a precursor in the absence of O2

2003 ◽  
Vol 18 (1) ◽  
pp. 60-65 ◽  
Author(s):  
Kyu-Jeong Choi ◽  
Woong-Chul Shin ◽  
Soon-Gil Yoon
Keyword(s):  
Chemical Vapor Deposition ◽  
Vapor Deposition ◽  
Hafnium Oxide ◽  
Annealing Temperature ◽  
Gate Dielectric ◽  
Important Determinant ◽  
Chemical Vapor ◽  
Oxide Thickness ◽  
Equivalent Oxide Thickness ◽  
Current Densities

Hafnium oxide thin films for use in a gate dielectric were deposited at 300 °C on p-type Si(100) substrates using a Hf[OC(CH3)3]4 precursor in the absence of oxygen by plasma-enhanced chemical vapor deposition. A comparison of films deposited in the absence and presence of oxygen indicated that oxygen was an important determinant in the electrical properties of HfO2 films, which were subsequently annealed in N2 and O2 ambients. The capacitance equivalent oxide thickness of the as-deposited Pt/HfO2/Si capacitor was approximately 17 Å and abruptly increased at an annealing temperature of 800 °C in both N2 and O2 ambients. The hysteresis of the as-deposited gate dielectric was quite small, about 40 mV, and that of the gate dielectric annealed at 800 °C in an O2 ambient was reduced to a negligible level, about 20 mV. The interface trap density of the Pt/HfO2/Si capacitors was approximately 1012 eV−1 cm−2 near the silicon midgap. The leakage current densities of the as-deposited Pt/HfO2/Si capacitor and those annealed at 800 °C in N2 and O2 were approximately 8 × 10−4, 8 × 10−5, and 3 × 10−7 A/cm2 at –1 V, respectively.

Control of the Interfacial Layer Thickness in Hafnium Oxide Gate Dielectric Grown by PECVD

2003 ◽  
Vol 150 (4) ◽  
pp. F75 ◽  
Author(s):  
Kyu-Jeong Choi ◽  
Jong-Bong Park ◽  
Soon-Gil Yoon
Keyword(s):  
Layer Thickness ◽  
Hafnium Oxide ◽  
Interfacial Layer ◽  
Gate Dielectric

Interfacial layer bonding and Dielectric properties of Hf-O-N gate dielectric thin films

2006 ◽  
Vol 917 ◽  
Author(s):  
Karthik Ramani ◽  
Chad Robert Essary ◽  
Valentin Craciun ◽  
Rajiv K Singh
Keyword(s):  
Thin Films ◽  
Interfacial Layer ◽  
Gate Dielectric ◽  
Electrical Response ◽  
Ultra Violet ◽  
Oxide Thickness ◽  
Dielectric Thin Films ◽  
Nitrogen Doped ◽  
Ultra Violet Radiation

AbstractThe electrical response and interfacial layer characterization of nitrogen doped HfO2 gate dielectric thin films are reported. The films were processed at relatively low temperature (~ 400 0C) by pulsed laser deposition and ultra-violet radiation assisted oxidation technique. Nitrogen incorporation in the hafnia films led to O-N and Hf-Si-O-N bonding in the bulk and at hafnia-Si interface respectively. The nitrogen doped hafnia films exhibited a leakage current density lower than 10E-5 A/sq cm at -1 V and a simulated equivalent oxide thickness of 9.4 Å.

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