Investigation of Using Contact and Non-contact Printing Technologies For Organic Transistor Fabrication

2002 ◽  
Vol 725 ◽  
Author(s):  
Jie Zhang ◽  
Paul Brazis ◽  
A. Roy Chowdhuri ◽  
John Szczech ◽  
Dan Gamota
Keyword(s):  
Integrated Circuits ◽  
Process Development ◽  
Field Effect Transistors ◽  
Low Cost ◽  
High Volume ◽  
Electrical Performance ◽  
Organic Polymer ◽  
Personal Area Networks ◽  
Material System ◽  
Contact Printing

AbstractLow cost, high volume manufacturing processes are envisioned for solution processable organic semiconductor integrated circuits (IC) fabrication. The organic IC may be the low cost solution for driving electronic devices, i.e. smart cards, RFID tags, flexible displays, personal area networks, and body area networks. This study investigated the manufacturability of organic electronics (organic field effect transistors (OFETs), organic light emitting diodes (OLEDs), etc.) using commercially available printing technologies and materials systems qualified for use in microelectronic products. The evaluated contact printing technologies were pad printing and screen-printing; the non-contact printing technologies were ink jetting and micro dispensing. The material system selection for transistor structures and active layers was based on printing technology requirements and commercial availability. The materials were polymer thick film conductors and insulators, conductive nano-particle suspensions, and organic polymer systems. A series of material property characterization and printing process development studies were conducted. Several OFET designs were created and functional all printed organic transistors were demonstrated. The device electrical performance was characterized.

scholarly journals Lithography for enabling advances in integrated circuits and devices

2012 ◽  
Vol 370 (1973) ◽  
pp. 4015-4041 ◽  
Author(s):  
C. Michael Garner
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Extreme Ultraviolet ◽  
Field Effect Transistors ◽  
Semiconductor Industry ◽  
High Volume ◽  
Pattern Transfer ◽  
Time Pattern ◽  
Technology Roadmap ◽  
The Future

Because the transistor was fabricated in volume, lithography has enabled the increase in density of devices and integrated circuits. With the invention of the integrated circuit, lithography enabled the integration of higher densities of field-effect transistors through evolutionary applications of optical lithography. In 1994, the semiconductor industry determined that continuing the increase in density transistors was increasingly difficult and required coordinated development of lithography and process capabilities. It established the US National Technology Roadmap for Semiconductors and this was expanded in 1999 to the International Technology Roadmap for Semiconductors to align multiple industries to provide the complex capabilities to continue increasing the density of integrated circuits to nanometre scales. Since the 1960s, lithography has become increasingly complex with the evolution from contact printers, to steppers, pattern reduction technology at i-line, 248 nm and 193 nm wavelengths, which required dramatic improvements of mask-making technology, photolithography printing and alignment capabilities and photoresist capabilities. At the same time, pattern transfer has evolved from wet etching of features, to plasma etch and more complex etching capabilities to fabricate features that are currently 32 nm in high-volume production. To continue increasing the density of devices and interconnects, new pattern transfer technologies will be needed with options for the future including extreme ultraviolet lithography, imprint technology and directed self-assembly. While complementary metal oxide semiconductors will continue to be extended for many years, these advanced pattern transfer technologies may enable development of novel memory and logic technologies based on different physical phenomena in the future to enhance and extend information processing.

Material Systems Used by Micro Dispensing and Ink Jetting Technologies

2000 ◽  
Vol 624 ◽  
Author(s):  
Jie Zhang ◽  
Irina Shmagin ◽  
James Skinner ◽  
John Szczech ◽  
Daniel Gamota
Keyword(s):  
Transmission Lines ◽  
Flexible Manufacturing ◽  
Low Cost ◽  
High Volume ◽  
Deposition Process ◽  
Electrical Performance ◽  
Direct Writing ◽  
Environmental Conditioning ◽  
Process Characterization ◽  
Material Systems

ABSTRACTIn today's electronic industry, manufacturers are continuously improving capital utilization, developing flexible manufacturing processes, reduce changeover time and improving yield and throughput. Interest in rapid prototyping and 3-D fabrication capabilities are rapidly increasing, and a number of candidate direct writing technologies are in development to meet these demands.This work studies material systems used by data driven materials deposition (DDMD) technologies for potential low temperature reel-to-reel high volume manufacturing on low cost substrates. Characterization results of fabricated discrete and RF devices using commercially available micro dispensing and ink jet systems will be discussed. Material rheological properties, deposition process characterization, deposition repeatability, fabricated device reliability and electrical performance will be presented. The test vehicles contain resistors and capacitors, transmission lines, open and short series stub filters, and half-wavelength resonators. The material/substrate compatibility will be demonstrated through environmental conditioning of the test vehicles. In addition, a cost estimate for using micro dispensing technologies was conducted to compare current manufacturing technologies to DDMD.

scholarly journals Research Progress on Flexible Oxide-Based Thin Film Transistors

2019 ◽  
Vol 9 (4) ◽  
pp. 773 ◽  
Author(s):  
Lirong Zhang ◽  
Wenping Xiao ◽  
Weijing Wu ◽  
Baiquan Liu
Keyword(s):  
Thin Film ◽  
Integrated Circuits ◽  
Thin Film Transistors ◽  
Carrier Transport ◽  
Low Cost ◽  
Oxide Semiconductor ◽  
Electrical Performance ◽  
Research Progress ◽  
Stress Effect ◽  
Radiofrequency Identification

Oxide semiconductors have drawn much attention in recent years due to their outstanding electrical performance, such as relatively high carrier mobility, good uniformity, low process temperature, optical transparency, low cost and especially flexibility. Flexible oxide-based thin film transistors (TFTs) are one of the hottest research topics for next-generation displays, radiofrequency identification (RFID) tags, sensors, and integrated circuits in the wearable field. The carrier transport mechanism of oxide semiconductor materials and typical device configurations of TFTs are firstly described in this invited review. Then, we describe the research progress on flexible oxide-based TFTs, including representative TFTs fabricated on different kinds of flexible substrates, the mechanical stress effect on TFTs and optimized methods to reduce this effect. Finally, an outlook for the future development of oxide-based TFTs is given.

scholarly journals Conformally Gated Surface Conducting Behaviors of Single-Walled Carbon Nanotube Thin-Film-Transistors

Materials ◽  
2021 ◽  
Vol 14 (12) ◽  
pp. 3361
Author(s):  
Kyung-Tae Kim ◽  
Keon Woo Lee ◽  
Sanghee Moon ◽  
Joon Bee Park ◽  
Chan-Yong Park ◽  
...  
Keyword(s):  
Field Effect ◽  
Carrier Transport ◽  
Field Effect Transistors ◽  
Low Cost ◽  
Cost Effective ◽  
Electrical Performance ◽  
Solution Synthesis ◽  
Large Area ◽  
Element Analysis ◽  
Single Walled Carbon

Semiconducting single-walled carbon nanotubes (s-SWCNTs) have gathered significant interest in various emerging electronics due to their outstanding electrical and mechanical properties. Although large-area and low-cost fabrication of s-SWCNT field effect transistors (FETs) can be easily achieved via solution processing, the electrical performance of the solution-based s-SWCNT FETs is often limited by the charge transport in the s-SWCNT networks and interface between the s-SWCNT and the dielectrics depending on both s-SWCNT solution synthesis and device architecture. Here, we investigate the surface and interfacial electro-chemical behaviors of s-SWCNTs. In addition, we propose a cost-effective and straightforward process capable of minimizing polymers bound to s-SWCNT surfaces acting as an interfering element for the charge carrier transport via a heat-assisted purification (HAP). With the HAP treated s-SWCNTs, we introduced conformal dielectric configuration for s-SWCNT FETs, which are explored by a carefully designed wide array of electrical and chemical characterizations with finite-element analysis (FEA) computer simulation. For more favorable gate-field-induced surface and interfacial behaviors of s-SWCNT, we implemented conformally gated highly capacitive s-SWCNT FETs with ion-gel dielectrics, demonstrating field-effect mobility of ~8.19 cm2/V⋅s and on/off current ratio of ~105 along with negligible hysteresis.

scholarly journals Advances in Low Cost Silver-Containing Thick Film Conductors

1981 ◽  
Vol 9 (1) ◽  
pp. 67-85 ◽  
Author(s):  
Barry E. Taylor ◽  
John J. Felten ◽  
Samuel J. Horowitz ◽  
John R. Larry ◽  
Richard M. Rosenberg
Keyword(s):  
High Temperature ◽  
Integrated Circuits ◽  
Thick Film ◽  
High Speed ◽  
High Performance ◽  
Low Cost ◽  
High Volume ◽  
Film Material ◽  
Advantages And Disadvantages ◽  
Thick Film Technology

Extensive use of thick film materials to manufacture resistor networks and hybrid integrated circuits has come about because of economic, processing and functional advantages over other technologies in the high volume production of miniaturized circuits. Inherent in the adoption of thick film technology for increasingly diverse applications has been the ability of thick film material suppliers to provide progressive performance improvements at lower cost concurrent with circuit manufacturer's needs. Since the first major commercial thick film adoption in the early sixties, when IBM adopted platinum gold conductors and palladium silver resistors in their 360 computers, rapid technological advances over the last decade have produced an increasing variety of hybrid circuits and networks. The wide adoption of thick film technology in all segments of the electronic industry has placed increasing demands on performance and processing latitude. This paper outlines the development of low cost silver-bearing conductors and describes the evolution of technology improvements to present day systems. The initial segment reviews the deficiencies of early Pd/Ag conductors, particularly solder leach resistance and degradation of soldered adhesion following high temperature storage, and focuses on the first Pd/Ag system which overcame these problems. Extension of this technology and subsequent improvements in both binders and vehicles to fulfill adhesion requirements to Al2O3substrates of varying chemistries and to meet demands for high speed printing are also described. The second segment gives an overview of the present understanding of thick film conductor composites from a mechanistic point of view. The various types of binder systems commonly employed in conductors are discussed in terms of how they effect a bond between the sintered metal and the substrate, and the advantages and disadvantages of each type. Metallurgical aspects of conductor/solder connections are considered and their effects on bond reliability following exposure to high temperature discussed. Rheological considerations of paste design are presented and related to printing performance. The final segment focuses on newer low cost, high performance material systems that have evolved over the past two years. The technologies of each system are reviewed in terms of metallurgy, binder and vehicle. Important functional properties are presented to illustrate cost/performance tradeoffs. Special emphasis is given to recently developed high Ag containing conductors which have outstanding soldered adhesion even after 1000 hours of storage at 150℃.

scholarly journals Ultra-Low Power and High-Throughput SRAM Design to Enhance AI Computing Ability in Autonomous Vehicles

Electronics ◽  
2021 ◽  
Vol 10 (3) ◽  
pp. 256
Author(s):  
Youngbae Kim ◽  
Shreyash Patel ◽  
Heekyung Kim ◽  
Nandakishor Yadav ◽  
Kyuwon Ken Choi
Keyword(s):  
Integrated Circuits ◽  
Power Consumption ◽  
Low Power ◽  
High Throughput ◽  
Autonomous Vehicles ◽  
Field Effect Transistors ◽  
State Of The Art ◽  
Electrical Performance ◽  
Large Area ◽  
Ultra Low Power

Power consumption and data processing speed of integrated circuits (ICs) is an increasing concern in many emerging Artificial Intelligence (AI) applications, such as autonomous vehicles and Internet of Things (IoT). Existing state-of-the-art SRAM architectures for AI computing are highly accurate and can provide high throughput. However, these SRAMs have problems that they consume high power and occupy a large area to accommodate complex AI models. A carbon nanotube field-effect transistors (CNFET) device has been reported as a potential candidates for AI devices requiring ultra-low power and high-throughput due to their satisfactory carrier mobility and symmetrical, good subthreshold electrical performance. Based on the CNFET and FinFET device’s electrical performance, we propose novel ultra-low power and high-throughput 8T SRAMs to circumvent the power and the throughput issues in Artificial Intelligent (AI) computation for autonomous vehicles. We propose two types of novel 8T SRAMs, P-Latch N-Access (PLNA) 8T SRAM structure and single-ended (SE) 8T SRAM structure, and compare the performance with existing state-of-the-art 8T SRAM architectures in terms of power consumption and speed. In the SRAM circuits of the FinFET and CNFET, higher tube and fin numbers lead to higher operating speed. However, the large number of tubes and fins can lead to larger area and more power consumption. Therefore, we optimize the area by reducing the number of tubes and fins without compromising the memory circuit speed and power. Most importantly, the decoupled reading and writing of our new SRAMs cell offers better low-power operation due to the stacking of device in the reading part, as well as achieving better readability and writability, while offering read Static Noise Margin (SNM) free because of isolated reading path, writing path, and greater pull up ratio. In addition, the proposed 8T SRAMs show even better performance in delay and power when we combine them with the collaborated voltage sense amplifier and independent read component. The proposed PLNA 8T SRAM can save 96%, while the proposed SE 8T SRAM saves around 99% in writing power consumption compared with the existing state-of-the-art 8T SRAM in FinFET model, as well as 99% for writing operation in CNFET model.

Accelerating Laboratory Thin Film Photovoltaic Innovation into Commercial Production

2009 ◽  
Vol 1165 ◽  
Author(s):  
Fred H. Seymour
Keyword(s):  
Thin Film ◽  
Alternative Energy ◽  
Process Development ◽  
Low Cost ◽  
Scale Up ◽  
High Volume ◽  
Commercial Production ◽  
Laboratory Research ◽  
Small Scale ◽  
Managing Risk

AbstractAlternative energy sources such as thin film photovoltaics can be accelerated by improving the rapid and successful transition from laboratory research innovation to commercial production. Most laboratory research and development is on a small scale and its production is in small volumes. It focuses on exploration, discovery, and understanding. When the successful innovation is commercialized, both the scale and the volume increase dramatically and the focus shifts to performance, reliability, yield and cost. This transformation can be accelerated by closely managing risk and by integrating the equipment design and the process development. Also, the cadmium telluride photovoltaic technology has properties that make it more amenable to rapid scale up to low cost and high volume manufacturing.

scholarly journals A new era of semiconductor genetics using ion-sensitive field-effect transistors: the gene-sensitive integrated cell

2014 ◽  
Vol 372 (2012) ◽  
pp. 20130112 ◽  
Author(s):  
Christofer Toumazou ◽  
Tan Sri Lim Kok Thay ◽  
Pantelis Georgiou
Keyword(s):  
Integrated Circuits ◽  
Metal Oxide ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Complementary Metal Oxide Semiconductor ◽  
Metal Oxide Semiconductor ◽  
Consumer Electronics ◽  
Oxide Semiconductor ◽  
Electrical Performance ◽  
Label Free

Semiconductor genetics is now disrupting the field of healthcare owing to the rapid parallelization and scaling of DNA sensing using ion-sensitive field-effect transistors (ISFETs) fabricated using commercial complementary metal -oxide semiconductor technology. The enabling concept of DNA reaction monitoring introduced by Toumazou has made this a reality and we are now seeing relentless scaling with Moore's law ultimately achieving the $100 genome. In this paper, we present the next evolution of this technology through the creation of the gene-sensitive integrated cell (GSIC) for label-free real-time analysis based on ISFETs. This device is derived from the traditional metal-oxide semiconductor field-effect transistor (MOSFET) and has electrical performance identical to that of a MOSFET in a standard semiconductor process, yet is capable of incorporating DNA reaction chemistries for applications in single nucleotide polymorphism microarrays and DNA sequencing. Just as application-specific integrated circuits, which are developed in much the same way, have shaped our consumer electronics industry and modern communications and memory technology, so, too, do GSICs based on a single underlying technology principle have the capacity to transform the life science and healthcare industries.

Recent Progress in AlGaN/GaN Based Optoelectronic Devices

1995 ◽  
Vol 395 ◽  
Author(s):  
M. A. Khan ◽  
Q. Chen ◽  
C. J. Sun ◽  
J. W. Yang ◽  
M. S. Shur
Keyword(s):  
Integrated Circuits ◽  
Field Effect ◽  
High Performance ◽  
Field Effect Transistors ◽  
Optoelectronic Devices ◽  
Material System ◽  
Light Emitting ◽  
Ultraviolet Detectors ◽  
Heterostructure Field Effect Transistors ◽  
Gan Heterostructure

ABSTRACTWe review our recent results on GaN based optoelectronic devices, which include InGaN-AlGaN Light Emitting Diodes (LEDs), GaN photoconductive, Schottky barrier, and p-n junction ultraviolet detectors, and optoelectronic AlGaN-GaN Heterostructure Field Effect Transistors. GaN-based optoelectronic devices cover a wide spectral range and demonstrate visible blind operation. A high quality of the epitaxial layers, the recent development of high performance GaN-based heterostructure field effect transistors, and transparent substrates make this material system uniquely suited for optoelectronic integrated circuits operating in visible and ultraviolet range.

Solution-Based Fabrication of P-Channel and N-Channel Thin-Film Transistors Using Random and Aligned Carbon Nanotube Networks

2012 ◽  
Author(s):  
Yan Duan ◽  
Jason L. Juhala ◽  
Benjamin W. Griffith ◽  
Vianney J. Uwizeye ◽  
Wei Xue
Keyword(s):  
Integrated Circuits ◽  
Self Assembly ◽  
Control Method ◽  
Field Effect Transistors ◽  
Low Cost ◽  
Logic Gates ◽  
Special Treatment ◽  
Layer By Layer ◽  
Research Fields ◽  
P Type

Since discovered in the early 1990s, single-walled carbon nanotubes (SWNTs) have attracted significant attention for many research fields. In the long term, micro- and nano-electronics are considered to be one of the most valuable applications of SWNTs. The development of the next generation devices involves the mass fabrication and integration of SWNT field-effect transistors (FETs) to form logic gates, which are the basic units of integrated circuits (ICs). To create logic gates, both p- and n-type SWNT FETs are needed. However, the SWNT FETs are typically p-type in air without special treatment, with holes as the majority charge carriers in SWNTs. Here in this paper, we investigate the p-channel and n-channel SWNT FETs using two solution-based fabrication processes. One method is to use layer-by-layer self-assembly to create SWNT random networks and the other is based on dielectrophoresis-aligned SWNTs. A low-cost, easy-to-control method is introduced to convert p-type FETs to n-type. By coating a polyethylenimine (PEI) layer on the surface, the transistor demonstrates the typical n-channel characteristics. The resulting devices are air-stable outside a vacuum or an inert environment. The combination of the simple fabrication methods, easy conversion of the devices, and satisfactory device performance can promote further development of nanotube-based electronics.

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