Evolution and Future Trends of SIMOX Material

MRS Bulletin ◽  
1998 ◽  
Vol 23 (12) ◽  
pp. 25-29 ◽  
Author(s):  
Steve Krause ◽  
Maria Anc ◽  
Peter Roitman
Keyword(s):  
High Temperature ◽  
Low Power ◽  
High Speed ◽  
New Technologies ◽  
Low Voltage ◽  
Semiconductor Industry ◽  
High Energy ◽  
Silicon On Insulator ◽  
High Dose ◽  
High Temperature Annealing

Oxygen-implanted silicon-on-insulator (SOI) material, or SIMOX (separation by implantation of oxygen), is another chapter in the continuing development of new material technologies for use by the semiconductor industry. Building integrated circuits (ICs) in a thin layer of crystalline silicon on a layer of silicon oxide on a silicon substrate has benefits for radiationhard, high-temperature, high-speed, low-voltage, and low-power operation, and for future device designs. Historically the first interest in SIMOX was for radiation-hard electronics for space, but the major application of interest currently is low-power, high-speed, portable electronics. Silicon-on-insulator also avoids the disadvantage of a completely different substrate such as sapphire or gallium arsenide. Formation of a buried-oxide (BOX) layer by high-energy, high-dose, oxygen ion implantation has the advantage that the ion-implant dose can be made extremely precise and extremely uniform. However the silicon and oxide layers are highly damaged after the implant, so high-temperature annealing sequences are required to restore devicequality material. In fact SIMOX process development necessitated the development of new technologies for high-dose implantation and high-temperature annealing.

Precipitation in silicon-on-insulator material during high- temperature annealing

1987 ◽  
Vol 45 ◽  
pp. 254-255
Author(s):  
S. J. Krause ◽  
C. O. Jung ◽  
S.R. Wilson
Keyword(s):  
High Temperature ◽  
Integrated Circuits ◽  
Annealing Time ◽  
High Speed ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
Precipitate Size ◽  
High Dose ◽  
High Temperature Annealing ◽  
Implantation Energy

Silicon-on-insulator (SOI) structure by high dose oxygen implantation (SIMOX) has excellent potential for use in radiation hardened and high speed integrated circuits. Device fabrication in SIMOX requires a high quality superficial Si layer above the buried oxide layer. Previously we reported on the effect of heater temperature, background doping, and annealing cycle on precipitate size, density, and location in the superficial Si layer. Precipitates were not eliminated with our processing conditions, but various authors have recently reported that high temperature annealing of SIMOX, from 1250°C to 1405°C, eliminates virtually all precipitates in the superficial Si layer. However, in those studies there were significant differences in implantation energy and dose and also annealing time and temperature. Here we are reporting on the effect of annealing time and temperature on the formation and changes in precipitates.

Defect reduction in oxygen implanted silicon-on-insulator material during high-temperature annealing

1989 ◽  
Vol 47 ◽  
pp. 604-605
Author(s):  
P. Roitman ◽  
B. Cordts ◽  
S. Visitserngtrakul ◽  
S.J. Krause
Keyword(s):  
High Temperature ◽  
Annealing Temperature ◽  
Silicon On Insulator ◽  
High Dose ◽  
High Temperature Annealing ◽  
High Current ◽  
Defect Reduction ◽  
Annealing Step ◽  
Multiple Cycle ◽  
Defect Densities

Synthesis of a thin, buried dielectric layer to form a silicon-on-insulator (SOI) material by high dose oxygen implantation (SIMOX – Separation by IMplanted Oxygen) is becoming an important technology due to the advent of high current (200 mA) oxygen implanters. Recently, reductions in defect densities from 109 cm−2 down to 107 cm−2 or less have been reported. They were achieved with a final high temperature annealing step (1300°C – 1400°C) in conjunction with: a) high temperature implantation or; b) channeling implantation or; c) multiple cycle implantation. However, the processes and conditions for reduction and elimination of precipitates and defects during high temperature annealing are not well understood. In this work we have studied the effect of annealing temperature on defect and precipitate reduction for SIMOX samples which were processed first with high temperature, high current implantation followed by high temperature annealing.

High-Quality SOI by Oxygen Implantation into Silicon

1987 ◽  
Vol 93 ◽  
Author(s):  
A. H. van Ommen ◽  
H. J. Ligthart ◽  
J. Politiek ◽  
M. P. A. Viegers
Keyword(s):  
High Temperature ◽  
Silicon Film ◽  
Silicon On Insulator ◽  
High Dose ◽  
High Temperature Annealing ◽  
High Quality ◽  
Cubic Symmetry ◽  
Buried Oxide ◽  
Simple Cubic ◽  
Precipitate Growth

ABSTRACTHigh quality Silicon-On-Insulator, with a dislocation density lower than 105cm−2, has been formed by high temperature annealing of high-dose oxygen implanted silicon. In the as-implanted state, oxygen was found to form precipitates in the top silicon film. In the upper region these precipitates were found to order into a superlattice of simple cubic symmetry. Near the interface with the buried oxide film the precipitates are larger and no ordering occurs in that region. Contrary to implants without precipitate ordering where dislocations are observed across the entire layer thickness of the top silicon film, dislocations are now only found near the buried oxide. The precipitate ordering appears to prevent the dislocations to climb to the surface. High temperature annealing results in precipitate growth in this region whereas they dissolve elsewhere. These growing precipitates pin the dislocations and elimination of precipitates and dislocations occurs simultaneously, resulting in good quality SOI material.

Reduction of Secondary Defects in High Energy O-Implanted Si by High Energy Si Irradiation

1992 ◽  
Vol 279 ◽  
Author(s):  
S. L. Ellingboe ◽  
M. C. Ridgway
Keyword(s):  
High Temperature ◽  
Defect Structure ◽  
Low Dose ◽  
Defect Formation ◽  
Volume Fraction ◽  
High Energy ◽  
High Dose ◽  
High Temperature Annealing ◽  
Before And After ◽  
Secondary Defect

ABSTRACTThe effect of 4.2 MeV, low dose Si irradiation before annealing of 1 MeV, high dose O-implanted Si has been studied. Si irradiation results in differences in the defect structure both before and after high temperature annealing. With no Si irradiation, annealing results in polycrystalline Si (polySi) formation and microtwinning at the front SiO2/Si interface. With Si irradiation, the polySi volume fraction is greatly reduced after annealing, twinned Si having grown in its place. Si irradiation has no effect on Si inclusions within the SiO2 layer. The dependence of secondary defect formation on Si dose and implant temperature is presented. In particular, Si irradiation at low implant temperatures (150°C) and moderate doses (5×1016 cm−2) is shown to be most effective in the reduction of the polySi volume fraction at the front SiO2/Si interface.

Origin of the defect structures in oxygen-implanted silicon-on-insulator material

1993 ◽  
Vol 51 ◽  
pp. 1108-1109
Author(s):  
D. Venables ◽  
S.J. Krause ◽  
J.D. Lee ◽  
J.C. Park ◽  
P. Roitman
Keyword(s):  
High Temperature ◽  
High Speed ◽  
Silicon Layer ◽  
Dark Field ◽  
Silicon On Insulator ◽  
High Dose ◽  
Defect Structures ◽  
Plan View ◽  
High Temperature Anneal ◽  
Single Oxygen

Silicon-on-insulator material fabricated by high-dose oxygen implantation (known as SIMOX) has been used for high speed and radiation hard devices and is under consideration for use in low power applications. However, a continuing problem has been crystalline defects in the top silicon layer. SIMOX is fabricated by two distinct methods: a single oxygen implant to a dose of 1.8×l018 cm-2 followed by a high-temperature anneal (≥1300°C, 4-6 hr) or by multiple lower dose implants (∼6×l017 cm-2) with high-temperature anneals after each implant. To date, there has been no systematic comparison of the defect structures produced by these two fabrication methods. Therefore, we have compared the defect structure and densities in multiple vs. single implant wafers. In this paper we describe the origin and characteristics of the defect structures in SIMOX and show how their densities are controlled by the processing method and conditions.Silicon (100) wafers were implanted in a high current implanter at ∼620°C to doses of 1.8×l018 or 0.6/0.6/0.6×l018 cm-2 and annealed at 1325°C, 4 hr in 0.5% or 5% O2 in Ar. Cross-section (XTEM) and plan-view (PTEM) samples were studied with bright field and weak beam dark field techniques in a transmission electron microscope operating at 200 keV.

An Electrical Characterization of Sol Films Using Devices Formed by Oxygen Implant and Rapid Thermal Processing

1987 ◽  
Vol 92 ◽  
Author(s):  
Jim D. Whitfield ◽  
Marie E. Burnham ◽  
Charles J. Varker ◽  
Syd.R. Wilson
Keyword(s):  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
High Energy ◽  
Thermally Grown Oxide ◽  
Silicon On Insulator ◽  
Wafer Surface ◽  
High Dose ◽  
Active Device ◽  
Insulating Layer ◽  
Oxygen Implantation

The advantages of Silicon-on-Insulator (SO) devices over bulk Silicon devices are well known (speed, radiation hardened, packing density, latch up free CMOS,). In recent years, much effort has been made to form a thin, buried insulating layer just below the active device region. Several approaches are being developed to fabricate such a buried insulating layer. One viable approach is by high dose, high energy oxygen implantation directly into the silicon wafer surface (1-3). With proper implant and annealing conditions, a thin stoichiometric buried oxide with a good crystalline quality silicon overlayer can be formed on which an epitaxial layer can be grown and functional devices and circuits built. As SO1 circuits become market viable, mass production tools and techniques are being developed and evaluated. Of particular interest here is the evaluation of high current oxygen implantation with rapid thermal processing on the electrical characteristics of the oxide-silicon interfaces, the silicon overlayer and the thermally grown oxide on the top surface using measurements on gated diodes and guarded capacitors.

Robust True LDO Linear Voltage Regulator and Digitally Trimmable Buffered Precision Voltage Reference for High-Temperature, Low-Voltage Applications

2013 ◽  
Vol 2013 (HITEN) ◽  
pp. 000096-000103
Author(s):  
Yoann Dusé ◽  
Fabien Laplace ◽  
Nicolas Joubert ◽  
Xavier Montmayeur ◽  
Noureddine Zitouni ◽  
...  
Keyword(s):  
High Temperature ◽  
Temperature Coefficient ◽  
Low Voltage ◽  
Short Circuit ◽  
Silicon On Insulator ◽  
Voltage Regulator ◽  
Voltage Reference ◽  
Soft Start ◽  
Wide Range ◽  
Latch Up

We present in this paper two new products for high-temperature, low-voltage (2.8V to 5.5V) power management applications. The first product is an original implementation of a monolithic low dropout regulator (XTR70010), able to deliver up to 1A at 230°C with less than 1V of dropout. This new voltage regulator can source an output current level up to 1.5A. The regulated output voltage can be selected among 32 preset values from 0.5V to 3.6V in steps of 100mV, or it can be obtained with a pair of external resistors. The circuit integrates complex analog and digital control blocks providing state of the art features such as UVLO protection, chip enable control, soft start-up and soft shut-down, hiccup short-circuit protection, customer selectable thermal shut-down, input power supply protection, output overshoot remover and stability over an extremely wide range of load capacitances. The circuit offers a fair ±2% absolute accuracy and is guaranteed latch-up free. The second product is an advanced high-temperature, low-power, digitally trimmable voltage reference (XTR75020). Thanks to a custom, 1-wire serial interface, the absolute precision and the temperature coefficient can be adjusted in order to obtain an accuracy better than 0.5% with a temperature coefficient bellow ±20ppm/°C. On-chip OTP memory for trimming of absolute value and temperature coefficient makes the circuit extremely accurate and almost insensitive to drifts over time and temperature. The circuit features a class AB output buffer able to source or sink up to 5mA and remains stable with any load capacitance up to 50μF. The XTR75020 has nine preset possible output voltages. The source and sink short circuit current always remains bellow 25mA. The quiescent current consumption is 300μA typical at 230°C while the standby current is, in all cases, under 20μA. Both devices are designed on a latch-up free silicon-on-insulator process.

scholarly journals A Low-Power and In Situ Annealing Technique for the Recovery of Active Devices After Proton Irradiation

2018 ◽  
Vol 170 ◽  
pp. 01006 ◽  
Author(s):  
Laurent A. Francis ◽  
Amor Sedki ◽  
Nicolas André ◽  
Valéria Kilchytska ◽  
Pierre Gérard ◽  
...  
Keyword(s):  
Low Power ◽  
Field Effect Transistors ◽  
Silicon On Insulator ◽  
Oxide Semiconductor ◽  
High Dose ◽  
Partial Recovery ◽  
Proton Radiation ◽  
Cmos Inverter ◽  
Inversion Point

In this paper, we study the recovery of onmembrane semiconductor components, such as N-type Field-Effect Transistors (FETs) available in two different channel widths and a Complementary Metal-Oxide-Semiconductor (CMOS) inverter, after the exposure to high dose of proton radiation. Due to the ionizing effect, the electrical characteristics of the components established remarkable shifts, where the threshold voltages showed an average shift of -480 mV and -280 mV respectively for 6 μm and 24 μm N-channel transistors, likewise the inversion point of the inverter showed an important shift of -690 mV. The recovery concept is based mainly on a micro-hotplate, fabricated with backside MEMS micromachining structure and a Silicon-On-Insulator (SOI) technology, ensuring rapid, low power and in situ annealing technique, this method proved its reliability in recent works. Annealing the N-channel transistors and the inverter for 16 min with a temperature of the heater up to 385 °C, guaranteed a partial recovery of the semiconductor based components with a maximum power consumption of 66 mW.

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