scholarly journals A SiGe-Source Doping-Less Double-Gate Tunnel FET: Design and Analysis Based on Charge Plasma Technique with Enhanced Performance

Author(s):  
Varun Mishra ◽  
Yogesh Kumar Verma ◽  
Santosh Kumar Gupta ◽  
Vikas Rathi

Abstract In this article, a distinctive charge plasma (CP) technique is employed to design two doping-less dual gate tunnel field effect transistors (DL-DG-TFETs) with Si0.5Ge0.5 and Si as source material. The CP methodology resolves the issues of random doping fluctuation and doping activation. The analog and RF performance has been investigated for both the proposed devices i.e. Si0.5Ge0.5 source DL-DG-TFET and Si-source DL-DG-TFET in terms of drive current, transconductance, cut-off frequency. In addition, the linearity and distortion analysis has been carried out for both the proposed devices with respect to higher order transconductance (gm2 and gm3), VIP2, IMD3, and HD2. The Si0.5Ge0.5 source DL-DG-TFET has better performance characteristics and reliability in compare to Si-source DL-DG-TFET owing to low energy bandgap material and higher mobility. The switching ratio obtained for Si0.5Ge0.5 source DL-DG-TFET is order of 5×1014 that makes it a suitable contender for low power applications.

2021 ◽  
Vol 7 (1) ◽  
Author(s):  
Priyadarshini N D ◽  
Nayana G H ◽  
P Vimala

Tunnel Field Effect Transistors (TFET) have demonstrated to have likely applications in the cutting-edge low force and super low force semiconductors to substitute the conventional FETs. TFET will be able to provide steep inverse subthreshold swing slope also maintaining a low leakage current, making it an essential structure for limiting the power consumption in Metal Oxide Semiconductor FETs.In this paper, we are simulating different structures of TFET by varying source material to boost the ON current of the device. The different models are designed and simulated using Silvaco TCAD simulator and transfer characteristics are studied.


2021 ◽  
pp. 2101036
Author(s):  
Jiali Yi ◽  
Xingxia Sun ◽  
Chenguang Zhu ◽  
Shengman Li ◽  
Yong Liu ◽  
...  

2008 ◽  
Vol 92 (14) ◽  
pp. 143304 ◽  
Author(s):  
M. Spijkman ◽  
E. C. P. Smits ◽  
P. W. M. Blom ◽  
D. M. de Leeuw ◽  
Y. Bon Saint Côme ◽  
...  

Nanomaterials ◽  
2021 ◽  
Vol 11 (11) ◽  
pp. 3121
Author(s):  
Monica La Mura ◽  
Patrizia Lamberti ◽  
Vincenzo Tucci

The interest in graphene-based electronics is due to graphene’s great carrier mobility, atomic thickness, resistance to radiation, and tolerance to extreme temperatures. These characteristics enable the development of extremely miniaturized high-performing electronic devices for next-generation radiofrequency (RF) communication systems. The main building block of graphene-based electronics is the graphene-field effect transistor (GFET). An important issue hindering the diffusion of GFET-based circuits on a commercial level is the repeatability of the fabrication process, which affects the uncertainty of both the device geometry and the graphene quality. Concerning the GFET geometrical parameters, it is well known that the channel length is the main factor that determines the high-frequency limitations of a field-effect transistor, and is therefore the parameter that should be better controlled during the fabrication. Nevertheless, other parameters are affected by a fabrication-related tolerance; to understand to which extent an increase of the accuracy of the GFET layout patterning process steps can improve the performance uniformity, their impact on the GFET performance variability should be considered and compared to that of the channel length. In this work, we assess the impact of the fabrication-related tolerances of GFET-base amplifier geometrical parameters on the RF performance, in terms of the amplifier transit frequency and maximum oscillation frequency, by using a design-of-experiments approach.


2019 ◽  
Vol 7 (29) ◽  
pp. 8855-8860 ◽  
Author(s):  
Janghyuk Kim ◽  
Marko J. Tadjer ◽  
Michael A. Mastro ◽  
Jihyun Kim

The threshold voltage of β-Ga2O3 metal–insulator–semiconductor field-effect transistors is controlled via remote fluorine plasma treatment, enabling an enhancement-mode operation under double gate condition.


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