scholarly journals An improved AC-amplifier for electrophysiology

2009 ◽  
Vol 19 (1) ◽  
pp. 7-12
Author(s):  
Nikola Jorgovanovic ◽  
Dubravka Bojanic ◽  
Vojin Ilic ◽  
Darko Stanisic

We present the design, simulation and test results of a new AC amplifier for electrophysiological measurements based on a three op-amp instrumentation amplifier (IA). The design target was to increase the common mode rejection ratio (CMRR), thereby improving the quality of the recorded physiological signals in a noisy environment. The new amplifier actively suppresses the DC component of the differential signal and actively reduces the common mode signal in the first stage of the IA. These functions increase the dynamic range of the amplifier's first stage of the differential signal. The next step was the realization of the amplifier in a single chip technology. The design and tests of the new AC amplifier with a differential gain of 79.2 dB, a CMRR of 130 dB at 50 Hz, a high-pass cutoff frequency at 0.01 Hz and common mode reduction in the first stage of the 49.8 dB are presented in this paper.

2014 ◽  
Vol 488-489 ◽  
pp. 1096-1099
Author(s):  
Tie Feng Wu ◽  
Zhi Chao Zhao ◽  
De Wei Dai ◽  
Shun Ji Piao ◽  
Jing Li

This paper researches the common mode rejection ratio (CMRR) of 3 op-amp instrumentation amplifier of amplifying weak signal and presents a new calculation modal considering noise, non-ideal amplifiers, matched resistor and application restricted by the factors of affecting CMRR. At last, a instrumentation amplifier was designed and built and its measured and computed results of modal are compared. The results show that this modal presented enhances calculating precision and extends application range of instrumentation amplifier. It is valid and reasonable.


2020 ◽  
Vol 12 (3) ◽  
pp. 168-174
Author(s):  
Rashmi Sahu ◽  
Maitraiyee Konar ◽  
Sudip Kundu

Background: Sensing of biomedical signals is crucial for monitoring of various health conditions. These signals have a very low amplitude (in μV) and a small frequency range (<500 Hz). In the presence of various common-mode interferences, biomedical signals are difficult to detect. Instrumentation amplifiers (INAs) are usually preferred to detect these signals due to their high commonmode rejection ratio (CMRR). Gain accuracy and CMRR are two important parameters associated with any INA. This article, therefore, focuses on the improvement of the gain accuracy and CMRR of a low power INA topology. Objective: The objective of this article is to achieve high gain accuracy and CMRR of low power INA by having high gain operational amplifiers (Op-Amps), which are the building blocks of the INAs. Methods: For the implementation of the Op-Amps and the INAs, the Cadence Virtuoso tool was used. All the designs and implementation were realized in 0.18 μm CMOS technology. Results: Three different Op-Amp topologies namely single-stage differential Op-Amp, folded cascode Op-Amp, and multi-stage Op-Amp were implemented. Using these Op-Amp topologies separately, three Op-Amp-based INAs were realized and compared. The INA designed using the high gain multistage Op-Amp topology of low-frequency gain of 123.89 dB achieves a CMRR of 164.1 dB, with the INA’s gain accuracy as good as 99%, which is the best when compared to the other two INAs realized using the other two Op-Amp topologies implemented. Conclusion: Using very high gain Op-Amps as the building blocks of the INA improves the gain accuracy of the INA and enhances the CMRR of the INA. The three Op-Amp-based INA designed with the multi-stage Op-Amps shows state-of-the-art characteristics as its gain accuracy is 99% and CMRR is as high as 164.1 dB. The power consumed by this INA is 29.25 μW by operating on a power supply of ±0.9V. This makes this INA highly suitable for low power measurement applications.


Electronics ◽  
2021 ◽  
Vol 10 (5) ◽  
pp. 563
Author(s):  
Jorge Pérez-Bailón ◽  
Belén Calvo ◽  
Nicolás Medrano

This paper presents a new approach based on the use of a Current Steering (CS) technique for the design of fully integrated Gm–C Low Pass Filters (LPF) with sub-Hz to kHz tunable cut-off frequencies and an enhanced power-area-dynamic range trade-off. The proposed approach has been experimentally validated by two different first-order single-ended LPFs designed in a 0.18 µm CMOS technology powered by a 1.0 V single supply: a folded-OTA based LPF and a mirrored-OTA based LPF. The first one exhibits a constant power consumption of 180 nW at 100 nA bias current with an active area of 0.00135 mm2 and a tunable cutoff frequency that spans over 4 orders of magnitude (~100 mHz–152 Hz @ CL = 50 pF) preserving dynamic figures greater than 78 dB. The second one exhibits a power consumption of 1.75 µW at 500 nA with an active area of 0.0137 mm2 and a tunable cutoff frequency that spans over 5 orders of magnitude (~80 mHz–~1.2 kHz @ CL = 50 pF) preserving a dynamic range greater than 73 dB. Compared with previously reported filters, this proposal is a competitive solution while satisfying the low-voltage low-power on-chip constraints, becoming a preferable choice for general-purpose reconfigurable front-end sensor interfaces.


Frequenz ◽  
2020 ◽  
Vol 74 (7-8) ◽  
pp. 263-270
Author(s):  
Cao Zeng ◽  
Xue Han Hu ◽  
Feng Wei ◽  
Xiao Wei Shi

AbstractIn this paper, a tunable balanced-to-balanced in-phase filtering power divider (FPD) is designed, which can realize a two-way equal power division with high selectivity and isolation. A differential-mode (DM) passband with a steep filtering performance is realized by applying microstrip stub-loaded resonators (SLRs). Meanwhile, six varactors are loaded to the SLRs to achieve the center frequency (CF) and bandwidth adjustment, respectively. U-type microstrip lines integrated with stepped impedance slotline resonators are utilized as the differential feedlines, which suppress the common-mode (CM) intrinsically, making the DM responses independent of the CM ones. A tuning center frequency from 3.2 to 3.75 GHz and a fractional bandwidth (12.1–17.6%) with more than 10 dB return loss and less than 2.3 dB insertion loss can be achieved by changing the voltage across the varactors. A good agreement between the simulated and measured results is observed. To the best of authors' knowledge, the proposed balanced-to-balanced tunable FPD is first ever reported.


2021 ◽  
Vol 11 (3) ◽  
pp. 31
Author(s):  
Anindita Paul ◽  
Mario Renteria-Pinon ◽  
Jaime Ramirez-Angulo ◽  
Ricardo Bolaños-Pérez ◽  
Héctor Vázquez-Leal ◽  
...  

An approach to implement single-ended power-efficient static class-AB Miller op-amps with symmetrical and significantly enhanced slew-rate and accurately controlled output quiescent current is introduced. The proposed op-amp can drive a wide range of resistive and capacitive loads. The output positive and negative currents can be much higher than the total op-amp quiescent current. The enhanced performance is achieved by utilizing a simple low-power auxiliary amplifier with resistive local common-mode feedback that increases the quiescent power dissipation by less than 10%. The proposed class AB op-amp is characterized by significantly enhanced large-signal dynamic, static current efficiency, and small-signal figures of merits. The dynamic current efficiency is 15.6 higher, the static current efficiency is 8.9 times higher, and the small-signal figure of merit is 2.3 times higher than the conventional class-A op-amp. A global figure of merit that determines an op-amp’s ultimate speed is 6.33 times higher than the conventional class A op-amp.


Energies ◽  
2021 ◽  
Vol 14 (2) ◽  
pp. 466
Author(s):  
Pawel Szczepankowski ◽  
Natalia Strzelecka ◽  
Enrique Romero-Cadaval

This article presents three variants of the Pulse Width Modulation (PWM) for the Double Square Multiphase type Conventional Matrix Converters (DSM-CMC) supplying loads with the open-end winding. The first variant of PWM offers the ability to obtain zero value of the common-mode voltage at the load’s terminals and applies only six switches within the modulation period. The second proposal archives for less Total Harmonic Distortion (THD) of the generated load voltage. The third variant of modulation concerns maximizing the voltage transfer ratio, minimizing the number of switching, and the common-mode voltage cancellation. The discussed modulations are based on the concept of sinusoidal voltage quadrature signals, which can be an effective alternative to the classic space-vector approach. In the proposed approach, the geometrical arrangement of basic vectors needed to synthesize output voltages is built from the less number of vectors, which is equal to the number of the matrix converter’s terminals. The PWM duty cycle computation is performed using only a second-order determinant of the voltages coordinate matrix without using trigonometric functions. A new approach to the PWM duty cycles computing and the load voltage synthesis by 5 × 5 and 12 × 12 topologies has been verified using the PSIM simulation software.


Energies ◽  
2021 ◽  
Vol 14 (2) ◽  
pp. 282
Author(s):  
Seon-Ik Hwang ◽  
Jang-Mok Kim

The common-mode voltage (CMV) generated by the switching operation of the pulse width modulation (PWM) inverter leads to bearing failure and electromagnetic interference (EMI) noises. To reduce the CMV, it is necessary to reduce the magnitude of dv/dt and change the frequency of the CMV. In this paper, the range of the CMV is reduced by using opposite triangle carrier for ABC and XYZ winding group, and the change in frequency in the CMV is reduced by equalizing the dwell time of the zero voltage vector on ABC and XYZ winding group of dual three phase motor.


2007 ◽  
Author(s):  
Zdzislaw H. Klim ◽  
Marek Balazinski
Keyword(s):  

Sign in / Sign up

Export Citation Format

Share Document