A Novel Fault Isolation Technique Using Noise Detection and Characterization of Light Emitted From Integrated Circuits

1998 ◽  
Author(s):  
Hong Zheng ◽  
Joe Patterson ◽  
G. P. Li
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Light Emission ◽  
Fault Isolation ◽  
Noise Detection ◽  
Isolation Technique ◽  
Potential Effectiveness ◽  
Defect Sites ◽  
A New Technique

Abstract This paper describes a new technique for identifying defects on integrated circuit. This technique detects the noise content in light emitted from defect sites. The purpose of this technique is to determine which of many light emission sites represent a defect and which represent normal devices. It reports the first phase of studies to evaluate the feasibility and potential effectiveness of this technique. The feasibility of this technique has been demonstrated by simultaneously monitoring electrical noise and the noise in the light emitted from a gallium arsenide light emission diode (LED) and a bipolar transistor. The paper will present the methodology and apparatus used to detect and analyze the noise in light emission.

Emerging Techniques for the Characterization of Nano-Mechanical Properties of Integrated Circuit Components

2008 ◽  
Author(s):  
Nicholas Randall ◽  
Rahul Premachandran Nair
Keyword(s):  
Mechanical Properties ◽  
Quality Control ◽  
Integrated Circuits ◽  
Integrated Circuit ◽  
Manufacturing Process ◽  
Solder Bumps ◽  
Initial Work ◽  
Circuit Components ◽  
Materials Used

Abstract With the growing complexity of integrated circuits (IC) comes the issue of quality control during the manufacturing process. In order to avoid late realization of design flaws which could be very expensive, the characterization of the mechanical properties of the IC components needs to be carried out in a more efficient and standardized manner. The effects of changes in the manufacturing process and materials used on the functioning and reliability of the final device also need to be addressed. Initial work on accurately determining several key mechanical properties of bonding pads, solder bumps and coatings using a combination of different methods and equipment has been summarized.

An application of photoemission microscopy to failure analysis of complex silicon integrated circuits

1992 ◽  
Vol 50 (2) ◽  
pp. 1686-1687
Author(s):  
Danilo Golijanin
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Light Emission ◽  
Optical Microscope ◽  
Night Vision ◽  
Visible Range ◽  
Electron Hole ◽  
Polysilicon Gate ◽  
The Difference ◽  
Hole Recombination

Emission of visible light from forward and reverse biased silicon p-n junctions due to the radiative electron-hole recombination has been known since the mid-50s. The weak light emission was also seen from a silicon-dioxide dielectric in an integrated gate oxide capacitor formed between a polysilicon gate and an (n or p) well in an integrated circuit. The difference in carrier energies for each of these recombination mechanisms gives rise to a specific photon wavelength (energy) distribution in the visible range. All photoemitting events are characterized by a very low level light intensity due to the low quantum efficiency of about 10−5 - 10−4 photons per one electron-hole recombination.The first practical photoemission microscope was constructed by Khurana and Chiang. They took the advantage of the advances in night vision technology and used it for imaging the faint ("invisible") light coming from various silicon structures. A typical photoemission microscope consists of an x-y-z stage with the device holder, an optical microscope, a lightsensitive camera all set within a light-tight enclosure and a computer system for image acquisition and processing.

Application of data screening to the characterization of integrated circuits

1989 ◽  
Vol 67 (4) ◽  
pp. 221-224
Author(s):  
Zarrin Ghaemi
Keyword(s):  
Integrated Circuits ◽  
Test Data ◽  
Integrated Circuit ◽  
Software Package ◽  
Automatic Method ◽  
Statistical Software ◽  
Data Screening ◽  
Actual Test ◽  
Visual Graph

Large amounts of integrated-circuit test data may be too great to be analysed by (human) visual graph inspection, and must be inspected by an automatic method. In this paper, a method called data screening is described. Data screening automatically identifies the presence of abnormalities (unexpected clusters and (or) outliers) in sets of test data, and has been implemented in a program in a statistical software package called Enhansys. The method has been used on actual test data with good results.

A New Technique for the Characterization of the Adhesion in Integrated Circuit Interconnect Structures

2005 ◽  
Vol 863 ◽  
Author(s):  
Ibon Ocana ◽  
Jon M. Molina ◽  
Diego Gonzalez ◽  
M. Reyes Elizalde ◽  
Jose M. Sanchez ◽  
...  
Keyword(s):  
Integrated Circuit ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Two Dimensions ◽  
Cross Sectional ◽  
Four Point Bending ◽  
System A ◽  
Patterned Structures ◽  
A New Technique

AbstractA new testing technique for the characterization of the mechanical behavior of the interconnect structures of integrated circuit devices is introduced in this paper. Modified crosssectional nanoindentation (MCSN) is the result of extending cross-sectional indentation (CSN) to patterned structures. As in conventional CSN, a Berkovich indenter is used to initiate fracture in the silicon substrate beneath the interconnect structure. The cracks propagate through this structure, preferentially along the weakest interfaces in the system. A FIB (Focused Ion Beam) is used for sample preparation, machining a trench parallel to the indentation surface. In this way, the crack growth can be better controlled and the problem may be modeled in two dimensions.The technique has been used to study crack propagation in patterned structures as a function of thin film composition and processing. The results obtained, in terms of crack length along each interface studied, correlate well with the fracture energy measured by four-point bending (4 PB) in blanket films of the same materials. Finite element modeling of the stress fields in the vicinity of the crack tip has been carried out to understand the crack paths observed.

Failure Analysis of Sub-Micron Semiconductor Integrated Circuit Using Backside Photon Emission Microscopy

1999 ◽  
Author(s):  
Soon Lim ◽  
Jian Hua Bi ◽  
Lian Choo Goh ◽  
Soh Ping Neo ◽  
Sudhindra Tatti
Keyword(s):  
Integrated Circuits ◽  
Failure Analysis ◽  
Integrated Circuit ◽  
Flip Chip ◽  
Photon Emission ◽  
Fault Isolation ◽  
Integrated Circuit Fabrication ◽  
Circuit Fabrication ◽  
Emission Microscopy ◽  
On Chip

Abstract The progress of modern day integrated circuit fabrication technology and packaging has made fault isolation using conventional emission microscopy via the top of the integrated circuit more difficult, if not impossible. This is primarily due to the use of increased levels and density of metal-interconnect, and the advent of new packaging technology, e.g. flip-chip, ball-grid array and lead-on-chip, etc. Backside photon emission microscopy, i.e. performing photon emission microscopy through the bulk of the silicon via the back of the integrated circuit is a solution to this problem. This paper outlines the failure analysis of sub-micron silicon integrated circuits using backside photon emission microscopy. Sample preparation, practical difficulties encountered and case histories will be discussed.

Advanced LIVA/TIVA Techniques

2001 ◽  
Author(s):  
R. Aaron Falk
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Current Source ◽  
Fault Isolation ◽  
Constant Current ◽  
Voltage Source ◽  
Constant Voltage ◽  
Constant Current Source ◽  
Current Sensing ◽  
Order Of Magnitude

Abstract LIVA (L ight I nduced V oltage A lterations) and TIVA (T hermally I nduced V oltage A lterations) have demonstrated significant capability for fault isolation. A difficulty with both techniques is their use of a constant current source, whereas integrated circuits operate with a constant voltage source. A new technique that utilizes the constant current sensing of LIVA/TIVA, while allowing for use of constant voltage bias on the integrated circuit, has been developed. As a bonus, the technique is also significantly more sensitive (at least one order of magnitude) than the standard LIVA/TIVA approach.

Long-Term Characterization of 6H-SiC Transistor Integrated Circuit Technology Operating at 500 °C

2008 ◽  
Vol 1069 ◽  
Author(s):  
Philip Neudeck ◽  
David J. Spry ◽  
Liang-Yu Chen ◽  
Carl W. Chang ◽  
Glenn M. Beheim ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Field Effect Transistors ◽  
Aircraft Engines ◽  
Electrical Parameters ◽  
Air Atmosphere ◽  
Circuit Technology ◽  
Very High

ABSTRACTNASA has been developing very high temperature semiconductor integrated circuits for use in the hot sections of aircraft engines and for Venus exploration. This paper reports on long-term 500 °C electrical operation of prototype 6H-SiC integrated circuits based on epitaxial 6H-SiC junction field effect transistors (JFETs). As of this writing, some devices have surpassed 4000 hours of continuous 500 °C electrical operation in oxidizing air atmosphere with minimal change in relevant electrical parameters.

scholarly journals Characterization of new materials for capacitor formation in integrated circuit technology

2010 ◽  
pp. 26-31
Author(s):  
Wenbin Chen
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Building Blocks ◽  
Electronic Systems ◽  
New Materials ◽  
Computer Logic ◽  
Widespread Availability ◽  
Scaling Down ◽  
Circuit Technology

There have been tremendous developments in electronic technology in the last 40 years as evidenced by the widespread availability of computers, mobile phones and electronic entertainment systems and their continued shrinking in size and cost. Much of the improvement in the performance of electronic systems can be traced to developments in Integrated Circuits (ICs) (“microchips”) which form the fundamental building blocks of modern electronics technology. Within an IC, the most important electronic component is the transistor and it is the transistor that is used to implement the operations associated with computer logic. With each generation of technology, the size of the transistors is reduced and more of them can fit on a single IC, which allows more powerful devices to be made that take up the same or even smaller space and draw less power from the battery. This trend regarding the scaling down in size of the transistors was ...

Scanning Magnetoresistive Microscopy for Die-Level Sub-Micron Current Density Mapping

2003 ◽  
Author(s):  
B. D. Schrag ◽  
X. Y. Liu ◽  
M. J. Carter ◽  
Gang Xiao
Keyword(s):  
Integrated Circuits ◽  
Failure Analysis ◽  
Spatial Resolution ◽  
Current Density ◽  
Imaging System ◽  
Fault Isolation ◽  
Magnetic Sensors ◽  
Density Mapping ◽  
Current Densities ◽  
A New Technique

Abstract In this paper, we will present a new technique for fault isolation and failure analysis in integrated circuits based on a scanning magnetoresistive imaging system. By detecting the stray magnetic fields at the surface of a chip using magnetic sensors with sub-micron spatial resolution, we are able to obtain a full map of in-plane current densities, resolving features smaller than 100 nanometers. We will briefly discuss the capabilities and limitations of the technique and will present results on a variety of frontside and backside samples.

Subpicosecond Luminescence Studies of Carrier Dynamics in Nitride Semiconductors Grown Homoepitaxially By MBE On GaN Templates

2002 ◽  
Vol 743 ◽  
Author(s):  
G. A. Garrett ◽  
A. V. Sampath ◽  
C. J. Collins ◽  
F. Semendy ◽  
K. Aliberti ◽  
...  
Keyword(s):  
Light Emission ◽  
Uv Light ◽  
Nitride Semiconductors ◽  
Al Content ◽  
Subsequent Time ◽  
A New Technique ◽  
Gap States ◽  
Homoepitaxial Layers ◽  
Heteroepitaxial Layers

ABSTRACTA new technique is presented that employs luminescence downconversion using an ultrashort gating pulse to enable the characterization of UV light emission from III-nitride semiconductors with subpicosecond temporal resolution. This technique also allows one to measure PL rise times and fast components of multiple decays in the subsequent time evolution of the PL intensity. Comparison of luminescence emission intensity and lifetime in GaN and AlGaN with ∼0.1 Al content grown homoepitaxially on GaN templates with the same quantities measured in heteroepitaxial layers grown on sapphire indicate significant improvement in the homoepitaxial layers due to reduction in dislocation density. Fast (<15 ps) initial decays in the AlGaN are attributed to localization associated with alloy fluctuations and subsequent recombination through gap states.

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