“On Wafer” Design Validation Through Complementary Dual-Side Circuit Editing using FIB

We present, a novel solution to focused ion beam (FIB) circuit edit, performed through the back and front surfaces of the same semiconductor device under test (DUT). This complementary dual-side FIB modification was performed at wafer level test, on a wafer piece, utilizing a coaxial photon-ion focused ion beam system. The DUT was found to have excessive Iddq leakage current due to a fault in a tri-state driver circuit, and was determined that two FIB edits were required to validate the proposed correction. Wafer level editing provides a more flexible approach to access the edit sites. We accessed one site via the front side circuitry of the DUT and the other through the backside silicon. A wafer piece was used for this dual-side edit to demonstrate relatively uncomplicated sample preparation for FIB access, and still allow wafer level probing afterward. The silicon was locally thinned by mechanical means over the specific die for backside FIB editing. Following the backside edit, the front side edit was performed, with minimal sample preparation. The modifications were validated following these edits, where Iddq and emission measurement were nominal.