scholarly journals Nanoantenna modelling for their further use as data transmitter-receiver devices on 3-d integral circuits

2020 ◽  
Vol 8 (6) ◽  
pp. 109-120
Author(s):  
D. A. Serov ◽  
K. V. Pershina ◽  
I. V. Burdina
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Data Transfer ◽  
Human Life ◽  
Three Dimensional ◽  
Optical Antennas ◽  
Full Potential ◽  
Modeling Technology ◽  
Three Dimensional Models ◽  
Communication Lines

This article describes the application of optical nanocomponents for their further use in computer and information systems. it was revealed It was found on the basis of the analysis that the improvement of existing nanocomponents will allow to realize their full potential, as well as to find the use of nanoantennas in the field of creating communication lines on device boards as devices for receiving and transmitting data. Nanoantennas are promising devices that are already successfully used in modern microscopy devices. However, recently, optical antennas have begun to be applied in devices used in other areas of human life. As a result, the use of this technology can lead to an increase in the speed and volume of data transfer between the components of the integrated circuit. This, in turn, will increase the quality and speed of calculations in complex equations. A modeling technology has been proposed, and calculations of the necessary geometric parameters have been made, which will be suitable for the goals set by this work. On the basis of the proposed technology, four models that meet the required parameters have been developed. Calculations of the created three-dimensional models of nanoantennas have been performed. As a result of the study, a model has been identified that has the most balanced parameters suitable for its further use as the main device for receiving and transmitting data on three-dimensional integrated circuits.

Scanning Electron Microscopy in Hybrid Microelectronics

1976 ◽  
Vol 34 ◽  
pp. 456-457
Author(s):  
S. Khadpe ◽  
R. Faryniak
Keyword(s):  
Integrated Circuits ◽  
Thick Film ◽  
Integrated Circuit ◽  
Failure Modes ◽  
Three Dimensional ◽  
Circuit Components ◽  
Hybrid Microcircuit ◽  
Electrical Connections ◽  
Scanning Electron

The Scanning Electron Microscope (SEM) is an important tool in Thick Film Hybrid Microcircuits Manufacturing because of its large depth of focus and three dimensional capability. This paper discusses some of the important areas in which the SEM is used to monitor process control and component failure modes during the various stages of manufacture of a typical hybrid microcircuit.Figure 1 shows a thick film hybrid microcircuit used in a Motorola Paging Receiver. The circuit consists of thick film resistors and conductors screened and fired on a ceramic (aluminum oxide) substrate. Two integrated circuit dice are bonded to the conductors by means of conductive epoxy and electrical connections from each integrated circuit to the substrate are made by ultrasonically bonding 1 mil aluminum wires from the die pads to appropriate conductor pads on the substrate. In addition to the integrated circuits and the resistors, the circuit includes seven chip capacitors soldered onto the substrate. Some of the important considerations involved in the selection and reliability aspects of the hybrid circuit components are: (a) the quality of the substrate; (b) the surface structure of the thick film conductors; (c) the metallization characteristics of the integrated circuit; and (d) the quality of the wire bond interconnections.

Analyzing the Impact of X-Ray Tomography on the Reliability of Integrated Circuits

2015 ◽  
Author(s):  
Halit Dogan ◽  
Md Mahbub Alam ◽  
Navid Asadizanjani ◽  
Sina Shahbazmohamadi ◽  
Domenic Forte ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
3D Imaging ◽  
Three Dimensional ◽  
Serial Sectioning ◽  
Promising Technique ◽  
Flash Memories ◽  
X Ray ◽  
3D Information ◽  
The Impact

Abstract X-ray tomography is a promising technique that can provide micron level, internal structure, and three dimensional (3D) information of an integrated circuit (IC) component without the need for serial sectioning or decapsulation. This is especially useful for counterfeit IC detection as demonstrated by recent work. Although the components remain physically intact during tomography, the effect of radiation on the electrical functionality is not yet fully investigated. In this paper we analyze the impact of X-ray tomography on the reliability of ICs with different fabrication technologies. We perform a 3D imaging using an advanced X-ray machine on Intel flash memories, Macronix flash memories, Xilinx Spartan 3 and Spartan 6 FPGAs. Electrical functionalities are then tested in a systematic procedure after each round of tomography to estimate the impact of X-ray on Flash erase time, read margin, and program operation, and the frequencies of ring oscillators in the FPGAs. A major finding is that erase times for flash memories of older technology are significantly degraded when exposed to tomography, eventually resulting in failure. However, the flash and Xilinx FPGAs of newer technologies seem less sensitive to tomography, as only minor degradations are observed. Further, we did not identify permanent failures for any chips in the time needed to perform tomography for counterfeit detection (approximately 2 hours).

Layout Based Full Chip Thermal Simulations of Stacked 3D Integrated Circuits

2003 ◽  
Author(s):  
Ashok Raman ◽  
Marek Turowski ◽  
Monte Mar
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Hot Spots ◽  
Heat Dissipation ◽  
Three Dimensional ◽  
3D Ic ◽  
Localized Heating ◽  
3D Integrated Circuits ◽  
Thermal Simulations

This paper presents full-chip scale detailed thermal simulations of three-dimensional (3D) integrated circuit (IC) stacks. The inter-layer dielectric (ILD) and inter-metal dielectric (IMD) materials inside 3D IC stacks may cause extensive localized heating. The influence of multiple layers of dielectrics on heat trapping inside the 3D stack is analyzed. Different methods to minimize such localized heating are studied. It is shown that the use of thermal vias is very effective in heat dissipation from the hot spots. Comparisons are made between several 3D IC configurations to verify these conclusions.

Integration of GIS and BIM in Metro Construction

2014 ◽  
Vol 608-609 ◽  
pp. 698-702 ◽  
Author(s):  
Qian Kun Wang ◽  
Peng Li ◽  
Ya Ping Xiao ◽  
Zhi Gang Liu
Keyword(s):  
Information Systems ◽  
Geographic Information Systems ◽  
Building Information Modeling ◽  
Three Dimensional ◽  
Geographic Information ◽  
Information Modeling ◽  
Modeling Technology ◽  
Effective Combination ◽  
Building Information ◽  
Three Dimensional Models

With application and popularization of information modeling technology, both Geographic Information Systems (GIS) and Building Information Modeling (BIM) could represent three dimensional models in different fields. By introducing application features of GIS and BIM in Metro construction, this paper presents such a thought that effective combination of GIS and BIM may play a role at different stages in metro construction.

Effect of Intermetallic Compounds on the Thermomechanical Fatigue Life of Three-Dimensional Integrated Circuit Package Microsolder Bumps: Finite Element Analysis and Study

2015 ◽  
Vol 137 (4) ◽  
Author(s):  
Soud Farhan Choudhury ◽  
Leila Ladani
Keyword(s):  
Fatigue Life ◽  
Integrated Circuits ◽  
Integrated Circuit ◽  
Volume Fraction ◽  
Three Dimensional ◽  
Strain Range ◽  
Bulk Solder ◽  
Element Analysis ◽  
Plastic Strain Range ◽  
Inelastic Strains

Currently, intermetallics (IMCs) in the solder joint are getting much attention due to their higher volume fraction in the smaller thickness interconnects. They possess different mechanical properties compared to bulk solder. Large volume fraction of IMCs may affect the mechanical behavior, thermomechanical and mechanical fatigue life and reliability of the solder interconnects due to very brittle nature compared to solder material. The question that this study is seeking to answer is how degrading IMCs are to the thermomechanical reliability of the microbumps used in three-dimensional (3D) integrated circuits (ICs) where the microsolder bumps have only a few microns of bond thicknesses. Several factors such as “squeezed out” solder geometry and IMC thickness are studied through a numerical experiment. Fatigue life is calculated using Coffin–Manson model. Results show that, though undesirable because of high likelihood of creating short circuits, squeezed out solder accumulates less inelastic strains under thermomechanical cyclic load and has higher fatigue life. The results show that with the increase of IMCs thickness in each model, the inelastic strains accumulation per cycle increases, thus decreasing the fatigue life. The drop in fatigue life tends to follow an exponential decay path. On the other hand, it was observed that plastic strain range per cycle tends to develop rapidly in Cu region with the increase in IMC thickness which calls for a consideration of Cu fatigue life more closely when the microbump contains a higher volume fraction of the IMCs. Overall, by analyzing the results, it is obvious that the presence of IMCs must be considered for microsolder bump with smaller bond thickness in fatigue life prediction model to generate more reasonable and correct results.

scholarly journals Evaluation of the Potential Electromagnetic Interference in Vertically Stacked 3D Integrated Circuits

2020 ◽  
Vol 10 (3) ◽  
pp. 748
Author(s):  
Dipesh Kapoor ◽  
Cher Ming Tan ◽  
Vivek Sangwan
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Electromagnetic Interference ◽  
High Speed ◽  
High Performance ◽  
Near Field ◽  
Three Dimensional ◽  
3D Ic ◽  
Three Dimensional Integrated Circuit ◽  
The Impact

Advancements in the functionalities and operating frequencies of integrated circuits (IC) have led to the necessity of measuring their electromagnetic Interference (EMI). Three-dimensional integrated circuit (3D-IC) represents the current advancements for multi-functionalities, high speed, high performance, and low-power IC technology. While the thermal challenges of 3D-IC have been studied extensively, the influence of EMI among the stacked dies has not been investigated. With the decreasing spacing between the stacked dies, this EMI can become more severe. This work demonstrates the potential of EMI within a 3D-IC numerically, and determines the minimum distance between stack dies to reduce the impact of EMI from one another before they are fabricated. The limitations of using near field measurement for the EMI study in stacked dies 3D-IC are also illustrated.

Development of accurate linewidth measurement techniques for in-process wafers

1988 ◽  
Vol 46 ◽  
pp. 54-55
Author(s):  
Robert. L. Van Asselt ◽  
Heinrich Becker
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Measurement Accuracy ◽  
Measurement Techniques ◽  
Three Dimensional ◽  
Optical Measurements ◽  
Surface Charging ◽  
Standard Tool ◽  
Linewidth Measurement ◽  
Diffraction Effects

Measurements of the device geometries on “in-process” wafers present some interesting challenges. Sample coating is not possible and the measurement probe must not damage the devices. The Scanning Electron Microscope (SEM) is the standard tool for submicrometer measurements. However, operating at the low electron beam accelerating voltage required to avoid damage to integrated circuits introduces problems in resolution. Also, the measurement accuracy may be limited by the effects of surface charging and topography. Further, SEM linewidth standards do not exist at the present time. Optical measurements are attractive because, in general, they display greater precision, are typically less expensive to implement and have a higher throughput. However, diffraction effects associated with the complex three-dimensional geometries of integrated circuit structures make accurate measurements very difficult. The "blur" regions that occur in the optical image at each edge must be interpreted to predict the actual location of the structure edges.

THE USE OF THREE-DIMENSIONAL MODELING AS A WAY OF INFORMATION AND TECHNICAL SUPPORT OF FORENSIC REGISTRATION

2018 ◽  
Author(s):  
Roman Demchyshak ◽  
Keyword(s):  
Physical Properties ◽  
3D Modeling ◽  
Three Dimensional ◽  
Technical Support ◽  
Modeling Technology ◽  
Three Dimensional Modeling ◽  
Dimensional Modeling ◽  
3D Scanners ◽  
Three Dimensional Models ◽  
Dimensional Object

The article is devoted to the issues of using three-dimensional modeling as a way of information and technical support of forensic registration. It is stated that none of the modern researches focuses on the use of three- dimensional modeling technology of information and technical support of forensic registration. An assessment of the technological capabilities of modern three-dimensional scanners (3D-scanners), which are used (or can be used) in the information and technical support of forensic registration. The technological possibilities of three-dimensional modeling are analyzed, in particular in the construction of three-dimensional models of the scene, the creation of virtual rooms for educational purposes, forensic examinations, etc. Emphasis is placed on the fact that in criminology, three-dimensional (3D) modeling is carried out according to the rules of solid modeling (in which the key is to reproduce the physical properties of three-dimensional modeling objects). It is the physical properties of forensic registration objects, as a rule, that are the key information, the fixation of which is carried out within the framework of forensic registration. It is determined that the prospects of using three-dimensional (3D) modeling during forensic registration are to ensure the possibility of creating objects of accounting using additive technologies (ie three-dimensional printing (3D- printing)). The position is expressed that the technologies of three-dimensional (3D) modeling can be applied, first of all, in: trasological accounting; ballistic accounting; cold steel accounting; registration of persons on the basis of appearance; accounting of materials, substances and products. Therefore, with 3D modeling, it is possible to reproduce a certain three-dimensional object if it has been properly scanned. The described technologies create opportunities not only to quickly create exact copies or duplicates of evidence or other objects that are placed in forensic accounting, and use them for other research or for use as objects of orientation during operational or investigative actions.

scholarly journals Situational Modeling Technology in Virtual Environment Systems

2021 ◽  
Vol 24 (5) ◽  
pp. 889-901
Author(s):  
Михаил Васильевич Михайлюк ◽  
Дмитрий Алексеевич Кононов ◽  
Дмитрий Михайлович Логинов
Keyword(s):  
Virtual Environment ◽  
Outer Space ◽  
Three Dimensional ◽  
Computer Screen ◽  
Modeling Technology ◽  
Virtual Control ◽  
Artificial Environment ◽  
Three Dimensional Models ◽  
Special Editor ◽  
Special Language

The technology of modelling various situations in virtual environment systems, which are computer three-dimensional models of a real or artificial environment, is discussed. The user can view these scenes directly on the computer screen, wall screen, in a stereo glasses, virtual reality glasses, etc. He can also move inside a virtual scene and interact with its objects. In turn, the environment can also change. This allows modelling of various situations (situation modelling) in the virtual environment system. With such modelling, some static or dynamic situation is set in the virtual environment system in which the operator must perform the tasks assigned to him. A mechanism for setting situations by changing a virtual three-dimensional scene using configuration files and virtual control panels is proposed. A special language has been developed for writing configuration files, and a special editor has been developed for creating virtual control panels. The approbation of the proposed methods is presented on the examples of two virtual scenes: a training ground for mobile robots and a jet backpack for the rescue of an astronaut in outer space.

scholarly journals Fabrication of Low Cost and Low Temperature Poly-Silicon Nanowire Sensor Arrays for Monolithic Three-Dimensional Integrated Circuits Applications

Nanomaterials ◽  
2020 ◽  
Vol 10 (12) ◽  
pp. 2488
Author(s):  
Siqi Tang ◽  
Jiang Yan ◽  
Jing Zhang ◽  
Shuhua Wei ◽  
Qingzhu Zhang ◽  
...  
Keyword(s):  
Low Temperature ◽  
Integrated Circuits ◽  
Integrated Circuit ◽  
Low Cost ◽  
Silicon Nanowire ◽  
Three Dimensional ◽  
Sensor Arrays ◽  
Processing Temperature ◽  
C 30 ◽  
Three Dimensional Integrated Circuit

In this paper, the poly-Si nanowire (NW) field-effect transistor (FET) sensor arrays were fabricated by adopting low-temperature annealing (600 °C/30 s) and feasible spacer image transfer (SIT) processes for future monolithic three-dimensional integrated circuits (3D-ICs) applications. Compared with other fabrication methods of poly-Si NW sensors, the SIT process exhibits the characteristics of highly uniform poly-Si NW arrays with well-controlled morphology (about 25 nm in width and 35 nm in length). Conventional metal silicide and implantation techniques were introduced to reduce the parasitic resistance of source and drain (SD) and improve the conductivity. Therefore, the obtained sensors exhibit >106 switching ratios and 965 mV/dec subthreshold swing (SS), which exhibits similar results compared with that of SOI Si NW sensors. However, the poly-Si NW FET sensors show the Vth shift as high as about 178 ± 1 mV/pH, which is five times larger than that of the SOI Si NW sensors. The fabricated poly-Si NW sensors with 600 °C/30 s processing temperature and good device performance provide feasibility for future monolithic three-dimensional integrated circuit (3D-IC) applications.

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