scholarly journals Skyrmion Logic-In-Memory Architecture for Maximum/Minimum Search

Electronics ◽  
2021 ◽  
Vol 10 (2) ◽  
pp. 155
Author(s):  
Luca Gnoli ◽  
Fabrizio Riente ◽  
Marco Vacca ◽  
Massimo Ruo Roch ◽  
Mariagrazia Graziano

In modern computing systems there is the need to utilize a large amount of data in maintaining high efficiency. Limited memory bandwidth, coupled with the performance gap between memory and logic, impacts heavily on algorithms performance, increasing the overall time and energy required for computation. A possible approach to overcome such limitations is Logic-In-Memory (LIM). In this paper, we propose a LIM architecture based on a non-volatile skyrmion-based recetrack memory. The architecture can be used as a memory or can perform advanced logic functions on the stored data, for example searching for the maximum/minimum number. The circuit has been designed and validated using physical simulations for the memory array together with digital design tools for the control logic. The results highlight the small area of the proposed architecture and its good energy efficiency compared with a reference CMOS implementation.

2013 ◽  
Vol 365-366 ◽  
pp. 917-920
Author(s):  
De Fa Zhang ◽  
Yi Cong Gao

In recent years, industrial sewing machine intelligence can be increased. Compared with the traditional equipment, the new generation of domestic equipment in the "high efficiency, energy saving, special" has realized great-leap-forward development. In the performance, will towards high precision, high efficiency, high performance, intelligent direction; in function, to the miniaturization, multi-function direction; in the program, to the systematic, integrated direction. The design and development of industrial sewing machine digitization design packaging platform are discussed.


Author(s):  
Hibiki Ono ◽  
Yoshifumi Manabe

Abstract This paper proposes new card-based cryptographic protocols to calculate logic functions with the minimum number of cards using private operations under the semi-honest model. Though various card-based cryptographic protocols were shown, the minimum number of cards used in the protocol has not been achieved yet for many problems. Operations executed by a player where the other players cannot see are called private operations. Private operations have been introduced in some protocols to solve a particular problem or to input private values. However, the effectiveness of introducing private operations to the calculation of general logic functions has not been considered. This paper introduces three new private operations: private random bisection cuts, private reverse cuts, and private reveals. With these three new operations, we show that all of AND, XOR, and copy protocols are achieved with the minimum number of cards by simple three-round protocols. This paper then shows a protocol to calculate any logical functions using these private operations. Next, we consider protocols with malicious players.


Electronics ◽  
2020 ◽  
Vol 9 (4) ◽  
pp. 542 ◽  
Author(s):  
Haifeng Zhang ◽  
Zhaowei Zhang ◽  
Mingyu Gao ◽  
Li Luo ◽  
Shukai Duan ◽  
...  

A memristor is a nanoscale electronic element that displays a threshold property, non-volatility, and variable conductivity. Its composite circuits are promising for the implementation of intelligence computation, especially for logic operations. In this paper, a flexible logic circuit composed of a spintronic memristor and complementary metal-oxide-semiconductor (CMOS) switches is proposed for the implementation of the basic unbalanced ternary logic gates, including the NAND, NOR, AND, and OR gates. Meanwhile, due to the participation of the memristor and CMOS, the proposed circuit has advantages in terms of non-volatility and load capacity. Furthermore, the input and output of the proposed logic are both constant voltages without signal degradation. All these three merits make the proposed circuit capable of realizing the cascaded logic functions. In order to demonstrate the validity and effectiveness of the entire work, series circuit simulations were carried out. The experimental results indicated that the proposed logic circuit has the potential to realize almost all basic ternary logic gates, and even some more complicated cascaded logic functions with a compact circuit construction, high efficiency, and good robustness.


2019 ◽  
Vol 20 (15) ◽  
pp. 3719 ◽  
Author(s):  
Zahra Hajiahmadi ◽  
Ali Movahedi ◽  
Hui Wei ◽  
Dawei Li ◽  
Yasin Orooji ◽  
...  

The CRISPR/Cas9 system (clustered regularly interspaced short palindromic repeat-associated protein 9) is a powerful genome-editing tool in animals, plants, and humans. This system has some advantages, such as a high on-target mutation rate (targeting efficiency), less cost, simplicity, and high-efficiency multiplex loci editing, over conventional genome editing tools, including meganucleases, transcription activator-like effector nucleases (TALENs), and zinc finger nucleases (ZFNs). One of the crucial shortcomings of this system is unwanted mutations at off-target sites. We summarize and discuss different approaches, such as dCas9 and Cas9 paired nickase, to decrease the off-target effects in plants. According to studies, the most effective method to reduce unintended mutations is the use of ligand-dependent ribozymes called aptazymes. The single guide RNA (sgRNA)/ligand-dependent aptazyme strategy has helped researchers avoid unwanted mutations in human cells and can be used in plants as an alternative method to dramatically decrease the frequency of off-target mutations. We hope our concept provides a new, simple, and fast gene transformation and genome-editing approach, with advantages including reduced time and energy consumption, the avoidance of unwanted mutations, increased frequency of on-target changes, and no need for external forces or expensive equipment.


Complexity ◽  
2019 ◽  
Vol 2019 ◽  
pp. 1-12 ◽  
Author(s):  
Alia Bibi ◽  
Fei Xu ◽  
Henry N. Adorna ◽  
Francis George C. Cabarle

Spiking neural P systems with scheduled synapses are a class of distributed and parallel computational models motivated by the structural dynamism of biological synapses by incorporating ideas from nonstatic (i.e., dynamic) graphs and networks. In this work, we consider the family of spiking neural P systems with scheduled synapses working in the sequential mode: at each step the neuron(s) with the maximum/minimum number of spikes among the neurons that can spike will fire. The computational power of spiking neural P systems with scheduled synapses working in the sequential mode is investigated. Specifically, the universality (Turing equivalence) of such systems is obtained.


Aviation ◽  
2015 ◽  
Vol 19 (1) ◽  
pp. 36-39 ◽  
Author(s):  
Dariusz Sobczynski

Realisation of a high-speed drive using a BLDC motor, especially that of low and medium power and with rotational speed of up to 40 000 rpm designed for use in aviation appliances, became possible due to rapid progress in electronic power control technology. An increase of both capability and diversity of electronic power circuits results from the increase of semiconductor element voltage and current operational ranges simultaneously with the improvement of their dynamical parameters, as well as from application of up-to-date microprocessor and programmable circuits for control purposes. Choice of topology for a drive system to be used in aviation appliances, including the electronic power converter, is based on the following quality and economy-related criteria: single-phase supply and sinusoidal waveform of power network current; high efficiency and reliability; small overall dimensions; minimum number of semiconductor elements; and low price. Various technical solutions are possible here, concerning both the scope of the power circuit and the control system.


Author(s):  
David Galán Madruga

An air quality monitoring network (AQMN) is a basic piece of environmental management due to that it satisfies the major role in monitoring of environment emissions, in special relevance to target air pollutants. An adequate installation would lead to support high efficiency of the network. Therefore, AQMN pre-layout should be considered as an essential factor in regarding with the location of fixed measurement stations within AQMN, as the minimum number of sampling points. Nevertheless, once AQMN has been already installed, and given that the spatial air pollutants pattern can vary along time, an assessment of the AQMN design would be addressed in order to identify the presence of potential redundant fixed monitoring stations. This approach would let to improve the AQMN performance, reduce maintenance costs of the network and consolidate the investment on those more efficient fixed stations. The chapter includes aspects relative to air pollutants measured by networks, their representativeness, limitations, importance, and the future needs. It ponders the need of re-assessment of the AQMN layout for assuring (i) a right evaluation of the human being exposure to atmospheric pollutants and controlling the environmental emissions into the atmosphere and (ii) an adequate performance of the network along time.


Author(s):  
JunHa Suk ◽  
ChanYeop Ahn ◽  
S M Mojahidul Ahsan ◽  
SoYoung Kim

Abstract Printed devices fabricated using roll-to-roll (R2R) printing technology have been used in low-cost Internet of Things (IoTs), smart packaging and bio-chips. As the area of applications of printed devices broadens, arithmetic units in digital design need to be implemented. In this paper, we propose a stable 4-bit arithmetic logic unit (ALU) design using a minimum number of transistors that can overcome the limitations of printed devices. We propose the use of a 2:1 transmission gate (TG) multiplexer (MUX) structure and hybrid 16T full-adder to construct the ALU. New design methods are applied to reduce the number of inverter stages added to overcome the voltage degradation. Using this approach reduces the total number of transistors used in the design from 276 to 153, compared to the conventional design, with significant improvements in delay and power performance.


Author(s):  
D. Huang ◽  
T. T. Wei ◽  
H. C. Han ◽  
D. J. Zhou ◽  
H. S. Zhang

Humid Air Turbine (HAT) cycle is one of the most advanced gas turbine cycles in the world. It has drawn great attention due to its high efficiency and good environmental compatibility. The saturator is the key component in the HAT cycle, which utilizes liquid water to humidify compressed air to improve the system performance and make it possible to recover low temperature waste heat in the HAT cycle system. Therefore, saturator temperature control occupies very important position in HAT cycle, and it is essential to study the control logic in saturator. Saturator temperature control is a control strategy that adjusts the water flow rate to fit the designed temperature. In this paper, the HAT cycle test rig of Shanghai Jiao Tong University is taken as research object and a complete HAT cycle model using global heat and mass transfer coefficient is built to analyze the influence of saturator temperature control on both steady-state and dynamic performance of HAT cycle system. The system efficiency increases by 0.071% after considering saturator temperature control on 75% load. The dynamic response of output power changes little, while the saturator component can achieve stable faster. The research in this paper can lay the foundation for operation and control of the HAT cycle demonstration plants.


Electronics ◽  
2020 ◽  
Vol 9 (5) ◽  
pp. 871
Author(s):  
Julio José Caparrós Mancera ◽  
Francisca Segura Manzano ◽  
José Manuel Andújar ◽  
Francisco José Vivas ◽  
Antonio José Calderón

The progressive increase in hydrogen technologies’ role in transport, mobility, electrical microgrids, and even in residential applications, as well as in other sectors is expected. However, to achieve it, it is necessary to focus efforts on improving features of hydrogen-based systems, such as efficiency, start-up time, lifespan, and operating power range, among others. A key sector in the development of hydrogen technology is its production, renewable if possible, with the objective to obtain increasingly efficient, lightweight, and durable electrolyzers. For this, scientific works are currently being produced on stacks technology improvement (mainly based on two technologies: polymer electrolyte membrane (PEM) and alkaline) and on the balance of plant (BoP) or the industrial plant (its size depends on the power of the electrolyzer) that runs the stack for its best performance. PEM technology offers distinct advantages, apart from the high cost of its components, its durability that is not yet guaranteed and the availability in the MW range. Therefore, there is an open field of research for achievements in this technology. The two elements to improve are the stacks and BoP, also bearing in mind that improving BoP will positively affect the stack operation. This paper develops the design, implementation, and practical experimentation of a BoP for a medium-size PEM electrolyzer. It is based on the realization of the optimal design of the BoP, paying special attention to the subsystems that comprise it: the power supply subsystem, water management subsystem, hydrogen production subsystem, cooling subsystem, and control subsystem. Based on this, a control logic has been developed that guarantees efficient and safe operation. Experimental results validate the designed control logic in various operating cases, including warning and failure cases. Additionally, the experimental results show the correct operation in the different states of the plant, analyzing the evolution of the hydrogen flow pressure and temperature. The capacity of the developed PEM electrolysis plant is probed regarding its production rate, wide operating power range, reduced pressurization time, and high efficiency.


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