scholarly journals Modeling and Simulation of Monolithic Single-Supply Power Operational Amplifiers

Energies ◽  
2021 ◽  
Vol 14 (15) ◽  
pp. 4611
Author(s):  
Ivailo Milanov Pandiev
Keyword(s):  
Supply Voltage ◽  
Circuit Simulation ◽  
Operational Amplifiers ◽  
Model Parameters ◽  
Electrical Parameters ◽  
Macro Model ◽  
Offset Voltage ◽  
Macro Modeling ◽  
Versus Supply Voltage ◽  
Versus Supply

In this paper a simple PSpice (Personal Simulation Program with Integrated Circuit Emphasis) macro-model was developed, and verified for monolithic power operational amplifiers operated with a single-supply voltage. The proposed macro-model is developed using simplification and build-up techniques for macro-modeling of operational amplifiers and simulates the basic static and dynamic characteristics, including input impedance, small-signal frequency responses at various voltage gains, output power versus supply voltage, slew-rate-limiting, voltage limiting, output offset voltage versus supply voltage ripples, and output resistance. Furthermore, the macro-model also takes into account the ground reference voltage in the amplifier at a single power supply voltage. The model is implemented as a hierarchical structure suitable for the PSpice circuit simulation platform. The sub-circuit is built using standard PSpice components and analog behavioral modeling blocks. The accuracy of the model is verified by extracting the model parameters for single-supply power operational amplifier TDA2005 from ST Microelectronics as example. The effectiveness of the model is validated by comparing the simulation results of the electrical parameters with the corresponding measured values obtained by experimental testing of sample circuits. The comparative analysis shows that the relative error of the modeled large-signal parameters is less than 15%. Moreover, an error of 15% is quite acceptable, considering the technological tolerances of the electrical parameters for this type of analog ICs.

MOSFET MODELING AND PARAMETER EXTRACTION FOR RF IC'S

2001 ◽  
Vol 11 (04) ◽  
pp. 953-1006 ◽  
Author(s):  
MINKYU JE ◽  
ICKJIN KWON ◽  
HYUNGCHEOL SHIN ◽  
KWYRO LEE
Keyword(s):  
High Frequency ◽  
Circuit Simulation ◽  
Low Frequency ◽  
Parameter Extraction ◽  
Extraction Methods ◽  
Model Parameters ◽  
Large Signal ◽  
Charge Conservation ◽  
Macro Modeling ◽  
High Frequency Effects

After reviewing the basic concept and general strategies, we have examined a variety of examples of modeling and parameter extraction methods for RF MOSFET's. Modeling and parameter extraction techniques popular in III-V FET modeling were reviewed and recent efforts to model the RF MOSFET and extract the model parameters were examined in light of the differences between the MOSFET and the III-V FET. A very simple and accurate parameter extraction method studied in our laboratory for three-terminal modeling considering charge conservation is also introduced. Our works have two important implications. One is that the consideration for charge conservation is important not only for accurate device modeling and circuit simulation but even more for proper parameter extraction. Another is that one accurate large-signal I-V model is enough to be used for DC, low-frequency analog, as well as RF circuit simulation. Four-terminal modeling based on new equivalent circuits to address the high-frequency effects arising in a MOSFET is very complicated and not practical for CAD applications, even without considering the substrate coupling terms. As a temporary alternative, the macro-modeling approach is examined with various examples.

scholarly journals Macro-Modeling for N-Type Feedback Field-Effect Transistor for Circuit Simulation

Micromachines ◽  
2021 ◽  
Vol 12 (10) ◽  
pp. 1174
Author(s):  
Jong Hyeok Oh ◽  
Yun Seop Yu
Keyword(s):  
Field Effect ◽  
Field Effect Transistor ◽  
Circuit Simulation ◽  
Current Generator ◽  
Macro Model ◽  
Generator Circuit ◽  
Macro Modeling ◽  
Proposed Model ◽  
Effect Transistor ◽  
Type Feedback

In this study, we propose an improved macro-model of an N-type feedback field-effect transistor (NFBFET) and compare it with a previous macro-model for circuit simulation. The macro-model of the NFBFET is configured into two parts. One is a charge integrator circuit and the other is a current generator circuit. The charge integrator circuit consisted of one N-type metal-oxide-semiconductor field-effect transistor (NMOSFET), one capacitor, and one resistor. This circuit implements the charging characteristics of NFBFET, which occur in the channel region. For the previous model, the current generator circuit consisted of one ideal switch and one resistor. The previous current generator circuit could implement IDS-VGS characteristics but could not accurately implement IDS-VDS characteristics. To solve this problem, we connected a physics-based diode model with an ideal switch in series to the current generator circuit. The parameters of the NMOSFET and diode used in this proposed model were fitted from TCAD data of the NFBFET, divided into two parts. The proposed model implements not only the IDS-VGS characteristics but also the IDS-VDS characteristics. A hybrid inverter and an integrate and fire (I&F) circuit for a spiking neural network, which consisted of NMOSFETs and an NFBFET, were simulated using the circuit simulator to verify a validation of the proposed NFBFET macro-model.

scholarly journals Thermal conductivity of unsaturated clay-rocks

2010 ◽  
Vol 14 (1) ◽  
pp. 91-98 ◽  
Author(s):  
D. Jougnot ◽  
A. Revil
Keyword(s):  
Thermal Conductivity ◽  
Porous Material ◽  
Solid Phase ◽  
Model Parameters ◽  
Electrical Parameters ◽  
New Model ◽  
Unsaturated Clay ◽  
Unsaturated Porous Material ◽  
Clay Rocks ◽  
Good Agreement

Abstract. The parameters used to describe the electrical conductivity of a porous material can be used to describe also its thermal conductivity. A new relationship is developed to connect the thermal conductivity of an unsaturated porous material to the thermal conductivity of the different phases of the composite, and two electrical parameters called the first and second Archie's exponents. A good agreement is obtained between the new model and thermal conductivity measurements performed using packs of glass beads and core samples of the Callovo-Oxfordian clay-rocks at different saturations of the water phase. We showed that the three model parameters optimised to fit the new model against experimental data (namely the thermal conductivity of the solid phase and the two Archie's exponents) are consistent with independent estimates. We also observed that the anisotropy of the effective thermal conductivity of the Callovo-Oxfordian clay-rock was mainly due to the anisotropy of the thermal conductivity of the solid phase.

scholarly journals Robust Offset-Cancellation Sense Amplifier for an Offset-Canceling Dual-Stage Sensing Circuit in Resistive Nonvolatile Memories

Electronics ◽  
2020 ◽  
Vol 9 (9) ◽  
pp. 1403 ◽  
Author(s):  
Taehui Na
Keyword(s):  
Supply Voltage ◽  
Dead Zone ◽  
Technology Scaling ◽  
Offset Cancellation ◽  
Sense Amplifier ◽  
Offset Voltage ◽  
Area Overhead ◽  
Nonvolatile Memories ◽  
Dual Stage ◽  
The Cost

With technology scaling, achieving a target read yield of resistive nonvolatile memories becomes more difficult due to increased process variation and decreased supply voltage. Recently, an offset-canceling dual-stage sensing circuit (OCDS-SC) has been proposed to improve the read yield by canceling the offset voltage and utilizing a double-sensing-margin structure. In this paper, an offset-canceling zero-sensing-dead-zone sense amplifier (OCZS-SA) combined with the OCDS-SC is proposed to significantly improve the read yield. The OCZS-SA has two major advantages, namely, offset voltage cancellation and a zero sensing dead zone. The Monte Carlo HSPICE simulation results using a 65-nm predictive technology model show that the OCZS-SA achieves 2.1 times smaller offset voltage with a zero sensing dead zone than the conventional latch-type SAs at the cost of an increased area overhead of 1.0% for a subarray size of 128 × 16.

Biomaterial Impedance Analyzer Based on Digital Auto Balancing Bridge

2011 ◽  
Vol 291-294 ◽  
pp. 1259-1262
Author(s):  
Nan Li ◽  
Yi Nan Wang ◽  
Hong Shan Nie ◽  
Hong Qi Yu ◽  
Hui Xu
Keyword(s):  
Bridge Circuit ◽  
Design Method ◽  
Circuit Simulation ◽  
Low Frequency ◽  
Operational Amplifiers ◽  
Frequency Synthesis ◽  
Direct Digital Frequency Synthesis ◽  
Impedance Analyzer ◽  
Digital Frequency ◽  
Phase Sensitive

This paper presents the design method of a novel biomaterial impedance analyzer based on digital auto balancing bridge method. The system hardware mainly consists of FPGA, ADC, DACs and operational amplifiers. Many DSP algorithms such as direct digital frequency synthesis (DDS), digital phase sensitive demodulation (DPSD), digital modulation and digital filter are implemented in FPGA to realize the auto balancing function of the bridge circuit. Simulation results show that the system has good performance from low frequency to 10MHz. It is suitable for EIS application in biomaterial analysis.

scholarly journals Low-Power CMOS Integrated Hall Switch Sensor

2017 ◽  
Vol 2017 ◽  
pp. 1-9 ◽  
Author(s):  
Rongshan Wei ◽  
Shizhong Guo ◽  
Shanzhi Yang
Keyword(s):  
Supply Voltage ◽  
Reducing Power ◽  
Cmos Technology ◽  
Sleep Mode ◽  
Test Results ◽  
Offset Voltage ◽  
Current Consumption ◽  
Low Power Cmos ◽  
Switch Circuit ◽  
Hall Element

This paper presents an integrated Hall switch sensor based on SMIC 0.18 µm CMOS technology. The system includes a front-end Hall element and a back-end signal processing circuit. By optimizing the structure of the Hall element and using the orthogonal coupling and spinning current technology, the offset voltage can be suppressed effectively. The simulation results showed that the Hall switch can eliminate offset voltage greater than 1 mV at 3.3 V supply voltage. Two modes of the Hall switch circuit, the awake mode and the sleep mode, were realized by using clock logic signals without compromising the performance of the Hall switch, thereby reducing power consumption. The test results showed that the operate point and the release point of the switch were within the range of 3–7 mT at 3.3 V supply voltage. Meanwhile, the current consumption is 7.89 µA.

scholarly journals Analysis of Electric Power Quantities of Road LED Luminaires under Sinusoidal and Non-Sinusoidal Conditions

Energies ◽  
2019 ◽  
Vol 12 (6) ◽  
pp. 1109
Author(s):  
Roman Sikora ◽  
Przemysław Markiewicz
Keyword(s):  
Supply Voltage ◽  
Light Emitting Diode ◽  
Luminous Flux ◽  
Laboratory Measurements ◽  
Electrical Parameters ◽  
Light Emitting ◽  
Road Lighting ◽  
Legal Provisions ◽  
Acceptable Range ◽  
Deformation Level

The paper presents the results of laboratory tests concerning the measurements of electrical parameters of road lighting luminaires. These measurements were focused on determining the dependence of the electrical parameters of the luminaires versus the changes of the RMS (Root Mean Square) value of the supply voltage and the level of disturbances in the supply voltage. The basic electrical parameters for light-emitting diode (LED) luminaires were analysed with the option of luminous flux adjustment if it existed. During the laboratory measurements, the luminaires were powered from the Agilent 6834B distorted voltage generator within the assumed acceptable range of the changes in the deformation level resulting from the applicable legal provisions for the reproduction of actual power supply conditions.

Macro-modeling of spot weld strength and failure

2017 ◽  
Vol 34 (3) ◽  
pp. 941-959 ◽  
Author(s):  
Rim Chtourou ◽  
Nicolas Leconte ◽  
Bassem Zouari ◽  
Fahmi Chaari ◽  
Eric Markiewicz ◽  
...  
Keyword(s):  
Model Updating ◽  
Spot Weld ◽  
Sequential Optimization ◽  
Weld Strength ◽  
Model Parameters ◽  
Content Type ◽  
Pull Out ◽  
Macro Modeling ◽  
Lap Shear ◽  
Optimization Methodology

Purpose This paper aims to propose a macro modeling approach to simulate the mechanical behavior and the failure of spot welded joints in structural crashworthiness computations. Design/methodology/approach A connector element is proposed to simulate the behavior and failure of spot weld joints. An elastic-plastic damageable model is used to describe the non-linear response and rupture. The connector model involves several parameters that have to be defined. Some are directly identified based on mechanical interpretations and experimental tests characteristics. The remaining parameters are identified through a finite element model updating approach using Arcan tests. Resulting from a sensitivity analysis, an original two steps optimization methodology, using the Modes I and II Arcan tests results sequentially, has been implemented to identify the remaining model parameters. Findings The numerical results for Arcan tests in mixed Modes I/II are in a good agreement with the experimental ones. The model is also validated on tensile pull-out, single lap shear and coach-peel tests. Originality/value By comparison with previous published results, the proposed model brings a significant improvement. The main innovative aspects of this work are as follows: the proposed formulation, a reduced number of parameters to optimize, an original sequential optimization methodology based on physical and mechanical analyses and a mesh size independent connector element.

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