scholarly journals Efficient Low Power Region Enhanced Architectures For DWT And AES For Protected Coding Image

2020 ◽  
pp. 401-406
Author(s):  
Shanmugaraja T ◽  
Supriya M ◽  
Godwin Cryil N ◽  
Kavin kumar K ◽  
Pradeep M
Keyword(s):  
Data Transmission ◽  
High Efficiency ◽  
Image Data ◽  
Cmos Technology ◽  
Power Performance ◽  
Calculation Algorithm ◽  
Aes Algorithm ◽  
Compression Time ◽  
Multi Level ◽  
Power Region

In this article presents an HDL template on the ASIC platform. For quicker and safer image data transmission stable encoding of pictures via image compression and AES through encryption, the DWT was facilitated. The DWT calculation algorithm based on a lifting scheme and a multi-level sub-bands on the ASIC platform are created. 2D-DWTwas built using it. The related sub-bands were chosen to minimize the compression time of the AES encryption, based on compression ratio and data recovery. To ensure high efficiency and latency, the DWT architecture was developedHDL model and AES algorithm for the area, timing and power performance of the ASIC platform have been developed and validated for the DWT architecture. Using 56 nm CMOS technology, the ASIC implementation was carried out.

scholarly journals Design of Multi Standard Near Field Communication Outphasing Transmitter with Modulation Wave Shaping

Electronics ◽  
2021 ◽  
Vol 10 (2) ◽  
pp. 188
Author(s):  
Žiga Korošak ◽  
Nejc Suhadolnik ◽  
Anton Pleteršek
Keyword(s):  
Radio Frequency Identification ◽  
High Efficiency ◽  
Near Field ◽  
Cmos Technology ◽  
Near Field Communication ◽  
Differential Delay ◽  
Fully Differential ◽  
Delay Locked Loop ◽  
Modulation Wave ◽  
The Individual

The aim of this work is to tackle the problem of modulation wave shaping in the field of near field communication (NFC) radio frequency identification (RFID). For this purpose, a high-efficiency transmitter circuit was developed to comply with the strict requirements of the newest EMVCo and NFC Forum specifications for pulse shapes. The proposed circuit uses an outphasing modulator that is based on a digital-to-time converter (DTC). The DTC based outphasing modulator supports amplitude shift keying (ASK) modulation, operates at four times the 13.56 MHz carrier frequency and is made fully differential in order to remove the parasitic phase modulation components. The accompanying transmitter logic includes lookup tables with programmable modulation pulse wave shapes. The modulator solution uses a 64-cell tapped current controlled fully differential delay locked loop (DLL), which produces a 360° delay at 54.24 MHz, and a glitch-free multiplexor to select the individual taps. The outphased output from the modulator is mixed to create an RF pulse width modulated (PWM) output, which drives the antenna. Additionally, this implementation is fully compatible with D-class amplifiers enabling high efficiency. A test circuit of the proposed differential multi-standard reader’s transmitter was simulated in 40 nm CMOS technology. Stricter pulse shape requirements were easily satisfied, while achieving an output linearity of 0.2 bits and maximum power consumption under 7.5 mW.

scholarly journals HEVC Fast Intra-Mode Selection Using World War II Technique

Electronics ◽  
2021 ◽  
Vol 10 (9) ◽  
pp. 985
Author(s):  
Junaid Tariq ◽  
Ammar Armghan ◽  
Fayadh Alenezi ◽  
Amir Ijaz ◽  
Saad Rehman ◽  
...  
Keyword(s):  
World War Ii ◽  
High Efficiency ◽  
Mode Selection ◽  
Estimation Algorithm ◽  
Minimum Variance ◽  
World War ◽  
High Efficiency Video Coding ◽  
Mode Estimation ◽  
Compression Time ◽  
Variance Estimates

High-Efficiency Video Coding (HEVC) applies 35 intra modes to every block of a frame and selects the mode that gives the best prediction. This brute-force nature of HEVC makes it complex and unfit for real-time applications. Therefore, a fast intra-mode estimation algorithm is presented here based on the classic World War II (WW2) technique known as the ‘German Tanks Problem’ (GTP). This not only is the first article to use GTP for early estimation of intra mode, but also expedites the estimation process of GTP. Secondly, the various elements of the intra process are efficiently mapped to the elements of GTP estimation. Finally, the two variations of GPT are modeled and are also minimum-variance estimates. These experimental results indicate that proposed GTP-based fast estimation reduced the compression time of HEVC from 23.88% to 31.44%.

scholarly journals A low-area high-efficiency video coding inverse transform core using resource and time sharing architecture

2020 ◽  
Vol 2020 (1) ◽  
Author(s):  
Yuan-Ho Chen ◽  
Chieh-Yang Liu
Keyword(s):  
Video Coding ◽  
Large Scale ◽  
High Efficiency ◽  
Vlsi Design ◽  
Cmos Technology ◽  
Oxide Semiconductor ◽  
Time Sharing ◽  
High Efficiency Video Coding ◽  
Low Area ◽  
Matrix Products

AbstractIn this paper, a very-large-scale integration (VLSI) design that can support high-efficiency video coding inverse discrete cosine transform (IDCT) for multiple transform sizes is proposed. The proposed two-dimensional (2-D) IDCT is implemented at a low area by using a single one-dimensional (1-D) IDCT core with a transpose memory. The proposed 1-D IDCT core decomposes a 32-point transform into 16-, 8-, and 4-point matrix products according to the symmetric property of the transform coefficient. Moreover, we use the shift-and-add unit to share hardware resources between multiple transform dimension matrix products. The 1-D IDCT core can simultaneously calculate the first- and second-dimensional data. The results indicate that the proposed 2-D IDCT core has a throughput rate of 250 MP/s, with only 110 K gate counts when implemented into the Taiwan semiconductor manufacturing (TSMC) 90-nm complementary metal-oxide-semiconductor (CMOS) technology. The results show the proposed circuit has the smallest area supporting the multiple transform sizes.

scholarly journals High-Efficiency Polarizer Reflectarray Antennas for Data Transmission Links from a CubeSat

Electronics ◽  
2021 ◽  
Vol 10 (15) ◽  
pp. 1802
Author(s):  
Eduardo Martinez-de-Rioja ◽  
Daniel Martinez-de-Rioja ◽  
Rafael López-Sáez ◽  
Ignacio Linares ◽  
Jose A. Encinar
Keyword(s):  
Circular Polarization ◽  
Data Transmission ◽  
High Efficiency ◽  
High Gain ◽  
Dual Band ◽  
Left Handed ◽  
Linearly Polarized ◽  
Flat Profile ◽  
First Time ◽  
Collimated Beam

This paper presents two designs of high-efficiency polarizer reflectarray antennas able to generate a collimated beam in dual-circular polarization using a linearly polarized feed, with application to high-gain antennas for data transmission links from a Cubesat. First, an 18 cm × 18 cm polarizer reflectarray operating in the 17.2–22.7 GHz band has been designed, fabricated, and tested. The measurements of the prototype show an aperture efficiency of 52.7% for right-handed circular polarization (RHCP) and 57.3% for left-handed circular polarization (LHCP), both values higher than those previously reported in related works. Then, a dual-band polarizer reflectarray is presented for the first time, which operates in dual-CP in the frequency bands of 20 GHz and 30 GHz. The proposed antenna technology enables a reduction of the complexity and cost of the feed chain to operate in dual-CP, as a linear-to-circular polarizer is no longer required. This property, combined with the lightweight, flat profile and low fabrication cost of printed reflectarrays, makes the proposed antennas good candidates for Cubesat applications.

scholarly journals A –5 dBm 400MHz OOK Transmitter for Wireless Medical Application

2014 ◽  
Vol 60 (2) ◽  
pp. 193-198
Author(s):  
M. Yousefi ◽  
D. Koozehkanani ◽  
H. Jangi ◽  
N. Nasirzadeh ◽  
J. Sobhi
Keyword(s):  
Energy Consumption ◽  
Power Amplifier ◽  
High Efficiency ◽  
Medical Application ◽  
Cmos Technology ◽  
High Energy ◽  
Data Rate ◽  
High Data Rate ◽  
Low Power Consumption ◽  
High Data

Abstract A 400 MHz high efficiency transmitter for wireless medical application is presented in this paper. Transmitter architecture with high-energy efficiencies is proposed to achieve high data rate with low power consumption. In the on-off keying transmitters, the oscillator and power amplifier are turned off when the transmitter sends 0 data. The proposed class-e power amplifier has high efficiency for low level output power. The proposed on-off keying transmitter consumes 1.52 mw at -5 dBm output by 40 Mbps data rate and energy consumption 38 pJ/bit. The proposed transmitter has been designed in 0.18μm CMOS technology.

scholarly journals Performance of Polar-Coded 3D Image Transmission over Fading Channel

2020 ◽  
Vol 2020 ◽  
pp. 1-10
Author(s):  
Jianjun Hao ◽  
Luyao Liu ◽  
Wei Chen
Keyword(s):  
White Noise ◽  
Data Transmission ◽  
Fading Channel ◽  
Point Cloud ◽  
Gaussian White Noise ◽  
Image Data ◽  
Image Transmission ◽  
Transmission System ◽  
3D Point Cloud ◽  
3D Image

Any signal transmitted over an air-to-ground channel is corrupted by fading, noise, and interference. In this paper, a Polar-coded 3D point cloud image transmission system with fading channel is modeled, and also the simulation is performed to verify its performance in terms of 3D point cloud image data transmission over Rician channel with Gaussian white noise and overlap of Gaussian white noise + periodic pulse jamming separately. The comparison of Polar-coded scheme with RS-coded scheme in the same scenario indicates that Polar-coded system gives far better performance against AWGN noise and fading than the RS-coded system does in the case of short block length. But RS-coded scheme shows better performance on antipulse jamming than that of Polar-coded scheme, while there is no interleaving between codewords.

scholarly journals High-Speed Hybrid-Logic Full Adder Using High-Performance 10-T XOR–XNOR Cell

2021 ◽  
pp. 263-269
Author(s):  
Tejaswini M. L ◽  
Aishwarya H ◽  
Akhila M ◽  
B. G. Manasa
Keyword(s):  
High Speed ◽  
High Performance ◽  
Full Adder ◽  
Cmos Technology ◽  
Power Performance ◽  
High Speed Design ◽  
Power Delay Product ◽  
Full Swing ◽  
Output Swing ◽  
High Output

The main aim of our work is to achieve low power, high speed design goals. The proposed hybrid adder is designed to meet the requirements of high output swing and minimum power. Performance of hybrid FA in terms of delay, power, and driving capability is largely dependent on the performance of XOR-XNOR circuit. In hybrid FAs maximum power is consumed by XOR-XNOR circuit. In this paper 10T XOR-XNOR is proposed, which provide good driving capabilities and full swing output simultaneously without using any external inverter. The performance of the proposed circuit is measured by simulating it in cadence virtuoso environment using 90-nm CMOS technology. This circuit outperforms its counterparts showing power delay product is reduced than that of available XOR-XNOR modules. Four different full adder designs are proposed utilizing 10T XOR-XNOR, sum and carry modules. The proposed FAs provide improvement in terms of PDP than that of other architectures. To evaluate the performance of proposed full adder circuit, we embedded it in a 4-bit and 8-bit cascaded full adder. Among all FAs two of the proposed FAs provide the best performance for a higher number of bits.

scholarly journals Payload Configurations for Efficient Image Acquisition – Indian Perspective

2014 ◽  
Vol XL-8 ◽  
pp. 1201-1206 ◽  
Author(s):  
D. R. M. Samudraiah ◽  
M. Saxena ◽  
S. Paul ◽  
P. Narayanababu ◽  
S. Kuriakose ◽  
...  
Keyword(s):  
Remote Sensing ◽  
Data Acquisition ◽  
High Efficiency ◽  
Image Acquisition ◽  
Image Data ◽  
Space Research ◽  
Remotely Sensed Data ◽  
Data Utilization ◽  
Spectral Bands ◽  
The World

The world is increasingly depending on remotely sensed data. The data is regularly used for monitoring the earth resources and also for solving problems of the world like disasters, climate degradation, etc. Remotely sensed data has changed our perspective of understanding of other planets. With innovative approaches in data utilization, the demands of remote sensing data are ever increasing. More and more research and developments are taken up for data utilization. The satellite resources are scarce and each launch costs heavily. Each launch is also associated with large effort for developing the hardware prior to launch. It is also associated with large number of software elements and mathematical algorithms post-launch. The proliferation of low-earth and geostationary satellites has led to increased scarcity in the available orbital slots for the newer satellites. Indian Space Research Organization has always tried to maximize the utility of satellites. Multiple sensors are flown on each satellite. In each of the satellites, sensors are designed to cater to various spectral bands/frequencies, spatial and temporal resolutions. Bhaskara-1, the first experimental satellite started with 2 bands in electro-optical spectrum and 3 bands in microwave spectrum. The recent Resourcesat-2 incorporates very efficient image acquisition approach with multi-resolution (3 types of spatial resolution) multi-band (4 spectral bands) electro-optical sensors (LISS-4, LISS-3* and AWiFS). The system has been designed to provide data globally with various data reception stations and onboard data storage capabilities. Oceansat-2 satellite has unique sensor combination with 8 band electro-optical high sensitive ocean colour monitor (catering to ocean and land) along with Ku band scatterometer to acquire information on ocean winds. INSAT- 3D launched recently provides high resolution 6 band image data in visible, short-wave, mid-wave and long-wave infrared spectrum. It also has 19 band sounder for providing vertical profile of water vapour, temperature, etc. The same system has data relay transponders for acquiring data from weather stations. The payload configurations have gone through significant changes over the years to increase data rate per kilogram of payload. Future Indian remote sensing systems are planned with very high efficient ways of image acquisition. <br><br> This paper analyses the strides taken by ISRO (Indian Space research Organisation) in achieving high efficiency in remote sensing image data acquisition. Parameters related to efficiency of image data acquisition are defined and a methodology is worked out to compute the same. Some of the Indian payloads are analysed with respect to some of the system/ subsystem parameters that decide the configuration of payload. Based on the analysis, possible configuration approaches that can provide high efficiency are identified. A case study is carried out with improved configuration and the results of efficiency improvements are reported. This methodology may be used for assessing other electro-optical payloads or missions and can be extended to other types of payloads and missions.

scholarly journals Low Power AVLS-TSPC based 2/3 Pre-Scaler

2019 ◽  
Vol 9 (1) ◽  
pp. 6687-6693
Keyword(s):  
Low Power ◽  
High Efficiency ◽  
Supply Voltage ◽  
Low Frequency ◽  
Cmos Technology ◽  
Frequency Signal ◽  
High Frequency Signal ◽  
Power Requirement ◽  
Fast Pace ◽  
Integer Division

The technology has grown at an ultra-fast pace along with the world. Small devices with less power and high efficiency are in demand. As the circuit size gets smaller, the power requirement increases due to a greater number of transistors. A pre-scaler is a circuit which reduces the high frequency signal to a low frequency signal by integer division. A new approach to low power pre-scaler is proposed in this paper, which is an add-on to the conventional pre-scaler circuit. A true single-phase clock (TSPC) circuit reduces the skew problems in the clock and is used to realize latches and flip-flops. The objective of low power is fulfilled by incorporating the Adaptive Voltage Level Source (AVLS) to TSPC based circuit. The proposed AVLS-TSPC based pre-scaler was analyzed for a frequency of 10 MHz with a supply voltage of 1.8 V for both divide by 2 and 3 modes. The proposed pre-scaler consumes considerably lesser power when compared to that of the existing pre-scaler circuit. The circuits are implemented in 180 nm CMOS technology using Cadence Virtuoso and simulated using Cadence Spectre.

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