Thermal processing of strained silicon-on-insulator for atomically precise silicon device fabrication

2013 ◽  
Vol 265 ◽  
pp. 833-838 ◽  
Author(s):  
W.C.T. Lee ◽  
N. Bishop ◽  
D.L. Thompson ◽  
K. Xue ◽  
G. Scappucci ◽  
...  
Keyword(s):  
Thermal Processing ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
Strained Silicon ◽  
Silicon Device

Diffusion Modeling of the Redistribution of Ion Implanted Impurities

1985 ◽  
Vol 52 ◽  
Author(s):  
Alwin E. Michel
Keyword(s):  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Device Fabrication ◽  
Diffusion Modeling ◽  
Enhanced Diffusion ◽  
The Common ◽  
Diffusion Mechanisms ◽  
Silicon Device ◽  
Temperature Furnace ◽  
Ion Implanted

ABSTRACTTransient enhanced diffusion during rapid thermal processing has been reported for most of the common dopants employed for silicon device fabrication. For arsenic a large amount of the available data is fit by a computational model based on accepted diffusion mechanisms. Ion implanted boron on the other hand exhibits anomalous tails and transient motiou. A time dependence of this displacement is demonstrated at lower temperatures. High temperature rapid anneals are shown to reduce some of the anomalous motion observed for low temperature furnace anneals. A model is described that links the electrical activation with the diffusion and describes both the transient diffusion of rapid thermal processing and the large anomalous diffusion reported many years ago for furnace anneals.

Structural changes in silicon-on-insulator material during post-implantation annealing

1986 ◽  
Vol 44 ◽  
pp. 736-737
Author(s):  
C. O. Jung ◽  
S. J. Krause ◽  
S.R. Wilson
Keyword(s):  
Integrated Circuits ◽  
Oxide Layer ◽  
High Speed ◽  
Structural Changes ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
High Quality ◽  
Radiation Hardened ◽  
Post Implantation ◽  
Very High

Silicon-on-insulator (SOI) structures have excellent potential for future use in radiation hardened and high speed integrated circuits. For device fabrication in SOI material a high quality superficial Si layer above a buried oxide layer is required. Recently, Celler et al. reported that post-implantation annealing of oxygen implanted SOI at very high temperatures would eliminate virtually all defects and precipiates in the superficial Si layer. In this work we are reporting on the effect of three different post implantation annealing cycles on the structure of oxygen implanted SOI samples which were implanted under the same conditions.

Analysis of Silicon-On-Insulator Structures Formed By Oxygen Ion Implantation

1985 ◽  
Vol 43 ◽  
pp. 300-301
Author(s):  
N. Lewis ◽  
E. L. Hall ◽  
A. Mogro-Campero ◽  
R. P. Love
Keyword(s):  
Ion Implantation ◽  
Single Crystal ◽  
Single Crystal Silicon ◽  
Silicon Layer ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
High Dose ◽  
Crystal Silicon ◽  
Oxygen Ion ◽  
Oxygen Ion Implantation

The formation of buried oxide structures in single crystal silicon by high-dose oxygen ion implantation has received considerable attention recently for applications in advanced electronic device fabrication. This process is performed in a vacuum, and under the proper implantation conditions results in a silicon-on-insulator (SOI) structure with a top single crystal silicon layer on an amorphous silicon dioxide layer. The top Si layer has the same orientation as the silicon substrate. The quality of the outermost portion of the Si top layer is important in device fabrication since it either can be used directly to build devices, or epitaxial Si may be grown on this layer. Therefore, careful characterization of the results of the ion implantation process is essential.

Behavior of contact-silicided TFSOI gate structures

1994 ◽  
Vol 52 ◽  
pp. 860-861
Author(s):  
N. David Theodore ◽  
Juergen Foerstner ◽  
Peter Fejes
Keyword(s):  
Semiconductor Device ◽  
Series Resistance ◽  
Field Effect Transistors ◽  
Silicon Layer ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
Continuous Layer ◽  
Buried Oxide ◽  
Device Structures ◽  
Thin Silicon

As semiconductor device dimensions shrink and packing-densities rise, issues of parasitic capacitance and circuit speed become increasingly important. The use of thin-film silicon-on-insulator (TFSOI) substrates for device fabrication is being explored in order to increase switching speeds. One version of TFSOI being explored for device fabrication is SIMOX (Silicon-separation by Implanted OXygen).A buried oxide layer is created by highdose oxygen implantation into silicon wafers followed by annealing to cause coalescence of oxide regions into a continuous layer. A thin silicon layer remains above the buried oxide (~220 nm Si after additional thinning). Device structures can now be fabricated upon this thin silicon layer.Current fabrication of metal-oxidesemiconductor field-effect transistors (MOSFETs) requires formation of a polysilicon/oxide gate between source and drain regions. Contact to the source/drain and gate regions is typically made by use of TiSi2 layers followedby Al(Cu) metal lines. TiSi2 has a relatively low contact resistance and reduces the series resistance of both source/drain as well as gate regions

An Overview of 300 mm SOI Starting Wafer Quality and Its Yield Detractors

2005 ◽  
Author(s):  
Pei Y. Tsai ◽  
Junedong Lee ◽  
Paul Ronsheim ◽  
Lindsay Burns ◽  
Richard Murphy ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Device Fabrication ◽  
Sampling Plan ◽  
Silicon On Insulator ◽  
Manufacturing Processes ◽  
Circuit Performance ◽  
Characterization Techniques ◽  
Wafer Manufacturing

Abstract A stringent sampling plan is developed to monitor and improve the quality of 300mm SOI (silicon on insulator) starting wafers procured from the suppliers. The ultimate goal is to obtain the defect free wafers for device fabrication and increase yield and circuit performance of the semiconductor integrated circuits. This paper presents various characterization techniques for QC monitor and examples of the typical defects attributed to wafer manufacturing processes.

Silicon on Insulator by High Dose Implantation

1984 ◽  
Vol 33 ◽  
Author(s):  
P. L. F. Hemment
Keyword(s):  
Physical Properties ◽  
Thermal Processing ◽  
Vlsi Circuits ◽  
Silicon On Insulator ◽  
High Dose ◽  
High Current ◽  
Processing Technologies ◽  
Oxygen Ions ◽  
High Doses ◽  
High Dose Implantation

ABSTRACTSilicon on insulator structures consisting of a buried dielectric, formed by the implantation of high doses of oxygen ions, have been shown to be suitable substrates for LSI circuits. The substrates are compatible with present silicon processing technologies and are confidently expected to be suitable for VLSI circuits. In this paper the microstructure and physical properties of this SOI material will be described and the dependence of these characteristics upon the implantation conditions and subsequent thermal processing will be discussed. With this information, it is then possible to outline the specification for a high current oxygen implanter.

Submicron mapping of strained silicon-on-insulator features induced

2007 ◽  
Vol 90 (17) ◽  
pp. 171919 ◽  
Author(s):  
Conal E. Murray ◽  
M. Sankarapandian ◽  
S. M. Polvino ◽  
I. C. Noyan ◽  
B. Lai ◽  
...  
Keyword(s):  
Silicon On Insulator ◽  
Strained Silicon

Observation of Crystalline Imperfections in Supercritical Thickness Strained Silicon on Insulator Wafers by Synchrotron X-ray Topography

2019 ◽  
Vol 16 (10) ◽  
pp. 539-543 ◽  
Author(s):  
Takayoshi Shimura ◽  
Tomoyuki Inoue ◽  
Yuki Okamoto ◽  
Takuji Hosoi ◽  
Hiroki Edo ◽  
...  
Keyword(s):  
Silicon On Insulator ◽  
Strained Silicon ◽  
X Ray

An Electrical Characterization of Sol Films Using Devices Formed by Oxygen Implant and Rapid Thermal Processing

1987 ◽  
Vol 92 ◽  
Author(s):  
Jim D. Whitfield ◽  
Marie E. Burnham ◽  
Charles J. Varker ◽  
Syd.R. Wilson
Keyword(s):  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
High Energy ◽  
Thermally Grown Oxide ◽  
Silicon On Insulator ◽  
Wafer Surface ◽  
High Dose ◽  
Active Device ◽  
Insulating Layer ◽  
Oxygen Implantation

The advantages of Silicon-on-Insulator (SO) devices over bulk Silicon devices are well known (speed, radiation hardened, packing density, latch up free CMOS,). In recent years, much effort has been made to form a thin, buried insulating layer just below the active device region. Several approaches are being developed to fabricate such a buried insulating layer. One viable approach is by high dose, high energy oxygen implantation directly into the silicon wafer surface (1-3). With proper implant and annealing conditions, a thin stoichiometric buried oxide with a good crystalline quality silicon overlayer can be formed on which an epitaxial layer can be grown and functional devices and circuits built. As SO1 circuits become market viable, mass production tools and techniques are being developed and evaluated. Of particular interest here is the evaluation of high current oxygen implantation with rapid thermal processing on the electrical characteristics of the oxide-silicon interfaces, the silicon overlayer and the thermally grown oxide on the top surface using measurements on gated diodes and guarded capacitors.

scholarly journals Applications of laser annealing in silicon device fabrication

1981 ◽  
Author(s):  
L. D. Hess ◽  
S. A. Kokorowski ◽  
G. L. Olson
Keyword(s):  
Laser Annealing ◽  
Device Fabrication ◽  
Silicon Device
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