A high performance 50 nm PMOSFET using decaborane (B/sub 10/H/sub 14/) ion implantation and 2-step activation annealing process

Author(s):  
K.-I. Goto ◽  
J. Matsuo ◽  
Y. Tada ◽  
T. Tanaka ◽  
Y. Momiyama ◽  
...  
2009 ◽  
Vol 615-617 ◽  
pp. 477-480 ◽  
Author(s):  
Masahiro Nagano ◽  
Hidekazu Tsuchida ◽  
Takuma Suzuki ◽  
Tetsuo Hatakeyama ◽  
Junji Senzaki ◽  
...  

Defect formation during the ion implantation/annealing process in 4H-SiC epilayers is investigated by synchrotron reflection X-ray topography. The 4H-SiC epilayers are subjected to an activation annealing process after Aluminum ions being implanted in the epilayers. The formation modes of extended defects induced by the implantation/annealing process are classified into the migration of preexisting dislocations and the generation of new dislocations/stacking faults. The migration of preexisting basal plane dislocations (BPDs) takes place corresponding to the ion implantation interface or the epilayer/substrate interface. The generation of new dislocations/stacking faults is confirmed as the formation of Shockley faults near the surface of the epilayer and BPD half-loops in the epilayer.


2008 ◽  
Vol 600-603 ◽  
pp. 611-614 ◽  
Author(s):  
Masahiro Nagano ◽  
Hidekazu Tsuchida ◽  
Takuma Suzuki ◽  
Tetsuo Hatakeyama ◽  
Junji Senzaki ◽  
...  

Defect formation during the ion-implantation/annealing process in 4H-SiC epilayers is investigated by X-ray topography, KOH etching analysis and transmission electron microscopy. Nitrogen and phosphorus ions are implanted in the 4H-SiC epilayers and then activation annealing is performed at 1670 °C. Linearly arrayed or clustered extended defects are found to be formed during the implantation/annealing process by comparing X-ray topography images taken before and after the process. It is confirmed that the defect arrays are formed underneath a shallow groove on the surface and consist of a high density of basal-plane Shockley-type stacking faults.


2010 ◽  
Vol 645-648 ◽  
pp. 323-326 ◽  
Author(s):  
Masahiro Nagano ◽  
Hidekazu Tsuchida ◽  
Takuma Suzuki ◽  
Tetsuo Hatakeyama ◽  
Junji Senzaki ◽  
...  

Condition dependences of defect formation in 4H-SiC epilayer induced by the implantation/annealing process were investigated using synchrotron reflection X-ray topography and transmission electron microscopy. Nitrogen, phosphorus or aluminum ions were implanted in the 4H-SiC epilayers and then activation annealing was performed. To compare the implantation/annealing process, a sample receiving only the annealing treatment without the implantation was also performed. Two different crucibles (conventional and improved) were used in the annealing process. The formation of single layer Shockley-type stacking faults near the surface was found to have no ion-implantation condition or crucible dependence. The formation of BPD half-loops and the glide of pre-existing BPDs showed clear dependence on the crucibles.


2018 ◽  
Vol 924 ◽  
pp. 345-348
Author(s):  
Norihito Yabuki ◽  
Satoshi Torimi ◽  
Satoru Nogami ◽  
Makoto Kitabatake ◽  
Tadaaki Kaneko

We propose the Si-vapor ambient anneal as a cap-free activation annealing (A/A) method for Silicon Carbide (SiC) using Tantalum Carbide / Tantalum composite materials (TaC/Ta). This method prevents the roughening of SiC surface by controlling the process function without conventional Carbon (C)-cap [1,2]. In this report, we evaluated the warping behavior of SiC wafer to confirm the effect of ion implantation (I/I) temperature (TI/I) and epi-ready treatment using Si-vapor ambient anneal. Wafer warp suppressing effect of high temperature I/I was confirmed and large wafer warpage occurred due to thinning of the wafer thickness. Furthermore we also observed the simultaneous improvement of the sharp edge shape and sidewall roughness of the trench under the appropriate conditions of the Si-vapor ambient anneal. It is possible to shape the round shape of the trench edge and to improve the roughness of trench sidewall by Si-vapor ambient anneal simultaneously with activation annealing process.


2008 ◽  
Vol 600-603 ◽  
pp. 585-590
Author(s):  
Ryo Hattori ◽  
Tomokatsu Watanabe ◽  
T. Mitani ◽  
Hiroaki Sumitani ◽  
Tatsuo Oomori

Crystalline recovery mechanism in the activation annealing process of Al implanted 4H-SiC crystals were experimentally investigated. Annealing temperature and annealing time dependence of acceptor activation and activated hole’s behavior were examined. Poly-type recovery from the implantation induced lattice disordering during the annealing was investigated. The existence of meta-stable crystalline states for acceptor activation, and related scattering centers due to annealing is reported To achieve 100% acceptor activation and to reduce strain after ion implantation, annealing at 2000°C for 10 min. was required.


2021 ◽  
Vol 11 (1) ◽  
Author(s):  
Jeongpil Kim ◽  
Jeong-Hyun Eum ◽  
Junhyeok Kang ◽  
Ohchan Kwon ◽  
Hansung Kim ◽  
...  

AbstractHerein, we introduce a simple method to prepare hierarchical graphene with a tunable pore structure by activating graphene oxide (GO) with a two-step thermal annealing process. First, GO was treated at 600 °C by rapid thermal annealing in air, followed by subsequent thermal annealing in N2. The prepared graphene powder comprised abundant slit nanopores and micropores, showing a large specific surface area of 653.2 m2/g with a microporous surface area of 367.2 m2/g under optimized conditions. The pore structure was easily tunable by controlling the oxidation degree of GO and by the second annealing process. When the graphene powder was used as the supercapacitor electrode, a specific capacitance of 372.1 F/g was achieved at 0.5 A/g in 1 M H2SO4 electrolyte, which is a significantly enhanced value compared to that obtained using activated carbon and commercial reduced GO. The performance of the supercapacitor was highly stable, showing 103.8% retention of specific capacitance after 10,000 cycles at 10 A/g. The influence of pore structure on the supercapacitor performance was systematically investigated by varying the ratio of micro- and external surface areas of graphene.


1981 ◽  
Vol 7 ◽  
Author(s):  
B.S. Elman ◽  
H. Mazurek ◽  
M.S. Dresselhaus ◽  
G. Dresselhaus

ABSTRACTRaman spectroscopy is used in a variety of ways to monitor different aspects of the lattice damage caused by ion implantation into graphite. Particular attention is given to the use of Raman spectroscopy to monitor the restoration of lattice order by the annealing process, which depends critically on the annealing temperature and on the extent of the original lattice damage. At low fluences the highly disordered region is localized in the implanted region and relatively low annealing temperatures are required, compared with the implantation at high fluences where the highly disordered region extends all the way to the surface. At high fluences, annealing temperatures comparable to those required for the graphitization of carbons are necessary to fully restore lattice order.


2012 ◽  
Vol 101 (11) ◽  
pp. 112101 ◽  
Author(s):  
M. A. Myers ◽  
M. T. Myers ◽  
M. J. General ◽  
J. H. Lee ◽  
L. Shao ◽  
...  

2006 ◽  
Vol 27 (4) ◽  
pp. 205-207 ◽  
Author(s):  
F. Recht ◽  
L. McCarthy ◽  
S. Rajan ◽  
A. Chakraborty ◽  
C. Poblenz ◽  
...  

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