High Temperature Silicon Integrated Circuits and Passive Components for Commercial and Military Applications

1999 ◽  
Vol 121 (4) ◽  
pp. 622-628 ◽  
Author(s):  
R. R. Grzybowski ◽  
B. Gingrich

Advances in silicon-on-insulator (SOI) integrated circuit technology and the steady development of wider band gap semiconductors like silicon carbide are enabling the practical deployment of high temperature electronics. High temperature civilian and military electronics applications include distributed controls for aircraft, automotive electronics, electric vehicles and instrumentation for geothermal wells, oil well logging, and nuclear reactors. While integrated circuits are key to the realization of complete high temperature electronic systems, passive components including resistors, capacitors, magnetics, and crystals are also required. This paper will present characterization data obtained from a number of silicon high temperature integrated evaluated over a range of elevated temperatures and aged at a selected high temperature. This paper will also present a representative cross section of high temperature passive component characterization data for device types needed by many applications. Device types represented will include both small signal and power resistors and capacitors. Specific problems encountered with the employment of these devices in harsh environments will be discussed for each family of components. The goal in presenting this information is to demonstrate the viability of a significant number of commercially available silicon integrated circuits and passive components that operate at elevated temperatures as well as to encourage component suppliers to continue to optimize a selection of their product offerings for operation at higher temperatures. In addition, systems designers will be encouraged to view this information with an eye towards the conception and implementation of reliable and affordable high temperature systems.


Author(s):  
Richard R. Grzybowski ◽  
Ben Gingrich

Advances in silicon-on-insulator (SOI) integrated circuit technology and the steady development of wider band gap semiconductors like silicon carbide are enabling the practical deployment of high temperature electronics. High temperature civilian and military electronics applications include distributed controls for aircraft, automotive electronics, electric vehicles and instrumentation for geothermal wells, oil well logging and nuclear reactors. While integrated circuits are key to the realization of complete high temperature electronic systems, passive components including resistors, capacitors, magnetics and crystals are also required. This paper will present characterization data obtained from a number of silicon high temperature integrated evaluated over a range of elevated temperatures and aged at a selected high temperature. This paper will also present a representative cross section of high temperature passive component characterization data for device types needed by many applications. Device types represented will include both small signal and power resistors and capacitors. Specific problems encountered with the employment of these devices in harsh environments will be discussed for each family of components. The goal in presenting this information is to demonstrate the viability of a significant number of commercially available silicon integrated circuits and passive components that operate at elevated temperatures as well as to encourage component suppliers to continue to optimize a selection of their product offerings for operation at higher temperatures. In addition, systems designers will be encouraged to view this information with an eye toward the conception and implementation of reliable and affordable high temperature systems.



2014 ◽  
Vol 1693 ◽  
Author(s):  
David T. Clark ◽  
Robin F. Thompson ◽  
Aled E. Murphy ◽  
David A. Smith ◽  
Ewan P. Ramsay ◽  
...  

ABSTRACTWe present the characteristics of a high temperature CMOS integrated circuit process based on 4H silicon carbide designed to operate at temperatures beyond 300°C. N-channel and P-channel transistor characteristics at room and elevated temperatures are presented. Both channel types show the expected low values of field effect mobility well known in SiC MOSFETS. However the performance achieved is easily capable of exploitation in CMOS digital logic circuits and certain analogue circuits, over a wide temperature range.Data is also presented for the performance of digital logic demonstrator circuits, in particular a 4 to 1 analogue multiplexer and a configurable timer operating over a wide temperature range. Devices are packaged in high temperature ceramic dual in line (DIL) packages, which are capable of greater than 300°C operation. A high temperature “micro-oven” system has been designed and built to enable testing and stressing of units assembled in these package types. This system heats a group of devices together to temperatures of up to 300°C while keeping the electrical connections at much lower temperatures. In addition, long term reliability data for some structures such as contact chains to n-type and p-type SiC and simple logic circuits is summarized.



2011 ◽  
Vol 20 (03) ◽  
pp. 471-484 ◽  
Author(s):  
LIANG ZUO ◽  
ROBERT GREENWELL ◽  
SYED K. ISLAM ◽  
M. A. HUQUE ◽  
BENJAMIN J. BLALOCK ◽  
...  

In recent years, increasing demand for hybrid electric vehicles (HEVs) has generated the need for reliable and low-cost high-temperature electronics which can operate at the high temperatures under the hood of these vehicles. A high-voltage and high temperature gate-driver integrated circuit for SiC FET switches with short circuit protection has been designed and implemented in a 0.8-micron silicon-on-insulator (SOI) high-voltage process. The prototype chip has been successfully tested up to 200°C ambient temperature without any heat sink or cooling mechanism. This gate-driver chip can drive SiC power FETs of the DC-DC converters in a HEV, and future chip modifications will allow it to drive the SiC power FETs of the traction drive inverter. The converter modules along with the gate-driver chip will be placed very close to the engine where the temperature can reach up to 175ΰC. Successful operation of the chip at this temperature with or without minimal heat sink and without liquid cooling will help achieve greater power-to-volume as well as power-to-weight ratios for the power electronics module.



2018 ◽  
Vol 2018 (HiTEC) ◽  
pp. 000039-000044
Author(s):  
Charlie Beebout ◽  
Erick M. Spory

ABSTRACT Many integrated circuits (ICs) will operate well above their maximum rated temperature of +70°C or +125°C, but are often not packaged appropriately to reliably endure temperatures above +150C. Specifically, the original gold or copper bonds on the aluminum die bond pads are prone to Kirkendall or Horsting voiding, particularly at temperatures greater than +150°C. Also the mold compounds used in plastic packaging for IC assembly can degrade at these elevated temperatures. In some cases, commercial demand for higher temperature reliability can justify a separate offering of ICs assembled in hermetic, ceramic packages from the original component manufacturer (OCM). However, in most cases, the market demand is deemed insufficient. Global Circuit Innovations (GCI) has developed a high-yielding process, which can remove a semiconductor die (i.e., computer chip) from a plastic package, remove the original bond wires and/or ball bonds, plate the aluminum die bond pads with Electroless Nickel, Electroless Palladium, and Immersion Gold (ENEPIG), and then reassemble the now improved semiconductor die into a hermetic, ceramic package. Device Extraction, ENEPIG die bond pad plating and Repackaging (DEER) provides an improved die bond pad surface such that works well with either gold or aluminum bond wires in applications up to +250°C without mechanical or electrical connectivity degradation. GCI routinely exposes sample devices to +250°C bakes with 100% post bake yields so as to continuously ensure that any device processed with the DEER technology will reliably perform in high-temperature environments. Although the oil and gas industry has already expressed significant interest in the DEER process, with excellent lifetest and production application results demonstrating dramatically increased component lifetimes at elevated temperatures, this technology can also be leveraged for any application exposing ICs to harsh environments. Not only is the high-temperature reliability dramatically increased, but also the new hermetic, ceramic package protects the IC from a variety of elements and environments (i.e., corrosives and moisture).



2015 ◽  
Vol 2015 (HiTEN) ◽  
pp. 000123-000128
Author(s):  
Erick M. Spory

There is an ever-increasing demand for electronics in higher temperature applications, both in variety and volume. In many cases, the actual integrated circuit within the plastic packaging can support operation at higher temperatures, although the packaging and connectivity is unable to do so. Ultimately, there still remains a significant gap in the volume demand required for high temperature integrated circuit lines to justify support of more expensive ceramic solutions by the original component manufacturer vs. the cheaper, high-volume PEM flows. Global Circuit Innovations, Inc. has developed a manufacturable, cost-effective solution to extract the integrated circuit from any plastic encapsulated device and subsequently re-package that device into an identical ceramic footprint, with the ability to maintain high-integrity connectivity to the device and enabling functionality for 1000's of hours at temperatures at 250C and beyond. This process represents a high-value added solution to provide high-temperature integrated circuits for a large spectrum of requirements: low-volume, quick-turn evaluation of integrated circuit prototyping, as well as medium to high-volume production needs for ongoing production needs. Although both die extraction and integrated circuit pad electroless nickel/gold plating have both been performed successfully for many years in the semiconductor industry, Global Circuit Innovations, Inc. has been able to combine the two in a reliable, volume manufacturing flow to satisfy many of the stringent requirements for high-temperature applications.



2016 ◽  
Vol 13 (4) ◽  
pp. 143-154 ◽  
Author(s):  
Jim Holmes ◽  
A. Matthew Francis ◽  
Ian Getreu ◽  
Matthew Barlow ◽  
Affan Abbasi ◽  
...  

In the last decade, significant effort has been expended toward the development of reliable, high-temperature integrated circuits. Designs based on a variety of active semiconductor devices including junction field-effect transistors and metal-oxide-semiconductor (MOS) field-effect transistors have been pursued and demonstrated. More recently, advances in low-power complementary MOS (CMOS) devices have enabled the development of highly integrated digital, analog, and mixed-signal integrated circuits. The results of elevated temperature testing (as high as 500°C) of several building block circuits for extended periods (up to 100 h) are presented. These designs, created using the Raytheon UK's HiTSiC® CMOS process, present the densest, lowest-power integrated circuit technology capable of operating at extreme temperatures for any period. Based on these results, Venus nominal temperature (470°C) transistor models and gate-level timing models were created using parasitic extracted simulations. The complete CMOS digital gate library is suitable for logic synthesis and lays the foundation for complex integrated circuits, such as a microcontroller. A 16-bit microcontroller, based on the OpenMSP 16-bit core, is demonstrated through physical design and simulation in SiC-CMOS, with an eye for Venus as well as terrestrial applications.



MRS Bulletin ◽  
1992 ◽  
Vol 17 (8) ◽  
pp. 34-38 ◽  
Author(s):  
Ronald H. Ono

The realization of a revolutionary generation of electronics based on high-temperature superconductors (HTS) crucially depends on the ability to make high-quality thin film microstructures. These will incorporate materials such as YBa2Cu3O7-δ (YBCO), TlBaCaCuO, or BiSrCaCuO in a fashion similar to the circuits and devices made of their low Tc counterparts Nb or NbN. Without exception, the most valuable structures will be composed of multiple layers of superconducting films and dielectrics, in some cases combined with normal metals, low-temperature superconductors, or a variety of semiconductors. Generically, these can be combined in two ways: in a hybrid design where specialized packages and bonding are used to attach dissimilar materials, or in a monolithic thin film structure such as the one seen in Figure 1.The division between hybrid and monolithic multilayers results from the historical development of electronic circuits. Hybrid designs typically require linewidths and alignment accuracy somewhat less demanding than those used in fully integrated circuits. The advantage of hybrid construction is the separation of incompatible processing steps onto different substrates or die. The monolithic integrated circuit, whether microelectronic, millimeter wave, or radio frequency, can be made in large batches with concomitant economy of scale and can be fabricated with fewer parasitic constraints. Superconducting integrated circuits have followed the semiconductor pattern of being developed in a hybrid fashion, then transferred to a fully integrated process.



1985 ◽  
Vol 28 (6) ◽  
pp. 24-26
Author(s):  
Michael Bustamante ◽  
Garrett Hicks

This paper describes the methods used by Chrysler Huntsville Automotive Electronics to obtain the quality, durability and reliability characteristics needed to fulfill the 193,200-km (120,000 mile) field performance requirements for Chrysler engine controls, radios and other electronic feature products. The paper will describe a case history, including the steps taken by both Chrysler Huntsville Automotive Electronics plant and one of their integrated circuit suppliers to attain certain quality levels.



Author(s):  
C. O. Jung ◽  
S. Visitsemgtrakul ◽  
S.J. Krause ◽  
P. Roitman ◽  
B. Cordts

Oxygen implanted silicon-on-insulator material, SIMOX, (Separation by IMplanted Oxygen) provides improved speed and radiation hardness over bulk silicon for integrated circuits which are built on the thin superficial Si layer above the buried oxide layer. A high quality superficial Si layer is required, but may be degraded by high defect densities of 109 to 1010 cm-2 in annealed SIMOX. Defect densities have been reduced down to 106cm-2 or less. They were achieved with a final high temperature annealing step (1300-1400°C) in conjunction with: a) high temperature implantation or; b) channeling implantation or; c) multiple cycle implantation. The defect structure developed during implantation, which is strongly affected by temperature, plays a significant role in the defect structure in the annealed material. In this work we are reporting on the effect of implantation temperature on defect formation and also some new details on the structure of the defects that are present.



2011 ◽  
Vol 2011 (HITEN) ◽  
pp. 000039-000045 ◽  
Author(s):  
Kun Fang ◽  
Rui Zhang ◽  
Tami Isaacs-Smith ◽  
R. Wayne Johnson ◽  
Emad Andarawis ◽  
...  

Digital silicon carbide integrated circuits provide enhanced functionality for electronics in geothermal, aircraft and other high temperature applications. A multilayer thin film substrate technology has been developed to interconnect multiple SiC devices along with passive components. The conductor is vacuum deposited Ti/Ti:W/Au followed by an electroplated Au. A PECVD silicon nitride is used for the interlayer dielectric. Adhesion testing of the conductor and the dielectric was performed as deposited and after aging at 320°C. The electrical characteristics of the dielectric as a function of temperature were measured. Thermocompression flip chip bonding of Au stud bumped SiC die was used for electrical connection of the digital die to the thin film substrate metallization. Since polymer underfills are not compatible with 300°C operation, AlN was used as the base ceramic substrate to minimize the coefficient of thermal expansion mismatch between the SiC die and the substrate. Initial die shear results are presented.



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