Optimization of Thermoelectric Coolers for Hotspot Cooling in Three-Dimensional Stacked Chips

2014 ◽  
Vol 137 (1) ◽  
Author(s):  
Matthew Redmond ◽  
Satish Kumar

Three-dimensional (3D) chip stacking architecture is expected to reduce form factor, improve performance, and decrease power consumption in future microelectronics. High power density and nonuniform power distribution in stacked dies are expected to bring significant thermal challenges for 3D packages due to localized hot spots. Embedded thermoelectric coolers (TECs) have potential to provide reliable and localized cooling at these hot spots. In this work, peak package temperature or active cooling per power consumption of TECs are optimized, considering applied current and thickness of TECs as parameters, for a 3D electronic package with two stacked dies. Each die has two hot spots and one TEC is paired with each hot spot. Three different optimization methods are considered in order to ensure a robust solution. The optimization suggests that both the peak temperature in package and energy efficiency of the cooling system can be significantly improved through the optimization of TECs. TECs are also compared against a configuration where they are replaced by copper blocks or thermal vias. A total of 4.7 °C of additional localized cooling is observed using TECs which is beyond what is achievable with copper vias in place of the TECs. The study also suggests that it is better to use TECs to cool only the hottest portions of the package to avoid introducing additional thermal resistance and Joule heating in the package.

Author(s):  
Duccio Griffini ◽  
Massimiliano Insinna ◽  
Simone Salvadori ◽  
Francesco Martelli

A high-pressure vane equipped with a realistic film-cooling configuration has been studied. The vane is characterized by the presence of multiple rows of fan-shaped holes along pressure and suction side while the leading edge is protected by a showerhead system of cylindrical holes. Steady three-dimensional Reynolds-Averaged Navier-Stokes (RANS) simulations have been performed. A preliminary grid sensitivity analysis with uniform inlet flow has been used to quantify the effect of spatial discretization. Turbulence model has been assessed in comparison with available experimental data. The effects of the relative alignment between combustion chamber and high-pressure vanes are then investigated considering realistic inflow conditions in terms of hot spot and swirl. The inlet profiles used are derived from the EU-funded project TATEF2. Two different clocking positions are considered: the first one where hot spot and swirl core are aligned with passage and the second one where they are aligned with the leading edge. Comparisons between metal temperature distributions obtained from conjugate heat transfer simulations are performed evidencing the role of swirl in determining both the hot streak trajectory within the passage and the coolant redistribution. The leading edge aligned configuration is resulted to be the most problematic in terms of thermal load, leading to increased average and local vane temperature peaks on both suction side and pressure side with respect to the passage aligned case. A strong sensitivity of both injected coolant mass flow and heat removed by heat sink effect has also been highlighted for the showerhead cooling system.


2016 ◽  
Vol 138 (1) ◽  
Author(s):  
Herman Oprins ◽  
Vladimir Cherman ◽  
Geert Van der Plas ◽  
Joeri De Vos ◽  
Eric Beyne

In this paper, we present the experimental characterization of three-dimensional (3D) packages using a dedicated stackable test chip. An advanced complementary metal oxide silicon (CMOS) test chip with programmable power distribution has been designed, fabricated, stacked, and packaged in molded and bare die 3D packages. The packages have been experimentally characterized in test sockets with and without cooling and soldered to the printed circuit board (PCB). Using uniform and localized hot spot power distribution, the thermal self-heating and thermal coupling resistance and the lateral spreading in the 3D packages have been studied. Furthermore, the measurements have been used to characterize the thermal properties of the die–die interface and to calibrate a thermal model for the calculation of equivalent properties of underfilled μbump arrays. This model has been applied to study the tradeoff between the standoff height reduction and the underfill thermal conductivity increase in order to reduce the interdie thermal resistance.


Author(s):  
Mohammad Rouhi Moghanlou ◽  
Hamed Saeidi Googarchin

In this paper, transient coupled thermo-mechanical finite element analysis of a three-dimensional model of braking pairs (brake disk and brake pads) is accomplished in order to estimate temperatures and stresses in brake disk during a braking cycle, including braking and cooling phases, and calculate fatigue life. A nonuniform distribution of temperatures is revealed on the surface of the brake disk, gradually generating surface hot spots and hot bands with temperatures up to 800 °C that lead to an uneven distribution of thermal stresses on the frictional surfaces. According to the simulations, variations in the circumferential stress, which is mainly responsible for the cracking of the brake disk, can reach up to 400 MPa in the hot spot areas, depending on the braking configurations. The numerical results are also used to estimate the fatigue life of brake disk using the Smith–Watson–Topper model. The numerical model demonstrates a high accuracy of fatigue life estimation when evaluated by prior experimental studies, signifying the effects of hot spots in reducing the service life of brake disk. Results of the fatigue life estimation show superiority to the analytical method both in the accuracy of calculation and detection of the failure location.


Author(s):  
Matthew Redmond ◽  
Kavin Manickaraj ◽  
Owen Sullivan ◽  
Satish Kumar

Three dimensional (3D) technologies with stacked chips have the potential to provide new chip architecture, improved device density, performance, efficiency, and bandwidth. Their increased power density also can become a daunting challenge for heat removal. Furthermore, power density can be highly non-uniform leading to time and space varying hotspots which can severely affect performance and reliability of the integrated circuits. Thus, it is important to mitigate thermal gradients on chip while considering the associated cooling costs. One method of thermal management currently under investigation is the use of superlattice thermoelectric coolers (TECs) which can be employed for on demand and localized cooling. In this paper, a detailed 3D thermal model of a stacked electronic package with two dies and four ultrathin integrated TECs is studied in order to investigate the efficacy of TECs in hot spot cooling for a 3D technology. We observe up to 14.6 °C of cooling at a hot spot inside the package by TECs. A strong vertical coupling has been observed between the TECs located in top and bottom dies. Bottom TECs can detrimentally heat the top hotspots in both steady state and transient operation. TECs need to be carefully placed inside the package to avoid such undesired heating. Thermal contact resistances between dies, inside the TEC module, and between the TEC and heat spreader are shown to have a crucial effect on TEC performance inside the package. We observed that square root current pulse can provide very efficient short-duration transient cooling at hotspots.


2012 ◽  
Vol 134 (2) ◽  
Author(s):  
Owen Sullivan ◽  
Man Prakash Gupta ◽  
Saibal Mukhopadhyay ◽  
Satish Kumar

Site-specific on-demand cooling of hot spots in microprocessors can reduce peak temperature and achieve a more uniform thermal profile on chip, thereby improve chip performance and increase the processor’s life time. An array of thermoelectric coolers (TECs) integrated inside an electronic package has the potential to provide such efficient cooling of hot spots on chip. This paper analyzes the potential of using multiple TECs for hot spot cooling to obtain favorable thermal profile on chip in an energy efficient way. Our computational analysis of an electronic package with multiple TECs shows a strong conductive coupling among active TECs during steady-state operation. Transient operation of TECs is capable of driving cold-side temperatures below steady-state values. Our analysis on TEC arrays using current pulses shows that the effect of TEC coupling on transient cooling is weak. Various pulse profiles have been studied to illustrate the effect of shape of current pulse on the operation of TECs considering crucial parameters such as total energy consumed in TECs peak temperature on the chip, temperature overshoot at the hot spot and settling time during pulsed cooling of hot spots. The square root pulse profile is found to be the most effective with maximum cooling and at half the energy expenditure in comparison to a constant current pulse. We analyze the operation of multiple TECs for cooling spatiotemporally varying hot spots. The analysis shows that the transient cooling using high amplitude current pulses is beneficial for short term infrequent hot spots, but high amplitude current pulse cannot be used for very frequent or long lasting hot spots.


Author(s):  
Phil Paik ◽  
Vamsee K. Pamula ◽  
Krishnendu Chakrabarty

Thermal management is becoming an increasingly important issue in integrated circuit (IC) design. The ability to cool ICs is quickly reaching a limit with today’s package-level solutions. While a number of novel cooling methods have been introduced, many of which are microfluidic approaches, these methods are unable to adaptively address the uneven thermal profiles and hot-spots generated in high performance ICs. In this paper, we present a droplet-based digital microfluidic cooling system for ICs that can adaptively cool hot-spots through real-time reprogrammable flow. This paper characterizes the effectiveness of microliter-sized droplets for cooling by determining the heat transfer coefficient of a droplet shuttling back and forth in an open system over a hot-spot at various speeds. Cooling is found to be significantly enhanced at higher flow rates of droplets. In order to further enhance cooling, the effect of varying droplet aspect ratio (width/height) in a confined system was also studied.


2015 ◽  
Vol 138 (2) ◽  
Author(s):  
Duccio Griffini ◽  
Massimiliano Insinna ◽  
Simone Salvadori ◽  
Francesco Martelli

A high-pressure vane (HPV) equipped with a realistic film-cooling configuration has been studied. The vane is characterized by the presence of multiple rows of fan-shaped holes along pressure and suction side, while the leading edge (LE) is protected by a showerhead system of cylindrical holes. Steady three-dimensional Reynolds-averaged Navier–Stokes simulations have been performed. A preliminary grid sensitivity analysis with uniform inlet flow has been used to quantify the effect of spatial discretization. Turbulence model has been assessed in comparison with available experimental data. The effects of the relative alignment between combustion chamber and HPVs are then investigated, considering realistic inflow conditions in terms of hot spot and swirl. The inlet profiles used are derived from the EU-funded project TATEF2. Two different clocking positions are considered: the first in which hot spot and swirl core are aligned with passage; and the second in which they are aligned with the LE. Comparisons between metal temperature distributions obtained from conjugate heat transfer (CHT) simulations are performed, evidencing the role of swirl in determining both the hot streak trajectory within the passage and the coolant redistribution. The LE aligned configuration is determined to be the most problematic in terms of thermal load, leading to increased average and local vane temperature peaks on both suction side and pressure side with respect to the passage-aligned case. A strong sensitivity to both injected coolant mass flow and heat removed by heat sink effect has also been highlighted for the showerhead cooling system.


Galaxies ◽  
2021 ◽  
Vol 9 (4) ◽  
pp. 110
Author(s):  
Dmitry Bisikalo ◽  
Andrey Sobolev ◽  
Andrey Zhilkin

In this paper, the characteristics of hot spots on an accretor surface are investigated for two types of polars: the eclipsing synchronous polar V808 Aur and the non-eclipsing asynchronous polar CD Ind in configuration of an offset and non-offset magnetic dipole. The drift of hot spots is analyzed based on the results of numerical calculations and maps of the temperature distribution over the accretor surface. It is shown that a noticeable displacement of the spots is determined by the ratio of ballistic and magnetic parts of the jet trajectory. In the synchronous polar, the dominant influence on the drift of hot spots is exerted by variations in the mass transfer rate, which entail a change in the ballistic part of the trajectory. It was found that when the mass transfer rate changes within the range of 10−10M⊙/year to 10−7M⊙/year, the displacement of the hot spot in latitude and longitude can reach 30∘. In the asynchronous polar, a change in the position of hot spots is mainly defined by the properties of the white dwarf magnetosphere, and the displacement of hot spots in latitude and longitude can reach 20∘.


Author(s):  
Younghyeon Kim ◽  
Yoora Choi ◽  
Sangseok Yu

Abstract The cooling system of an electric vehicle adopts an electric water pump. Since the lifespan of the battery is very sensitive to a very narrow temperature band, the cooling system provides key solutions. The electric water pump is a core component of the cooling system which satisfies performance and durability criteria. Since, a local hot spot of motor casing results in the degradation of motor lifespan, it is necessary to design the motor casing for effective heat rejection. In this study, two different motor casing designs are applied to reject the joule heating of the motor efficiently. The temperature distribution of each casing is investigated with an IR camera. The IR camera was used to identify the local hot spot where the heat was most generated in the pump. Since the joule heating is proportional to pump power, it is necessary to understand the operating characteristics of the electric water pump. The experimental apparatus includes a water reservoir, a bypass valve, pressure and temperature sensors, DAQ, and IR camera. The operating temperature is ranged from atmospheric temperature to 50°C. When the pump is operated with 25°C coolant, each experiment takes 1 hour for the steady-state conditions and maximum temperature up to 55 °C. Three different pump performance are investigated with two different pump casing. The coolant temperature is also changed from 25 °C to 50 °C. As a result, the local hot spot is strongly dependent to pump load and it is mainly observed near the cable connector. Since temperature distribution on the casing surface is also affected by local hot spots, it is necessary to optimize heat rejection by extended surface.


Author(s):  
Viatcheslav Litvinovitch ◽  
Avram Bar-Cohen

Shrinking feature size and increasing transistor density, combined with the high performance demanded from next-generation microprocessors and other electronic components, have lead to the emergence of severe on-chip “hot spots,” with heat fluxes approaching — and at times exceeding — 1 kW/cm2. The cost-effective thermal management of such chips requires the introduction and refinement of novel cooling techniques. Mini-contact enhanced, miniaturized thermoelectric coolers (TECs) have been shown to be a viable approach for the remediation of on-chip hot spots, but their performance is constrained by the thermal resistance introduced by the attachment of this thermal management device. This paper uses a detailed finite-element package-level model to examine the parasitic effects of the thermal contact resistance (at the interfaces of the mini-contact and TEC) on the cooling efficacy of this thermal solution. Particular attention is devoted to the deleterious effect of contact resistance on the thermoelectric leg height and the mini-contact size required to achieve the greatest hot spot temperature reduction on the chip. Data from experiments with TECs (with a leg height of 130 μm) combined with several sizes of mini-contact pads, are used to validate the modeling approach and the overall conclusions.


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