Checking Application Level Properties Using Assertion Synthesis

2019 ◽  
Author(s):  
Matthias Wenzl ◽  
Peter Roessler ◽  
Andreas Puhm
Keyword(s):  
Embedded System ◽  
Integrated Circuit ◽  
High Speed ◽  
Logic Synthesis ◽  
Automatic Generation ◽  
Use Case ◽  
Property Specification ◽  
Digital Hardware ◽  
Circuit Description ◽  
Future Work

Abstract This work presents a proof-of-concept of a new approach on automatic generation of digital hardware that is able to check application-level properties of an embedded system such as a faulty system behavior at runtime. The approach makes use of assertion-based verification setups that today are very common in the area of digital hardware design with, however, the sole focus on logic simulation. Thus, a PSL-to-VHDL compiler is introduced that generates VHDL (Very High Speed Integrated Circuit Description Language) code out of PSL (Property Specification Language) assertions which can be further processed by a traditional digital logic synthesis tool. That way, runtime checker units can be automatically generated with little effort because of the already existing assertion-based test benches. Furthermore, a model railway demonstrator is presented herein as an example for a safety-critical application to prove the proposed tool flow on a use case. Implementation results based on that use case are discussed. Finally, the paper concludes with a brief outlook on related future work of the authors.

TEM study of phosphorus-implanted pseudomorphic Si0.88Ge0.12 on Si(100)

1995 ◽  
Vol 53 ◽  
pp. 468-469
Author(s):  
N. David Theodore ◽  
Donald Y.C Lie ◽  
J. H. Song ◽  
Peter Crozier
Keyword(s):  
Integrated Circuits ◽  
Heterojunction Bipolar Transistors ◽  
Integrated Circuit ◽  
High Speed ◽  
Room Temperature ◽  
Strain Relaxation ◽  
Bipolar Transistors ◽  
Sige Hbt ◽  
Integrated Circuit Manufacturing ◽  
Microstructural Behavior

SiGe is being extensively investigated for use in heterojunction bipolar-transistors (HBT) and high-speed integrated circuits. The material offers adjustable bandgaps, improved carrier mobilities over Si homostructures, and compatibility with Si-based integrated-circuit manufacturing. SiGe HBT performance can be improved by increasing the base-doping or by widening the base link-region by ion implantation. A problem that arises however is that implantation can enhance strain-relaxation of SiGe/Si.Furthermore, once misfit or threading dislocations result, the defects can give rise to recombination-generation in depletion regions of semiconductor devices. It is of relevance therefore to study the damage and anneal behavior of implanted SiGe layers. The present study investigates the microstructural behavior of phosphorus implanted pseudomorphic metastable Si0.88Ge0.12 films on silicon, exposed to various anneals.Metastable pseudomorphic Si0.88Ge0.12 films were grown ~265 nm thick on a silicon wafer by molecular-beam epitaxy. Pieces of this wafer were then implanted at room temperature with 100 keV phosphorus ions to a dose of 1.5×1015 cm-2.

The Radio Probe™: A New Measurement Tool for High Speed Integrated Circuits

2005 ◽  
Author(s):  
Mark Kimball
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
High Speed ◽  
Attenuation Factor ◽  
Cost Effective ◽  
Frequency Measurement ◽  
Single Frequency ◽  
Measurement Tool ◽  
Probe Design ◽  
Differential Measurement

Abstract This article presents a novel tool designed to allow circuit node measurements in a radio frequency (RF) integrated circuit. The discussion covers RF circuit problems; provides details on the Radio Probe design, which achieves an input impedance of 50Kohms and an overall attenuation factor of 0 dB; and describes signal to noise issues in the output signal, along with their improvement techniques. This cost-effective solution incorporates features that make it well suited to the task of differential measurement of circuit nodes within an RF IC. The Radio Probe concept offers a number of advantages compared to active probes. It is a single frequency measurement tool, so it complements, rather than replaces, active probes.

Contactless Core-Temperature Monitoring by Infrared Thermal Sensor using Mean Absolute Error Analysis

2020 ◽  
Vol 15 ◽  
Author(s):  
Fahad Layth Malallah ◽  
Baraa T. Shareef ◽  
Mustafah Ghanem Saeed ◽  
Khaled N. Yasen
Keyword(s):  
Body Temperature ◽  
Embedded System ◽  
Core Temperature ◽  
Integrated Circuit ◽  
Mean Absolute Error ◽  
Absolute Error ◽  
Thermal Sensor ◽  
Human Face ◽  
Body Contact ◽  
Arduino Microcontroller

Aims: Normally, the temperature increase of individuals leads to the possibility of getting a type of disease, which might be risky to other people such as coronavirus. Traditional techniques for tracking core-temperature require body contact either by oral, rectum, axillary, or tympanic, which are unfortunately considered intrusive in nature as well as causes of contagion. Therefore, sensing human core-temperature non-intrusively and remotely is the objective of this research. Background: Nowadays, increasing level of medical sectors is a necessary targets for the research operations, especially with the development of the integrated circuit, sensors and cameras that made the normal life easier. Methods: The solution is by proposing an embedded system consisting of the Arduino microcontroller, which is trained with a model of Mean Absolute Error (MAE) analysis for predicting Contactless Core-Temperature (CCT), which is the real body temperature. Results: The Arduino is connected to an Infrared-Thermal sensor named MLX90614 as input signal, and connected to the LCD to display the CCT. To evaluate the proposed system, experiments are conducted by participating 31-subject sensing contactless temperature from the three face sub-regions: forehead, nose, and cheek. Conclusion: Experimental results approved that CCT can be measured remotely depending on the human face, in which the forehead region is better to be dependent, rather than nose and cheek regions for CCT measurement due to the smallest

scholarly journals The Demonstration of S2P (Serial-to-Parallel) Converter with Address Allocation Method Using 28 nm CMOS Technology

2021 ◽  
Vol 11 (1) ◽  
pp. 429
Author(s):  
Min-Su Kim ◽  
Youngoo Yang ◽  
Hyungmo Koo ◽  
Hansik Oh
Keyword(s):  
Integrated Circuits ◽  
Embedded System ◽  
Low Power ◽  
High Speed ◽  
Cmos Technology ◽  
Clock Frequency ◽  
Clock Generation ◽  
Allocation Method ◽  
Evaluation Board ◽  
28 Nm

To improve the performance of analog, RF, and digital integrated circuits, the cutting-edge advanced CMOS technology has been widely utilized. We successfully designed and implemented a high-speed and low-power serial-to-parallel (S2P) converter for 5G applications based on the 28 nm CMOS technology. It can update data easily and quickly using the proposed address allocation method. To verify the performances, an embedded system (NI-FPGA) for fast clock generation on the evaluation board level was also used. The proposed S2P converter circuit shows extremely low power consumption of 28.1 uW at 0.91 V with a core die area of 60 × 60 μm2 and operates successfully over a wide clock frequency range from 5 M to 40 MHz.

Characteristic properties of AlTiN and TiN coated HSS materials

2015 ◽  
Vol 67 (2) ◽  
pp. 172-180 ◽  
Author(s):  
Mumin Sahin ◽  
Cenk Misirli ◽  
Dervis Özkan
Keyword(s):  
Surface Roughness ◽  
Tensile Strength ◽  
High Speed ◽  
Cutting Tools ◽  
High Speed Steel ◽  
Wear Properties ◽  
Content Type ◽  
X Ray ◽  
Number Of Cycles ◽  
Future Work

Purpose – The purpose of this paper is to examine mechanical and metallurgical properties of AlTiN- and TiN-coates high-speed steel (HSS) materials in detail. Design/methodology/approach – In this study, HSS steel parts have been processed through machining and have been coated with AlTiN and TiN on physical vapour deposition workbench at approximately 6,500°C for 4 hours. Tensile strength, fatigue strength, hardness tests for AlTiN- and TiN-coated HSS samples have been performed; moreover, energy dispersive X-ray spectroscopy and X-ray diffraction analysis and microstructure analysis have been made by scanning electron microscopy. The obtained results have been compared with uncoated HSS components. Findings – It was found that tensile strength of TiAlN- and TiN-coated HSS parts is higher than that of uncoated HSS parts. Highest tensile strength has been obtained from TiN-coated HSS parts. Number of cycles for failure of TiAlN- and TiN-coated HSS parts is higher than that for HSS parts. Particularly TiN-coated HSS parts have the most valuable fatigue results. However, surface roughness of fatigue samples may cause notch effect. For this reason, surface roughness of coated HSS parts is compared with that of uncoated ones. While the average surface roughness (Ra) of the uncoated samples was in the range of 0.40 μm, that of the AlTiN- and TiN-coated samples was in the range of 0.60 and 0.80 μm, respectively. Research limitations/implications – It would be interesting to search different coatings for cutting tools. It could be the good idea for future work to concentrate on wear properties of tool materials. Practical implications – The detailed mechanical and metallurgical results can be used to assess the AlTiN and TiN coating applications in HSS materials. Originality/value – This paper provides information on mechanical and metallurgical behaviour of AlTiN- and TiN-coated HSS materials and offers practical help for researchers and scientists working in the coating area.

Aluminum Reflow Sputtering

MRS Bulletin ◽  
1995 ◽  
Vol 20 (11) ◽  
pp. 53-56 ◽  
Author(s):  
Kuniko Kikuta
Keyword(s):  
Integrated Circuit ◽  
High Speed ◽  
Lower Cost ◽  
High Reliability ◽  
Device Fabrication ◽  
Damascene Process ◽  
Aspect Ratios ◽  
Multi Level ◽  
Poor Adhesion ◽  
Lower Resistivity

The scaling of integrated-circuit device dimensions in the horizontal direction has caused an increase in aspect ratios of contact holes and vias without a corresponding scaledown in vertical dimensions. Conventional sputtering has become unreliable for handling higher aspect-ratio via/contact holes because of its poor step coverage. Several studies have attempted to overcome this problem by using W-CVD and reflow technology. The W-CVD is used for practical device fabrications. However, this technique has several problems such as poor adhesion to SiO2, poor W surface morphology, greater resistivity than Al, and the need of an etch-back process.Al reflow technology using a conventional DC magnetron sputtering system can simplify device-fabrication processes and achieve high reliability without Al/W interfaces. In particular, the Al reflow technology is profitable for multi-level interconnections in combination with a damascene process by using Al chemical mechanical polishing (CMP). These interconnections are necessary for miniaturized and high-speed devices because they provide lower resistivity than W and simplify fabrication processes, resulting in lower cost.This article describes recent Al reflow sputtering technologies as well as application of via and interconnect metallization.

scholarly journals The Modelling, Simulation and FPGA-Based Implementation for Stepper Motor Wide Range Speed Closed-Loop Drive System Design

Machines ◽  
2018 ◽  
Vol 6 (4) ◽  
pp. 56 ◽  
Author(s):  
Chiu-Keng Lai ◽  
Jhang-Shan Ciou ◽  
Chia-Che Tsai
Keyword(s):  
Embedded System ◽  
High Speed ◽  
Closed Loop ◽  
Open Loop ◽  
Drive System ◽  
Stepper Motor ◽  
Motor Drive ◽  
Digital Controllers ◽  
Loop Control ◽  
Wide Range

Owing to the benefits of programmable and parallel processing of field programmable gate arrays (FPGAs), they have been widely used for the realization of digital controllers and motor drive systems. Furthermore, they can be used to integrate several functions as an embedded system. In this paper, based on Matrix Laboratory (Matlab)/Simulink and the FPGA chip, we design and implement a stepper motor drive. Generally, motion control systems driven by a stepper motor can be in open-loop or closed-loop form, and pulse generators are used to generate a series of pulse commands, according to the desired acceleration/run/deceleration, in order to the drive system to rotate the motor. In this paper, the speed and position are designed in closed-loop control, and a vector control strategy is applied to the obtained rotor angle to regulate the phase current of the stepper motor to achieve the performance of operating it in low, medium, and high speed situations. The results of simulations and practical experiments based on the FPGA implemented control system are given to show the performances for wide range speed control.

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