scholarly journals Programmed Tool for Quantifying Reliability and Its Application in Designing Circuit Systems

2014 ◽  
Vol 2014 ◽  
pp. 1-9
Author(s):  
N. S. S. Singh
Keyword(s):  
Computational Complexity ◽  
Integrated Circuits ◽  
Comparative Study ◽  
Reliability Analysis ◽  
Error Bound ◽  
Significant Role ◽  
Cmos Technology ◽  
Modern Logic ◽  
Computational Approaches ◽  
Speed Up

As CMOS technology scales down to nanotechnologies, reliability continues to be a decisive subject in the design entry of nanotechnology-based circuit systems. As a result, several computational methodologies have been proposed to evaluate reliability of those circuit systems. However, the process of computing reliability has become very time consuming and troublesome as the computational complexity grows exponentially with the dimension of circuit systems. Therefore, being able to speed up the task of reliability analysis is fast becoming necessary in designing modern logic integrated circuits. For this purpose, the paper firstly looks into developing a MATLAB-based automated reliability tool by incorporating the generalized form of the existing computational approaches that can be found in the current literature. Secondly, a comparative study involving those existing computational approaches is carried out on a set of standard benchmark test circuits. Finally, the paper continues to find the exact error bound for individual faulty gates as it plays a significant role in the reliability of circuit systems.

Reliability Programmed Tool and its Application for Fault Tolerance Computation

2014 ◽  
Vol 909 ◽  
pp. 397-404
Author(s):  
N.S.S. Singh ◽  
N.H. Hamid ◽  
V.S. Asirvadam
Keyword(s):  
Integrated Circuits ◽  
Reliability Assessment ◽  
Maximum Error ◽  
Cmos Technology ◽  
Assessment Process ◽  
Modern Logic ◽  
Test Circuit ◽  
Reliable Computation ◽  
Speed Up ◽  
Reliability Computation

With the continuous scaling of CMOS technology, reliability of nanobased electronic circuits is endlessly becoming a major concern. Due to this phenomenon, several computational approaches have been developed for the reliability assessment of modern logic integrated circuits. However, these analytical methodologies have a computational complexity that increases exponentially with the circuit dimension, making the whole reliability assessment process of large circuits becoming very time consuming and intractable. Therefore, to speed up the reliability assessment of large circuits, this paper firstly looks into the development of a programmed reliability tool. The Matlab-based tool is developed based on the generalization of Probabilistic Transfer Matrix (PTM) model as one of the existing reliability assessment approaches. Users have to provide description of the desired circuit in the form of Netlist that becomes the input to the programmed tool. For illustration purpose, in this paper, C17 has been used as the benchmark test circuit for its reliability computation. Secondly, reliability of a desired circuit does not only depend on its faulty gates, but it also depends on the maximum error threshold of these faulty gates above which no reliable computation is possible. For this purpose, the developed tool is employed again to find the exact error thresholds for faulty gates.

scholarly journals Characteristics of an Image Sensor with Early-Vision Processing Fabricated in Standard 0.35 μm Cmos Technology

2012 ◽  
Vol 19 (2) ◽  
pp. 191-202
Author(s):  
Waldemar Jendernalik ◽  
Jacek Jakusz ◽  
Grzegorz Blakiewicz ◽  
Stanisław Szczepański ◽  
Robert Piotrowski
Keyword(s):  
Integrated Circuits ◽  
High Speed ◽  
Cmos Technology ◽  
Image Sensor ◽  
Early Vision ◽  
Vision Processing ◽  
Measurement Results ◽  
Speed Up ◽  
Image Processing Algorithms ◽  
Image Processors

Characteristics of an Image Sensor with Early-Vision Processing Fabricated in Standard 0.35 μm Cmos TechnologyThe article presents measurement results of prototype integrated circuits for acquisition and processing of images in real time. In order to verify a new concept of circuit solutions of analogue image processors, experimental integrated circuits were fabricated. The integrated circuits, designed in a standard 0.35 μm CMOS technology, contain the image sensor and analogue processors that perform low-level convolution-based image processing algorithms. The prototype with a resolution of 32 × 32 pixels allows the acquisition and processing of images at high speed, up to 2000 frames/s. Operation of the prototypes was verified in practice using the developed software and a measurement system based on a FPGA platform.

scholarly journals The Demonstration of S2P (Serial-to-Parallel) Converter with Address Allocation Method Using 28 nm CMOS Technology

2021 ◽  
Vol 11 (1) ◽  
pp. 429
Author(s):  
Min-Su Kim ◽  
Youngoo Yang ◽  
Hyungmo Koo ◽  
Hansik Oh
Keyword(s):  
Integrated Circuits ◽  
Embedded System ◽  
Low Power ◽  
High Speed ◽  
Cmos Technology ◽  
Clock Frequency ◽  
Clock Generation ◽  
Allocation Method ◽  
Evaluation Board ◽  
28 Nm

To improve the performance of analog, RF, and digital integrated circuits, the cutting-edge advanced CMOS technology has been widely utilized. We successfully designed and implemented a high-speed and low-power serial-to-parallel (S2P) converter for 5G applications based on the 28 nm CMOS technology. It can update data easily and quickly using the proposed address allocation method. To verify the performances, an embedded system (NI-FPGA) for fast clock generation on the evaluation board level was also used. The proposed S2P converter circuit shows extremely low power consumption of 28.1 uW at 0.91 V with a core die area of 60 × 60 μm2 and operates successfully over a wide clock frequency range from 5 M to 40 MHz.

scholarly journals Design of an Ultra-Low Voltage Bias Current Generator Highly Immune to Electromagnetic Interference

2021 ◽  
Vol 11 (1) ◽  
pp. 6
Author(s):  
Orazio Aiello
Keyword(s):  
Integrated Circuits ◽  
Electromagnetic Interference ◽  
Low Voltage ◽  
Current Source ◽  
Building Blocks ◽  
Cmos Technology ◽  
Threshold Region ◽  
Output Current ◽  
Current Generator ◽  
Technology Process

The paper deals with the immunity to Electromagnetic Interference (EMI) of the current source for Ultra-Low-Voltage Integrated Circuits (ICs). Based on the properties of IC building blocks, such as the current-splitter and current correlator, a novel current generator is conceived. The proposed solution is suitable to provide currents to ICs operating in the sub-threshold region even in the presence of an electromagnetic polluted environment. The immunity to EMI of the proposed solution is compared with that of a conventional current mirror and evaluated by analytic means and with reference to the 180 nm CMOS technology process. The analysis highlights how the proposed solution generates currents down to nano-ampere intrinsically robust to the Radio Frequency (RF) interference affecting the input of the current generator, differently to what happens to the output current of a conventional mirror under the same conditions.

scholarly journals Impact on Gain and Noise : ECG Amplifier & Comb Filter Design using OTA

2019 ◽  
Vol 8 (6S2) ◽  
pp. 803-808
Keyword(s):  
Integrated Circuits ◽  
Analog Circuit ◽  
Filter Design ◽  
Cmos Technology ◽  
Advanced Technology ◽  
Comb Filter ◽  
Design Environment ◽  
Transistor Channel ◽  
Ecg Amplifier ◽  
Finite Gain

The research paper ventures a novel modelling strategy of finite gain and noise of an electrocardiogram (ECG) amplifier at 0.18, 0.5 and 0.9 micron standard CMOS technologies respectively. An active comb filter is used to design the amplifier for removing the selected frequencies of numerous signals. The presented filter is configured with only Operational Transconductance Amplifiers (OTAs) and capacitors that makes it apt for implementation of monolithic integrated circuits (ICs). The relevance of this analog circuit is verified for a suitable test signal of 60 Hz as in the ECG signal. Using Cadence Virtuoso analog design environment, the effect of transistor channel length and width is examined for analysis of noise and bandwidth. It is observed that the performance in terms of noise and gain considerably increases for advanced technology node. However, for a suitable supply of bias current, a portable ECG system can also provide an improved bandwidth performance of advanced CMOS technology

A Comparative Study for the Backside Illumination (BSI) Technology Using Bonding Wafer Cleaning Process for Advanced CMOS Image Sensor

2012 ◽  
Vol 195 ◽  
pp. 75-78
Author(s):  
Chung Kyung Jung ◽  
Sung Wook Joo ◽  
Seoung Hun Jeong ◽  
Sang Wook Ryu ◽  
Han Choon Lee ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Comparative Study ◽  
Quantum Efficiency ◽  
Wafer Bonding ◽  
Image Sensor ◽  
Silicon On Insulator ◽  
Cleaning Process ◽  
Electrochemical Systems ◽  
Wafer Cleaning ◽  
Direct Wafer Bonding

Over the last decades, the concept of backside illumination (BSI) sensors has become one of the leading solutions to optical challenges such as improved quantum efficiency (QE), and cross-talk, respectively [1-. Direct wafer bonding is a method for fabricating advanced substrates for micro-electrochemical systems (MEMS) and integrated circuits (IC). The most typical example of such an advanced substrate is the silicon-on-insulator (SOI) wafer.

High Temperature Silicon Carbide CMOS Integrated Circuits

2011 ◽  
Vol 679-680 ◽  
pp. 726-729 ◽  
Author(s):  
David T. Clark ◽  
Ewan P. Ramsay ◽  
A.E. Murphy ◽  
Dave A. Smith ◽  
Robin. F. Thompson ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
High Temperature ◽  
Integrated Circuits ◽  
Band Gap ◽  
High Temperatures ◽  
Wide Band ◽  
Cmos Technology ◽  
Cmos Integrated Circuits ◽  
Wide Band Gap ◽  
Circuit Performance

The wide band-gap of Silicon Carbide (SiC) makes it a material suitable for high temperature integrated circuits [1], potentially operating up to and beyond 450°C. This paper describes the development of a 15V SiC CMOS technology developed to operate at high temperatures, n and p-channel transistor and preliminary circuit performance over temperature achieved in this technology.

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