Maskless, Direct Deposition of Copper onto Aluminum Bond Pads for Flip Chip Applications

1998 ◽  
Vol 515 ◽  
Author(s):  
M. Fang ◽  
T. O'Keefe ◽  
M. Stroder ◽  
W. Shih ◽  
M. O'Keefe ◽  
...  
Keyword(s):  
Thin Films ◽  
Integrated Circuits ◽  
Flip Chip ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Metallic Copper ◽  
Nucleation Site ◽  
Oxide Surface ◽  
Underbump Metallization ◽  
Organic Solutions

ABSTRACTFlip chip interconnection of integrated circuits (IC) for packaging applications such as direct chip attachment use Pb-Sn solders as the connection between the die and the substrate. Underbump metallization is typically used to transition from the non-solderable Al bond pad on the IC to a solderable surface such as copper using traditional blanket metal deposition, photolithography and etching procedures. In this study, we report for the first time the use of a novel process for selectively depositing adherent copper directly onto aluminum thin films, eliminating the need for adhesion promoting transition layers and additional patterning steps. Utilizing copper bearing organic solutions and standard electroless and electrolytic copper plating baths, as-deposited and annealed sputter deposited Al-x%Cu (x = 0 to 2) thin films were coated with metallic copper. An increase in the organically deposited copper nucleation site density was observed with increasing copper concentration in the sputtered aluminum/copper thin films. Preliminary results using focused ion beam microscopy indicated that dissolution of the aluminum oxide surface and subsequent deposition of copper by cementation occurs in the non-conducting organic solution at sub-micron reaction lengths. Qualitative adhesion testing of samples resulted in the majority of films passing the tape test. Demonstration of the process using 50 micron diameter vias in BCB coated flip chip test vehicles from MCNC will be presented.

scholarly journals Die Backside FIB Preparation for Identification and Characterization of Metal Voids

1999 ◽  
Author(s):  
Ann N. Campbell ◽  
William F. Filter ◽  
Nicholas Antoniou
Keyword(s):  
Integrated Circuits ◽  
Failure Analysis ◽  
Cross Sections ◽  
Integrated Circuit ◽  
Flip Chip ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Milling Process ◽  
Plan View ◽  
Metal Interconnects

Abstract Both the increased complexity of integrated circuits, resulting in six or more levels of integration, and the increasing use of flip-chip packaging have driven the development of integrated circuit (IC) failure analysis tools that can be applied to the backside of the chip. Among these new approaches are focused ion beam (FIB) tools and processes for performing chip edits/repairs from the die backside. This paper describes the use of backside FIB for a failure analysis application rather than for chip repair. Specifically, we used FIB technology to prepare an IC for inspection of voided metal interconnects (“lines”) and vias. Conventional FIB milling was combined with a superenhanced gas assisted milling process that uses XeF2 for rapid removal of large volumes of bulk silicon. This combined approach allowed removal of the TiW underlayer from a large number of M1 lines simultaneously, enabling rapid localization and plan view imaging of voids in lines and vias with backscattered electron (BSE) imaging in a scanning electron microscope (SEM). Sequential cross sections of individual voided vias enabled us to develop a 3D reconstruction of these voids. This information clarified how the voids were formed, helping us identify the IC process steps that needed to be changed.

Fluorocarbon Precursor for High Aspect Ratio via Milling in Focused Ion Beam Modification of Integrated Circuits

2004 ◽  
Author(s):  
Valery Ray
Keyword(s):  
Side Effects ◽  
Aspect Ratio ◽  
Integrated Circuits ◽  
High Aspect Ratio ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Enabling Technology ◽  
Si Substrate ◽  
Ion Beam Modification ◽  
The Past

Abstract Gas Assisted Etching (GAE) is the enabling technology for High Aspect Ratio (HAR) circuit access via milling in Focused Ion Beam (FIB) circuit modification. Metal interconnect layers of microelectronic Integrated Circuits (ICs) are separated by Inter-Layer Dielectric (ILD) materials, therefore HAR vias are typically milled in dielectrics. Most of the etching precursor gases presently available for GAE of dielectrics on commercial FIB systems, such as XeF2, Cl2, etc., are also effective etch enhancers for either Si, or/and some of the metals used in ICs. Therefore use of these precursors for via milling in dielectrics may lead to unwanted side effects, especially in a backside circuit edit approach. Making contacts to the polysilicon lines with traditional GAE precursors could also be difficult, if not impossible. Some of these precursors have a tendency to produce isotropic vias, especially in Si. It has been proposed in the past to use fluorocarbon gases as precursors for the FIB milling of dielectrics. Preliminary experimental evaluation of Trifluoroacetic (Perfluoroacetic) Acid (TFA, CF3COOH) as a possible etching precursor for the HAR via milling in the application to FIB modification of ICs demonstrated that highly enhanced anisotropic milling of SiO2 in HAR vias is possible. A via with 9:1 aspect ratio was milled with accurate endpoint on Si and without apparent damage to the underlying Si substrate.

Manufacturing In-Line Whole Wafer Focused Ion Beam (FIB) Memory Address Descramble Verification

2008 ◽  
Author(s):  
Steven B. Herschbein ◽  
Hyoung H. Kang ◽  
Scott L. Jansen ◽  
Andrew S. Dalton
Keyword(s):  
Flip Chip ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Random Access ◽  
Cell Counting ◽  
Test Results ◽  
Laboratory Procedure ◽  
Memory Array ◽  
Dual Beam ◽  
Process Level

Abstract Test engineers and failure analyst familiar with random access memory arrays have probably encountered the frustration of dealing with address descrambling. The resulting nonsequential internal bit cell counting scheme often means that the location of the failing cell under investigation is nowhere near where it is expected to be. A logical to physical algorithm for decoding the standard library block might have been provided with the design, but is it still correct now that the array has been halved and inverted to fit the available space in a new processor chip? Off-line labs have traditionally been tasked with array layout verification. In the past, hard and soft failures could be induced on the frontside of finished product, then bitmapped to see if the sites were in agreement. As density tightened, flip-chip FIB techniques to induce a pattern of hard fails on packaged devices came into practice. While the backside FIB edit method is effective, it is complex and expensive. The installation of an in-line Dual Beam FIB created new opportunities to move FA tasks out of the lab and into the FAB. Using a new edit procedure, selected wafers have an extensive pattern of defects 'written' directly into the memory array at an early process level. Bitmapping of the RAM blocks upon wafer completion is then used to verify correlation between the physical damaged cells and the logical sites called out in the test results. This early feedback in-line methodology has worked so well that it has almost entirely displaced the complex laboratory procedure of backside FIB memory array descramble verification.

Mechanical Properties of Electroplated Copper Thin Films

1999 ◽  
Vol 594 ◽  
Author(s):  
R. Spolenak ◽  
C. A. Volkert ◽  
K. Takahashi ◽  
S. Fiorillo ◽  
J. Miner ◽  
...  
Keyword(s):  
Thin Films ◽  
Mechanical Properties ◽  
Grain Size ◽  
Film Thickness ◽  
Yield Stress ◽  
Laser Scanning ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Cu Films ◽  
Electroplated Copper

AbstractIt is well known that the mechanical properties of thin films depend critically on film thickness However, the contributions from film thickness and grain size are difficult to separate, because they typically scale with each other. In one study by Venkatraman and Bravman, Al films, which were thinned using anodic oxidation to reduce film thickness without changing grain size, showed a clear increase in yield stress with decreasing film thickness.We have performed a similar study on both electroplated and sputtered Cu films by using chemical-mechanical polishing (CMP) to reduce the film thickness without changing the grain size. Stress-temperature curves were measured for both the electroplated and sputtered Cu films with thicknesses between 0.1 and 1.8 microns using a laser scanning wafer curvature technique. The yield stress at room temperature was found to increase with decreasing film thickness for both sets of samples. The sputtered films, however, showed higher yield stresses in comparison to the electroplated films. Most of these differences can be attributed to the different microstructures of the films, which were determined by focused ion beam (FIB) microscopy and x-ray diffraction.

Precision TEM Specimen Preparation for Integrated Circuits using Dual-Beam FIB Lift-Out Technique

2000 ◽  
Vol 6 (S2) ◽  
pp. 516-517
Author(s):  
Youren Xu ◽  
Chris Schwappach ◽  
Ron Cervantes
Keyword(s):  
Integrated Circuits ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Specimen Preparation ◽  
Single Beam ◽  
Dual Beam ◽  
Technological Advances ◽  
Endpoint Control ◽  
Practical Standpoint ◽  
Beam Damage

Focused ion beam lift-out technique has become increasingly attractive to the TEM community due to its unique advantage of no mechanical grinding/polishing involved in the process [1-3]. The technique essentially consists of two parts: preparation of membrane using focused ion beam (FIB) and transfer of the membrane (lift-out) to a grid. Up to date, this technique has only been demonstrated on single beam FIB systems. From a practical standpoint, overall sample quality (thickness) and lack of end-point precision are two major issues associated with the conventional single beam FIB technique. These issues are primarily related to ion beam damage and endpoint control encountered during the final stages of specimen thinning. As a result, the widespread use of FIB lift-out technique for high precision TEM specimen preparation has been limited. Recent technological advances have made it possible to combine both an electron beam column and an ion beam column into an integrated dual beam-focused ion beam (DB-FIB) system.

Effects of P Content on Morphology of Nanocrystals Induced by FIB Irradiation in Ni-P Amorphous Alloy

2006 ◽  
Vol 960 ◽  
Author(s):  
Koji Sato ◽  
Chiemi Ishiyama ◽  
Masato Sone ◽  
Yakichi Higo
Keyword(s):  
Thin Films ◽  
Amorphous Alloy ◽  
Crystallographic Orientation ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Orientation Relationships ◽  
Beam Direction ◽  
Precipitation Distribution ◽  
P Content

ABSTRACTWe studied the effects of phosphorus (P) on Ni nanocrystalline morphology formed by focused ion beam (FIB) irradiation for Ni-P amorphous alloy thin films. The P content in the amorphous alloy was varied from 8 to 12 wt.%. The nanocrystals induced by the FIB irradiation for Ni-11.8, 8.9, 7.9 wt.% amorphous alloy had an f.c.c. structure and showed unique crystallographic orientation relationships to the geometry of the focused ion beam, that is, {111}f.c.c. parallel to the irradiated plane and <110>f.c.c. parallel to the projected ion beam direction, respectively. The Ni nanocrystals precipitated like aggregates with decreasing of the P content. These results represent that the P content does not affect crystallographic orientation relationships, while influences the precipitation distribution of Ni nanocrystals generated by the FIB irradiation.

Focused Ion Beam Metrology

1995 ◽  
Vol 396 ◽  
Author(s):  
A. Wagner ◽  
P. Blauner ◽  
P. Longo ◽  
S. Cohen
Keyword(s):  
Integrated Circuits ◽  
Cross Sections ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Dimensional Change ◽  
Critical Dimension ◽  
Ion Beams ◽  
Near Surface ◽  
Electron Microscopes ◽  
Scanning Electron Microscopes

AbstractFocused Ion Beams offer a new method of measuring the size of polymer resist features on integrated circuits. The short penetration range of an ion relative to an electron is shown to offer fundamental advantages for critical dimension (CD) metrology. By confining the polymer damage to the very near surface, ion beams can induce less dimensional change than scanning electron microscopes during the measurement process. This can result in improved CD measurement precision. The erosion rate of polymers to various ion species is also presented, and we show that erosion is non-linear with ion dose. The use of FIB for forming resist cross sections is also demonstrated. An H20 gas assisted etching process for polymers has been developed, and is shown to significantly improve the quality of resist cross sections.

Focused Ion-Beam (FIB) Nanomachining of Silicon Carbide (SiC) Stencil Masks for Nanoscale Patterning

2012 ◽  
Vol 717-720 ◽  
pp. 889-892 ◽  
Author(s):  
Hamidreza Zamani ◽  
Seung Wan Lee ◽  
Amir Avishai ◽  
Christian A. Zorman ◽  
R. Mohan Sankaran ◽  
...  
Keyword(s):  
Thin Films ◽  
Silicon Carbide ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
High Quality ◽  
Nanoscale Patterning ◽  
Different Types ◽  
Thin Membranes ◽  
Amorphous Sic ◽  
Nanoscale Features

We report on experimental explorations of using focused ion beam (FIB) nanomachining of different types of silicon carbide (SiC) thin membranes, for making robust, high-quality stencil masks for new emerging options of nanoscale patterning. Using thin films and membranes in polycrystalline SiC (poly-SiC), 3C-SiC, and amorphous SiC (a-SiC) with thicknesses in the range of t~250nm−1.6μm, we have prototyped a series of stencil masks, with nanoscale features routinely down to ~100nm.

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