scholarly journals Optimal Design and Noise Analysis of High-Performance DBR-Integrated Lateral Germanium (Ge) Photodetectors for SWIR Applications

2021 ◽  
Author(s):  
Harshvardhan Kumar ◽  
Ankit Kumar Pandey ◽  
Chu-Hsuan Lin
Keyword(s):  
Dark Current ◽  
High Speed ◽  
High Performance ◽  
Noise Analysis ◽  
Equivalent Circuit Model ◽  
Low Noise ◽  
Telecommunication Networks ◽  
Bragg Reflector ◽  
Distributed Bragg Reflector ◽  
The Impact

Abstract This work presents the high-performance Si/SiO2distributed Bragg reflector (DBR)-integrated lateral germanium (Ge) p-i-n photodetectors (PDs) for atmospheric gas sensing and fiber-optic telecommunication networks in the short-wave infrared (SWIR) regime. In addition, this study also proposes an opto-electronic compact small-signal noise equivalent circuit model (SSNECM) of the designed device to compute the signal-to-noise ratio (SNR) at the output of the detector. Various figure-of merits including current under dark and illumination, responsivity, detectivity, 3dB bandwidth, and the SNR of the proposed device are estimated at the room-temperature (RT) for an incident optical power of 0.5 μW. Furthermore, the impact of scaling of rib waveguide (WG) width and height on dark current, responsivity, and 3dB bandwidth are investigated to optimize the proposed device. The validation of the proposed model is done by comparing various parameters including dark current, responsivity, and detectivity of the designed device with other Ge PDs. The estimated results show the reduced trade-off between responsivity and 3dB bandwidth of the designed device. At λ=1550 nm, the proposed device achieves the high detectivity and SNR of >2X1011 Jones and 120 dB (up to 3 THz), respectively, with the bias voltage of -2V. These encouraging results pave the path for the future development of low noise and high-speed detectors for SWIR applications.

scholarly journals Ultracompact and low-power-consumption silicon thermo-optic switch for high-speed data

Nanophotonics ◽  
2020 ◽  
Vol 10 (2) ◽  
pp. 937-945
Author(s):  
Ruihuan Zhang ◽  
Yu He ◽  
Yong Zhang ◽  
Shaohua An ◽  
Qingming Zhu ◽  
...  
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
High Speed ◽  
High Performance ◽  
Pulse Amplitude ◽  
Telecommunication Networks ◽  
Low Power Consumption ◽  
Power Efficient ◽  
High Speed Data ◽  
On Chip

AbstractUltracompact and low-power-consumption optical switches are desired for high-performance telecommunication networks and data centers. Here, we demonstrate an on-chip power-efficient 2 × 2 thermo-optic switch unit by using a suspended photonic crystal nanobeam structure. A submilliwatt switching power of 0.15 mW is obtained with a tuning efficiency of 7.71 nm/mW in a compact footprint of 60 μm × 16 μm. The bandwidth of the switch is properly designed for a four-level pulse amplitude modulation signal with a 124 Gb/s raw data rate. To the best of our knowledge, the proposed switch is the most power-efficient resonator-based thermo-optic switch unit with the highest tuning efficiency and data ever reported.

scholarly journals Monitoring and characterization of vibration and shock conditions aboard high-performance marine craft

2018 ◽  
Vol 233 (4) ◽  
pp. 1068-1081
Author(s):  
Manudul Pahansen de Alwis ◽  
Karl Garme
Keyword(s):  
Real Time ◽  
High Speed ◽  
High Performance ◽  
Severity Index ◽  
Irregular Waves ◽  
Vibration Exposure ◽  
Data Set ◽  
Real Time Analysis ◽  
Impact Acceleration ◽  
The Impact

The stochastic environmental conditions together with craft design and operational characteristics make it difficult to predict the vibration environments aboard high-performance marine craft, particularly the risk of impact acceleration events and the shock component of the exposure often being associated with structural failure and human injuries. The different timescales and the magnitudes involved complicate the real-time analysis of vibration and shock conditions aboard these craft. The article introduces a new measure, severity index, indicating the risk of severe impact acceleration, and proposes a method for real-time feedback on the severity of impact exposure together with accumulated vibration exposure. The method analyzes the immediate 60 s of vibration exposure history and computes the severity of impact exposure as for the present state based on severity index. The severity index probes the characteristic of the present acceleration stochastic process, that is, the risk of an upcoming heavy impact, and serves as an alert to the crew. The accumulated vibration exposure, important for mapping and logging the crew exposure, is determined by the ISO 2631:1997 vibration dose value. The severity due to the impact and accumulated vibration exposure is communicated to the crew every second as a color-coded indicator: green, yellow and red, representing low, medium and high, based on defined impact and dose limits. The severity index and feedback method are developed and validated by a data set of 27 three-hour simulations of a planning craft in irregular waves and verified for its feasibility in real-world applications by full-scale acceleration data recorded aboard high-speed planing craft in operation.

scholarly journals Research on Blade-Casing Rub-Impact Mechanism by Experiment and Simulation in Aeroengines

2019 ◽  
Vol 2019 ◽  
pp. 1-15 ◽  
Author(s):  
Jie Hong ◽  
Tianrang Li ◽  
Zhichao Liang ◽  
Dayi Zhang ◽  
Yanhong Ma
Keyword(s):  
High Speed ◽  
High Performance ◽  
Element Model ◽  
Physical Parameters ◽  
Test Rig ◽  
Calculation Results ◽  
Rotor Support ◽  
Blade Tip ◽  
Set Up ◽  
The Impact

Aeroengines pursue high performance, and compressing blade-casing clearance has become one of the main ways to improve turbomachinery efficiency. Rub-impact faults occur frequently with clearance decreasing. A high-speed rotor-support-casing test rig was set up, and the mechanism tests of light and heavy rub-impact were carried out. A finite element model of the test rig was established, and the calculation results were in good agreement with the experimental results under both kinds of rub-impact conditions. Based on the actual blade-casing structure model, the effects of the major physical parameters including imbalance and material characteristics were investigated. During the rub-impact, the highest stress occurs at the blade tip first and then it is transmitted to the blade root. Deformation on the impact blade tip generates easily with decreased yield strength, and stress concentration at the blade tip occurs obviously with weaker stiffness. The agreement of the computation results with the experimental data indicates the method could be used to estimate rub-impact characteristics and is effective in design and analyses process.

Si-Ge heterojunction bipolar technology for high-speed integrated circuits

1996 ◽  
Vol 74 (S1) ◽  
pp. 159-166
Author(s):  
D. C. Ahlgren ◽  
S. J. Jeng ◽  
D. Nguyen-Ngoc ◽  
K. Stein ◽  
D. Sunderland ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
High Speed ◽  
High Performance ◽  
Full Range ◽  
Low Noise ◽  
Low Noise Amplifiers ◽  
Voltage Controlled Oscillators ◽  
Sige Hbt ◽  
Trade Offs ◽  
Scale Integration

This review discusses the fundamentals of SiGe epitaxial base heterojunction bipolar transistor (HBT) technology that have been developed for use in analog and mixed-signal applications in the 1–20 GHz range. The basic principles of operation of the graded base SiGe HBT are reviewed. These principles are then used to explore the design optimization for analog applications. Device results are presented that illustrate some important trade-offs in device design. A discussion of the use of UHV/CVD for the deposition of the epitaxial base profile is followed by an overview of the integrated process. This process, which has been installed on 200 mm wafers in IBM's Advanced Semiconductor Technology Center in Hopewell Junction, N.Y., also includes a full range of support devices. The process has demonstrated SiGe HBT performance, reliability, and yield in a CMOS fabrication with the addition of only one tool for UHV/CVD deposition of the epi-base and, with minimal additional process steps, can be used to fabricate full BiCMOS designs. This paper concludes with a discussion of high-performance circuits fabricated to date, including ECL ring'oscillators, power amplifiers, low-noise amplifiers, voltage-controlled oscillators, and finally a 12-bit DAC that features nearly 3000 SiGe HBT devices demonstrating medium-scale integration.

Investigation of Photonic Integrated Circuits with Low-Loss Bragg Gratings

2020 ◽  
Vol 41 (3) ◽  
pp. 229-233
Author(s):  
Manjinder Kaur ◽  
Sanjeev Dewra
Keyword(s):  
Integrated Circuits ◽  
Photonic Integrated Circuits ◽  
Optical Power ◽  
Grating Period ◽  
Bragg Reflector ◽  
Physical Parameters ◽  
Low Loss ◽  
Distributed Bragg Reflector ◽  
The Impact ◽  
Plasmon Polaritons

AbstractThe impact of physical parameters of uniform fiber Bragg grating (U-FBG) like grating period, length of grating, and width of grating on the performance of U-FBG fiber by using finite differences time domain (FDTD) based on surface plasmon polaritons (SPP) is evaluated. An FBG is similar to a distributed Bragg reflector created in a small segment of optical fiber that reflects some particular wavelengths of light and transmits the other wavelengths. It is observed that the maximum received optical power at the reflected port achieved is −1.67×10-6 w/m2 with silver (Ag) profile material of U-FBG at 0.1 w/m2 input transmission power and wavelength of 1.55 μm with 0.9 μm grating length and 0.2 μm grating width. The result shows that the received optical power is changing by optimizing the physical parameters of U-FBG.

A LOW POWER HIGH RESOLUTION ROIC DESIGN WITH 14-BIT COLUMN-LEVEL ADC FOR 384 × 288 IRFPA

2013 ◽  
Vol 22 (09) ◽  
pp. 1340015 ◽  
Author(s):  
YAJING ZHANG ◽  
WENGAO LU ◽  
GUANNAN WANG ◽  
ZHONGJIAN CHEN ◽  
YACONG ZHANG
Keyword(s):  
High Resolution ◽  
Low Power ◽  
Integrated Circuit ◽  
High Speed ◽  
High Performance ◽  
Low Noise ◽  
Cmos Process ◽  
Readout Integrated Circuit ◽  
Analog To Digital Conversion ◽  
Amplifier Design

A readout integrated circuit (ROIC) of infrared focal plane array (IRFPA) with low power and low noise is presented in this paper. It consists of a 384 × 288 pixel array and column-level A/D conversion circuits. The proposed system has high resolution because of the odd–even Analog to Digital Conversion (ADC) structure, containing correlated switches design, multi-Vth amplifier design and high speed high resolution comparator design including latch-stage. Designed and simulated in 0.35-μm CMOS process, this high performance ROIC achieves 81.24 dB SNR at 8.64 KS/s consuming 98 mW under 5 V voltage supply, resulting in an ENOB of 13.2-bit.

scholarly journals Evaluation of the Potential Electromagnetic Interference in Vertically Stacked 3D Integrated Circuits

2020 ◽  
Vol 10 (3) ◽  
pp. 748
Author(s):  
Dipesh Kapoor ◽  
Cher Ming Tan ◽  
Vivek Sangwan
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Electromagnetic Interference ◽  
High Speed ◽  
High Performance ◽  
Near Field ◽  
Three Dimensional ◽  
3D Ic ◽  
Three Dimensional Integrated Circuit ◽  
The Impact

Advancements in the functionalities and operating frequencies of integrated circuits (IC) have led to the necessity of measuring their electromagnetic Interference (EMI). Three-dimensional integrated circuit (3D-IC) represents the current advancements for multi-functionalities, high speed, high performance, and low-power IC technology. While the thermal challenges of 3D-IC have been studied extensively, the influence of EMI among the stacked dies has not been investigated. With the decreasing spacing between the stacked dies, this EMI can become more severe. This work demonstrates the potential of EMI within a 3D-IC numerically, and determines the minimum distance between stack dies to reduce the impact of EMI from one another before they are fabricated. The limitations of using near field measurement for the EMI study in stacked dies 3D-IC are also illustrated.

scholarly journals Impact of Modern Virtualization Methods on Timing Precision and Performance of High-Speed Applications

2019 ◽  
Vol 11 (8) ◽  
pp. 179 ◽  
Author(s):  
Veronika Kirova ◽  
Kirill Karpov ◽  
Eduard Siemens ◽  
Irina Zander ◽  
Oksana Vasylenko ◽  
...  
Keyword(s):  
Virtual Environments ◽  
Virtual Environment ◽  
High Speed ◽  
High Performance ◽  
Estimation Accuracy ◽  
Network Applications ◽  
High Speed Network ◽  
Timing Precision ◽  
And Performance ◽  
The Impact

The presented work is a result of extended research and analysis on timing methods precision, their efficiency in different virtual environments and the impact of timing precision on the performance of high-speed networks applications. We investigated how timer hardware is shared among heavily CPU- and I/O-bound tasks on a virtualized OS as well as on bare OS. By replacing the invoked timing methods within a well-known application for estimation of available path bandwidth, we provide the analysis of their impact on estimation accuracy. We show that timer overhead and precision are crucial for high-performance network applications, and low-precision timing methods usage, e.g., the delays and overheads issued by virtualization result in the degradation of the virtual environment. Furthermore, in this paper, we provide confirmation that, by using the methods we intentionally developed for both precise timing operations and AvB estimation, it is possible to overcome the inefficiency of standard time-related operations and overhead that comes with the virtualization. The impacts of negative virtualization factors were investigated in five different environments to define the most optimal virtual environment for high-speed network applications.

scholarly journals Variable rotor speed strategy for coaxial compound helicopters with lift–offset rotors

2019 ◽  
Vol 124 (1271) ◽  
pp. 96-120 ◽  
Author(s):  
Y. Yuan ◽  
D. Thomson ◽  
R. Chen
Keyword(s):  
Power Consumption ◽  
High Speed ◽  
High Performance ◽  
Normal Load ◽  
Flight Dynamics ◽  
Load Factor ◽  
Rotor Speed ◽  
Inverse Simulation ◽  
Maneuvering Flight ◽  
The Impact

ABSTRACTThe coaxial compound helicopter with lift-offset rotors has been proposed as a concept for future high-performance rotorcraft. This helicopter usually utilizes a variable-speed rotor system to improve the high-speed performance and the cruise efficiency. A flight dynamics model of this helicopter associated with rotor speed governor/engine model is used in this article to investigate the effect of the rotor speed change and to study the variable rotor speed strategy. Firstly, the power-required results at various rotor rotational speeds are calculated. This comparison indicates that choice of rotor speed can reduce the power consumption, and the rotor speed has to be reduced in high-speed flight due to the compressibility effects at the blade tip region. Furthermore, the rotor speed strategy in trim is obtained by optimizing the power required. It is demonstrated that the variable rotor speed successfully improves the performance across the flight range, but especially in the mid-speed range, where the rotor speed strategy can reduce the overall power consumption by around 15%. To investigate the impact of the rotor speed strategy on the flight dynamics properties, the trim characteristics, the bandwidth and phase delay, and eigenvalues are investigated. It is shown that the reduction of the rotor speed alters the flight dynamics characteristics as it affects the stability, damping, and control power provided by the coaxial rotor. However, the handling qualities requirements are still satisfied with different rotor speed strategies. Finally, a rotor speed strategy associated with the collective pitch is designed for maneuvering flight considering the normal load factor. Inverse simulation is used to investigate this strategy on maneuverability in the Push-up & Pull-over Mission-Task-Element (MTE). It is shown that the helicopter can achieve Level 1 ratings with this rotor speed strategy. In addition, the rotor speed strategy could further reduce the power consumption and pilot workload during the maneuver.

scholarly journals State-of-the-art photodetectors for optoelectronic integration at telecommunication wavelength

Nanophotonics ◽  
2015 ◽  
Vol 4 (3) ◽  
pp. 277-302 ◽  
Author(s):  
Png Ching Eng ◽  
Sun Song ◽  
Bai Ping
Keyword(s):  
Integrated Circuits ◽  
High Speed ◽  
High Performance ◽  
Low Noise ◽  
Theoretical Modelling ◽  
Critical Position ◽  
Large Bandwidth ◽  
Material Systems ◽  
Optoelectronic Integration ◽  
Review State

AbstractPhotodetectors hold a critical position in optoelectronic integrated circuits, and they convert light into electricity. Over the past decades, high-performance photodetectors (PDs) have been aggressively pursued to enable high-speed, large-bandwidth, and low-noise communication applications. Various material systems have been explored and different structures designed to improve photodetection capability as well as compatibility with CMOS circuits. In this paper, we review state-of-theart photodetection technologies in the telecommunications spectrum based on different material systems, including traditional semiconductors such as InGaAs, Si, Ge and HgCdTe, as well as recently developed systems such as low-dimensional materials (e.g. graphene, carbon nanotube, etc.) and noble metal plasmons. The corresponding material properties, fundamental mechanisms, fabrication, theoretical modelling and performance of the typical PDs are presented, including the emerging directions and perspectives of the PDs for optoelectronic integration applications are discussed.

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