A Novel Technique for Detecting High Resistance Fault Using Electroplating

2004 ◽  
Author(s):  
H. S. Wang ◽  
J. H. Chou ◽  
H. C. Hung ◽  
H. H. Lui ◽  
W. H. Yang ◽  
...  
Keyword(s):  
High Resistance ◽  
Fault Location ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Sample Surface ◽  
Optical Microscope ◽  
Logical Circuit ◽  
Localization Method ◽  
Voltage Contrast ◽  
Electroplated Copper

Abstract This paper will demonstrate a new copper (Cu) electroplating technique [1] for accurately isolating high resistance fault locations with resistance below K-order ohms. This phenomenon is achieved by having different electric field intensity leading to different copper deposition rate on the sample surface. From experiments, the interface between the thicker electroplated and thinner electroplated copper layer on the sample surface accurately indicates the high resistance fault location. Also, Optical Microscope (OM) and Focused Ion Beam (FIB) are used to inspect the localized fault site of the electroplated sample. Furthermore, this technique, Electro-Plating Localization Method (EPLM), can process several samples or the entire wafer at the same time. In addition, this technique can be applied in the fully open cases of test vehicles with logical circuit as voltage contrast localization method.

Analysis of Voltage Contrast in Secondary Electron Images Using a High-Energy Electron Spectrometer

2019 ◽  
Author(s):  
Natsuko Asano ◽  
Shunsuke Asahina ◽  
Natasha Erdman
Keyword(s):  
Focused Ion Beam ◽  
Ion Beam ◽  
Sample Surface ◽  
High Energy ◽  
Secondary Electrons ◽  
Analysis Technique ◽  
Quantitative Understanding ◽  
Voltage Contrast ◽  
Acceleration Voltage ◽  
Failure Localization

Abstract Voltage contrast (VC) observation using a scanning electron microscope (SEM) or a focused ion beam (FIB) is a common failure analysis technique for semiconductor devices.[1] The VC information allows understanding of failure localization issues. In general, VC images are acquired using secondary electrons (SEs) from a sample surface at an acceleration voltage of 0.8–2.0 kV in SEM. In this study, we aimed to find an optimized electron energy range for VC acquisition using Auger electron spectroscopy (AES) for quantitative understanding.

Application of FIB Circuit Edit in Analysis of Memory Failure of SOI Devices

2006 ◽  
Author(s):  
Z. G. Song ◽  
S. K. Loh ◽  
X. H. Zheng ◽  
S.P. Neo ◽  
C. K. Oh
Keyword(s):  
Focused Ion Beam ◽  
Ion Beam ◽  
Electrical Characterization ◽  
Silicon On Insulator ◽  
First Case ◽  
Edx Analyses ◽  
Memory Failure ◽  
Soi Devices ◽  
Voltage Contrast ◽  
Soi Technology

Abstract This article presents two cases to demonstrate the application of focused ion beam (FIB) circuit edit in analysis of memory failure of silicon on insulator (SOI) devices using XTEM and EDX analyses. The first case was a single bit failure of SRAM units manufactured with 90 nm technology in SOI wafer. The second case was the whole column failure with a single bit pass for a SRAM unit. From the results, it was concluded that FIB circuit edit and electrical characterization is a good methodology for further narrowing down the defective location of memory failure, especially for SOI technology, where contact-level passive voltage contrast is not suitable.

Solving the Voltage Contrast on Floating Substrate with Standard FA Toolset

2016 ◽  
Author(s):  
Julien Goxe ◽  
Béatrice Vanhuffel ◽  
Marie Castignolles ◽  
Thomas Zirilli
Keyword(s):  
Electron Microscope ◽  
Scanning Electron Microscope ◽  
Sample Preparation ◽  
Failure Analysis ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Silicon On Insulator ◽  
Mixed Signal ◽  
Voltage Contrast ◽  
Scanning Electron

Abstract Passive Voltage Contrast (PVC) in a Scanning Electron Microscope (SEM) or a Focused Ion Beam (FIB) is a key Failure Analysis (FA) technique to highlight a leaky gate. The introduction of Silicon On Insulator (SOI) substrate in our recent automotive analog mixed-signal technology highlighted a new challenge: the Bottom Oxide (BOX) layer, by isolating the Silicon Active Area from the bulk made PVC technique less effective in finding leaky MOSFET gates. A solution involving sample preparation performed with standard FA toolset is proposed to enhance PVC on SOI substrate.

Investigations of Leakage Paths in Sub-0.35μm DRAM Products Using Advanced Focused Ion Beam Techniques

1998 ◽  
Author(s):  
H. Lorenz ◽  
C. Engel
Keyword(s):  
Focused Ion Beam ◽  
Cell Function ◽  
Dielectric Breakdown ◽  
Ion Beam ◽  
Electrical Characterization ◽  
Floating Gate ◽  
Leakage Path ◽  
Contrast Technique ◽  
Voltage Contrast

Abstract Due to the continuously decreasing cell size of DRAMs and concomitantly diminishing thickness of some insulating layers new failure mechanisms appear which until now had no significance for the cell function. For example high resistance leakage paths between closely spaced conductors can lead to retention problems. These are hard to detect by electrical characterization in a memory tester because the involved currents are in the range of pA. To analyze these failures we exploit the very sensitive passive voltage contrast of the Focused Ion Beam Microscope (FIB). The voltage contrast can further be enhanced by in-situ FIB preparations to obtain detailed information about the failure mechanism. The first part of this paper describes a method to detect a leakage path between a borderless contact on n-diffusion and an adjacent floating gate by passive voltage contrast achieved after FIB circuit modification. In the second part we will demonstrate the localization of a DRAM trench dielectric breakdown. In this case the FIB passive voltage contrast technique is not limited to the localization of the failing trench. We can also obtain the depth of the leakage path by selective insitu etching with XeF2 stopped immediately after a voltage contrast change.

The Application of FIB Voltage-Contrast Technique Combining with TEM on Subtle Defect Analysis: Via Delamination After TC

1997 ◽  
Author(s):  
X. Yang ◽  
X. Song
Keyword(s):  
Cross Section ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
New Product ◽  
Defect Analysis ◽  
Transmission Electron ◽  
Contrast Technique ◽  
Defect Mechanism ◽  
Open Defect ◽  
Voltage Contrast

Abstract Novel Focused Ion Beam (FIB) voltage-contrast technique combined with TEM has been used in this study to identify a certain subtle defect mechanism that caused reliability stress failures of a new product. The suspected defect was first isolated to a unique via along the row through electrical testing and layout analysis. Static voltage contrast of FIB cross-section was used to confirm the suspected open defect at the via. Precision Transmission Electron Microscope (TEM) was then used to reveal the detail of the defect. Based on the result, proper process changes were implemented. The failure mode was successfully eliminated and the reliability of the product was greatly improved.

Carbon Coating for Electron Beam Testing and Focus Ion Beam Reconfiguration

1996 ◽  
Author(s):  
P. Perdu ◽  
G. Perez ◽  
M. Dupire ◽  
B. Benteo
Keyword(s):  
Electron Beam ◽  
Sample Preparation ◽  
Carbon Coating ◽  
Focused Ion Beam ◽  
Sacrificial Layer ◽  
Ion Beam ◽  
Electrical Characterization ◽  
Fault Analysis ◽  
Voltage Contrast ◽  
The Right

Abstract To debug ASIC we likely use accurate tools such as an electron beam tester (Ebeam tester) and a Focused Ion Beam (FIB). Interactions between ions or electrons and the target device build charge up on its upper glassivation layer. This charge up could trigger several problems. With Ebeam testing, it sharply decreases voltage contrast during Image Fault Analysis and hide static voltage contrast. During ASIC reconfiguration with FIB, it could induce damages in the glassivation layer. Sample preparation is getting a key issue and we show how we can deal with it by optimizing carbon coating of the devices. Coating is done by an evaporator. For focused ion beam reconfiguration, we need a very thick coating. Otherwise the coating could be sputtered away due to imaging. This coating is use either to avoid charge-up on glassivated devices or as a sacrificial layer to avoid short circuits on unglassivated devices. For electron beam Testing, we need a very thin coating, we are now using an electrical characterization method with an insitu control system to obtain the right thin thickness. Carbon coating is a very cheap and useful method for sample preparation. It needs to be tuned according to the tool used.

Mechanical Properties of Electroplated Copper Thin Films

1999 ◽  
Vol 594 ◽  
Author(s):  
R. Spolenak ◽  
C. A. Volkert ◽  
K. Takahashi ◽  
S. Fiorillo ◽  
J. Miner ◽  
...  
Keyword(s):  
Thin Films ◽  
Mechanical Properties ◽  
Grain Size ◽  
Film Thickness ◽  
Yield Stress ◽  
Laser Scanning ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Cu Films ◽  
Electroplated Copper

AbstractIt is well known that the mechanical properties of thin films depend critically on film thickness However, the contributions from film thickness and grain size are difficult to separate, because they typically scale with each other. In one study by Venkatraman and Bravman, Al films, which were thinned using anodic oxidation to reduce film thickness without changing grain size, showed a clear increase in yield stress with decreasing film thickness.We have performed a similar study on both electroplated and sputtered Cu films by using chemical-mechanical polishing (CMP) to reduce the film thickness without changing the grain size. Stress-temperature curves were measured for both the electroplated and sputtered Cu films with thicknesses between 0.1 and 1.8 microns using a laser scanning wafer curvature technique. The yield stress at room temperature was found to increase with decreasing film thickness for both sets of samples. The sputtered films, however, showed higher yield stresses in comparison to the electroplated films. Most of these differences can be attributed to the different microstructures of the films, which were determined by focused ion beam (FIB) microscopy and x-ray diffraction.

scholarly journals Localizing Heat-Generating Defects Using Fluorescent Microthermal Imaging

1996 ◽  
Author(s):  
P. Tangyunyong ◽  
A.Y. Liang ◽  
A.W. Righter ◽  
D.L. Barton ◽  
J.M. Soden
Keyword(s):  
Failure Analysis ◽  
Focused Ion Beam ◽  
Uv Light ◽  
Ion Beam ◽  
Sample Surface ◽  
Analysis Tool ◽  
Temperature Dependent ◽  
Root Cause ◽  
Ideal Situation ◽  
Sem Imaging

Abstract Fluorescent microthermal imaging (FMI) involves coating a sample surface with a thin fluorescent film that, upon exposure to UV light source, emits temperature-dependent fluorescence [1-7]. The principle behind FMI was thoroughly reviewed at the ISTFA in 1994 [8, 9]. In two recent publications [10,11], we identified several factors in film preparation and data processing that dramatically improved the thermal resolution and sensitivity of FMI. These factors include signal averaging, the use of base mixture films, film stabilization and film curing. These findings significantly enhance the capability of FMI as a failure analysis tool. In this paper, we show several examples that use FMI to quickly localize heat-generating defects ("hot spots"). When used with other failure analysis techniques such as focused ion beam (FIB) cross sectioning and scanning electron microscope (SEM) imaging, we demonstrate that FMI is a powerful tool to efficiently identify the root cause of failures in complex ICs. In addition to defect localization, we use a failing IC to determine the sensitivity of FMI (i.e., the lowest power that can be detected) in an ideal situation where the defects are very localized and near the surface.

Fabrication and characterization of highly reproducible, high resistance nanogaps made by focused ion beam milling

2007 ◽  
Vol 18 (28) ◽  
pp. 285301 ◽  
Author(s):  
T Blom ◽  
K Welch ◽  
M Strømme ◽  
E Coronel ◽  
K Leifer
Keyword(s):  
High Resistance ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Fabrication And Characterization ◽  
Focused Ion Beam Milling
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