Enhanced Comparison of Lock-In Thermography and Magnetic Microscopy for 3D Defect Localization of System in Packages

2012 ◽  
Author(s):  
Christian Schmidt ◽  
Frank Altmann ◽  
David P. Vallett
Keyword(s):  
Fault Isolation ◽  
Single Chip ◽  
3D Integration ◽  
Qualitative Comparison ◽  
Magnetic Current ◽  
Defect Localization ◽  
Isolation Methods ◽  
Open Defect ◽  
Magnetic Microscopy ◽  
Lock In

Abstract Lock-in thermography and magnetic current imaging are emerging as the two image-based fault isolation methods most capable of meeting the challenges of short and open defect localization in thick, opaque assemblies. Such devices are rapidly becoming prevalent as 3D integration begins to ramp up production. This paper expands on previously published work with a qualitative comparison of the techniques on single chip and stacked die packages with known designed-in or FIB created defects.

Fault Isolation of Metal-Insulator-Metal (MiM) Capacitor Failures by Lock-in Thermography (LIT)

2020 ◽  
Author(s):  
Ke-Ying Lin ◽  
Pei-Fen Lue ◽  
Jayce Liu ◽  
Paul Kenneth Ang
Keyword(s):  
Fault Isolation ◽  
Phase Image ◽  
Metal Insulator ◽  
Amplitude Image ◽  
Metal Insulator Metal ◽  
Defect Localization ◽  
Lock In

Abstract The paper demonstrates accurate fault isolation information of metal-insulator-metal (MiM) capacitor failures by lock-in thermograph (LIT). In this study, a phase image spot location at a lock-in frequency larger than 5 Hz gives more accurate defect localization than an LIT amplitude image or OBIRCH to determine the next FA steps.

Trends in Discrete Power MOSFET and Power System In-Package Fault Isolation

2017 ◽  
Author(s):  
Ian Kearney ◽  
Mark Dipsey
Keyword(s):  
Crystalline Silicon ◽  
Fault Isolation ◽  
Focal Plane Arrays ◽  
Long Wavelength ◽  
Band Emission ◽  
Defect Localization ◽  
Recent Developments ◽  
Limited Application ◽  
Controlled Environments ◽  
Lock In

Abstract Photoluminescence, defect-band emission, and Lock-in Infrared Thermography (LIT) generally enable the correlation of multi-crystalline silicon defect types. Long Wavelength Infrared (LWIR) thermal imaging has traditionally seen limited application in failure analysis. LWIR cameras are typically uncooled systems using a microbolometer Focal Plane Arrays (FPA) commonly used in industrial IR applications, although cooled LWIR cameras using Mercury Cadmium Tellurium (MCT) detectors exists as well. On the contrary, the majority of the MWIR cameras require cooling, using either liquid nitrogen or a Stirling cycle cooler. Cooling to approximately −196 °C (77 K), offers excellent thermal resolution, but it may restrict the span of applications to controlled environments. Recent developments in LWIR uncooled and unstabilized micro-bolometer technology combined with microscopic IR lens design advancements are presented as an alternative solution for viable low-level leakage (LLL) defect localization and circuit characterization. The 30 micron pitch amorphous silicon type detector used in these analyses, rather than vanadium oxide (VOx), has sensitivity less than 50mK at 25C. Case studies reported demonstrate LWIR enhanced package-level and die-level defect localization contrasted with other quantum and thermal detectors in localization systems.

Zynq SOC Low-Voltage and Temperature-Dependent L2 Cache Failure Diagnosis and Defect Localization Case Study

2017 ◽  
Author(s):  
Haonan Bai ◽  
Lan Yin Lee ◽  
Yang Jing ◽  
Peter Floyd Salinas ◽  
Kok Keng Chua
Keyword(s):  
Failure Analysis ◽  
Low Voltage ◽  
Data Access ◽  
Pattern Generation ◽  
Fault Isolation ◽  
Programmable Logic ◽  
Single Chip ◽  
Tem Analysis ◽  
Test Methodology ◽  
Defect Localization

Abstract Failure analysis and defect localization on 28nm All Programmable Zynq System-on-Chip (SoC) device is extremely challenging. While conventional FPGA, which only consists of the Programmable Logic, has greater ease and flexibility in pattern generation during fault isolation, the all programmable SoC device integrates a dual ARM Cortex-A9 cores with Programmable Logic (PL) in a single chip. The cache data access in-between processor and PL is more complex and test methodology has lesser degree of control on cache data flow and stack sequence. This paper introduced an advanced fault isolation test methodology combining Software Development Kit (SDK) with scan based diagnostic test for cache failures. It successfully pinpoint to failure locations with physical defects found. As conventional physical failure analysis approaches using SEM based passive voltage contrast could not observe any abnormalities, current imaging and nano-probing measurement using AFP played critical roles in detecting nano-ampere leakages prior subsequent TEM analysis. The findings were then feedback to the foundry for process improvement. Furthermore, a new screening methodology is innovated where an extreme low-voltage test at high temperature in Automatic Test to detect and eliminate the process marginal leakage failure.

Advanced Non-Destructive Fault Isolation Techniques for PCB Substrates Using Magnetic Current Imaging and Terahertz Time Domain Reflectometry

2018 ◽  
Author(s):  
Daechul Choi ◽  
Yoonseong Kim ◽  
Jongyun Kim ◽  
Han Kim
Keyword(s):  
Time Domain ◽  
Quantum Interference ◽  
Flip Chip ◽  
Imaging System ◽  
Time Domain Reflectometry ◽  
Fault Isolation ◽  
Magnetic Current ◽  
Isolation Techniques ◽  
Super Conducting ◽  
Non Destructive

Abstract In this paper, we demonstrate cases for actual short and open failures in FCB (Flip Chip Bonding) substrates by using novel non-destructive techniques, known as SSM (Scanning Super-conducting Quantum Interference Device Microscopy) and Terahertz TDR (Time Domain Reflectometry) which is able to pinpoint failure locations. In addition, the defect location and accuracy is verified by a NIR (Near Infra-red) imaging system which is also one of the commonly used non-destructive failure analysis tools, and good agreement was made.

Accurate Defect Localization of Stacked Die Devices by Lock-in Thermography

2018 ◽  
Author(s):  
Ke-Ying Lin ◽  
Chih-Yi Tang ◽  
Yu Chi Wang
Keyword(s):  
Failure Analysis ◽  
Defect Modes ◽  
Defect Localization ◽  
Lock In

Abstract The paper demonstrates the moving of lock-in thermography (LIT) spot location by adjusting the lock-in frequency from low to high. Accurate defect localization in stacked-die devices was decided by the fixed LIT spot location after the lock-in frequency was higher than a specific value depending on the depth of the defect in the IC. Physical failure analysis was performed based on LIT results, which provided clear physical defect modes of the stacked-die devices.

Low Temperature Fault Isolation Using Soft Defect Localization

2012 ◽  
Author(s):  
Kristopher D. Staller
Keyword(s):  
Low Temperatures ◽  
Laser Scanning ◽  
Low Cost ◽  
Fault Isolation ◽  
Laser Scanning Microscopy ◽  
Cold Temperature ◽  
Multiple Point ◽  
Defect Localization ◽  
Low Levels

Abstract Cold temperature failures are often difficult to resolve, especially those at extreme low levels (< -40°C). Momentary application of chill spray can confirm the failure mode, but is impractical during photoemission microscopy (PEM), laser scanning microscopy (LSM), and multiple point microprobing. This paper will examine relatively low-cost cold temperature systems that can hold samples at steady state extreme low temperatures and describe a case study where a cold temperature stage was combined with LSM soft defect localization (SDL) to rapidly identify the cause of a complex cold temperature failure mechanism.

Visible Laser Probing (VLP) with GaP Solid Immersion Lens Demonstrating 110 nm Resolution in Common Laser Probing Applications

2016 ◽  
Author(s):  
Travis Eiles ◽  
Patrick Pardy
Keyword(s):  
Gallium Phosphide ◽  
Fault Isolation ◽  
Solid Immersion Lens ◽  
Laser Probing ◽  
Isolation Methods ◽  
Visible Laser ◽  
High Level ◽  
Industry Needs ◽  
Diameter Reduction ◽  
Better Than

Abstract This paper demonstrates a breakthrough method of visible laser probing (VLP), including an optimized 577 nm laser microscope, visible-sensitive detector, and an ultimate-resolution gallium phosphide-based solid immersion lens on the 10 nm node, showing a 110 nm resolution. This is 2x better than what is achieved with the standard suite of probing systems using typical infrared (IR) wavelengths today. Since VLP provides a spot diameter reduction of 0.5x over IR methods, it is reasonable, based simply on geometry, to project that VLP using the 577 nm laser will meet the industry needs for laser probing for both the 10 nm and 7 nm process nodes. Based on its high level of optimization, including high resolution and specialized solid immersion lens, it is highly likely that this VLP technology will be one of the last optically-based fault isolation methods successfully used.

Magnetic Current Imaging Power Short Localization

2015 ◽  
Author(s):  
J. Gaudestad ◽  
F. Rusli ◽  
A. Orozco ◽  
M.C. Pun
Keyword(s):  
Thermal Imaging ◽  
Flip Chip ◽  
Optical Microscope ◽  
Fault Isolation ◽  
Magnetic Current ◽  
Multiple Fault ◽  
Defect Location ◽  
Isolation Techniques ◽  
Chip Sample

Abstract A Flip Chip sample failed short between power and ground. The reference unit had 418Ω and the failed unit with the short had 16.4Ω. Multiple fault isolation techniques were used in an attempt to find the failure with thermal imaging and Magnetic Current Imaging being the only techniques capable of localizing the defect. To physically verify the defect location, the die was detached from the substrate and a die cracked was seen using a visible optical microscope.

Fault Isolation of Open Defects Using Space Domain Reflectometry

2012 ◽  
Author(s):  
Mayue Xie ◽  
Zhiguo Qian ◽  
Mario Pacheco ◽  
Zhiyong Wang ◽  
Rajen Dias ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Fault Isolation ◽  
Nondestructive Technique ◽  
Space Domain ◽  
New Approach ◽  
Defect Localization ◽  
Open Faults ◽  
Open Defects ◽  
Application Optimization ◽  
Rf Magnetic Field

Abstract Recently, a new approach for isolation of open faults in integrated circuits (ICs) was developed. It is based on mapping the radio-frequency (RF) magnetic field produced by the defective part fed with RF probing current, giving the name to Space Domain Reflectometry (SDR). SDR is a non-contact and nondestructive technique to localize open defects in package substrates, interconnections and semiconductor devices. It provides 2D failure isolation capability with defect localization resolution down to 50 microns. It is also capable of scanning long traces in Si. This paper describes the principles of the SDR and its application for the localization of open and high resistance defects. It then discusses some analysis methods for application optimization, and gives examples of test samples as well as case studies from actual failures.

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