scholarly journals Physical Characterisation of 3C-SiC(001)/SiO2 Interface Using XPS

2017 ◽  
Vol 897 ◽  
pp. 151-154 ◽  
Author(s):  
Fan Li ◽  
Oliver Vavasour ◽  
Marc Walker ◽  
David M. Martin ◽  
Yogesh K. Sharma ◽  
...  

Normally-on MOSFETs were fabricated on 3C-SiC epilayers using high temperature (1300 °C) wet oxidation process. XPS analysis found little carbon at the MOS interface yet the channel mobility (60 cm2/V.s) is considerably low. Si suboxides (SiOx, x<2) exist at the wet oxidised 3C-SiC/SiO2 interface, which may act as interface traps and degrade the conduction performance.

2014 ◽  
Vol 778-780 ◽  
pp. 975-978 ◽  
Author(s):  
Mitsuo Okamoto ◽  
Youichi Makifuchi ◽  
Tsuyoshi Araoka ◽  
Masaki Miyazato ◽  
Yoshiyuki Sugahara ◽  
...  

4H-SiC(000-1) C-face was oxidized in H2O and H2mixture gas (H2rich wet ambient) for the first time. H2rich wet ambient was formed by the catalytic water vapor generator (WVG) system, where the catalytic action instantaneously enhances the reactivity between H2and O2to produce H2O. The dependence of SiC oxidation rate on the H2O partial pressure was investigated. We fabricated 4H-SiC C-face MOS capacitor and MOSFET by the H2rich wet re-oxidation following the dry O2oxidation. The density of interface traps was reduced and the channel mobility was improved in comparison with the conventional O2rich wet oxidation.


2006 ◽  
Vol 527-529 ◽  
pp. 1301-1304
Author(s):  
Mitsuo Okamoto ◽  
Mieko Tanaka ◽  
Tsutomu Yatsuo ◽  
Kenji Fukuda

We have fabricated inversion-type p-channel MOSFETs on 4H-SiC substrates. In this paper, influences of gate oxidation process on the properties of p-channel MOSFETs were investigated. The gate oxide was formed under these three conditions: (i) dry oxidation, (ii) dry oxidation following wet re-oxidation, and (iii) wet oxidation. The C-V measurements of p-type 4H-SiC MOS capacitors revealed that wet oxidation process reduced the interface states near the valence band. The p-channel MOSFET with low interface states near the valence band indicated low threshold voltage (Vth), high field effect channel mobility (μFE) and low subthreshold swing (S). We obtained 4H-SiC p-channel MOSFET with high μFE of 15.6cm2/Vs by using wet oxidation as gate oxidation process.


2016 ◽  
Vol 858 ◽  
pp. 667-670 ◽  
Author(s):  
Fan Li ◽  
Yogesh K. Sharma ◽  
M.R. Jennings ◽  
A. Pérez-Tomás ◽  
Vishal Ajit Shah ◽  
...  

In this work we studied the gate oxidation temperature and nitridation influences on the resultant 3C-SiC MOSFET forward characteristics. Conventional long channel lateral MOSFETs were fabricated on 3C-SiC(100) epilayers grown on Si substrates using five different oxidation process. Both room temperature and high temperature (up to 500K) forward IV performance were characterised, and channel mobility as high as 90cm2/V.s was obtained for devices with nitrided gate oxide, considerable higher than the ones without nitridation process (~70 cm2/V.s).


2010 ◽  
Vol 645-648 ◽  
pp. 829-832 ◽  
Author(s):  
Romain Esteve ◽  
Adolf Schöner ◽  
Sergey A. Reshanov ◽  
Carl Mikael Zetterling

The electrical properties of oxides fabricated on n-type 3C-SiC (001) using wet oxidation and an advanced oxidation process combining SiO2 deposition with rapid post oxidation steps have been compared. Two alternative SiO2 deposition techniques have been studied: the plasma enhanced chemical vapor deposition (PECVD) and the low pressure chemical vapor deposition (LPCVD). The post-oxidized PECVD oxide is been demonstrated to be beneficial in terms of interface traps density and reliability.


2018 ◽  
Vol 924 ◽  
pp. 494-497 ◽  
Author(s):  
Jesus Urresti ◽  
Faiz Arith ◽  
Konstantin Vassilevski ◽  
Amit Kumar Tiwari ◽  
Sarah Olsen ◽  
...  

We report the development of a low-temperature (600 °C) gate oxidation approach to minimize the density of interface traps (DIT) at the SiC/SiO2interface, ultimately leading to a significantly higher channel mobility in SiC MOSFETs of 81 cm2·V-1·s-1, >11x higher than devices fabricated alongside but with a conventional 1150 °C gate oxide. We further report on the comparison made between the DITand channel mobilities of MOS capacitors and n-MOSFETs fabricated using the low-and high-temperature gate oxidation.


2007 ◽  
Vol 55 (12) ◽  
pp. 189-193 ◽  
Author(s):  
C. Maugans ◽  
B. Kumfer

Wet oxidation tests were performed on two pure compound streams: acetic acid and ammonia; and on two wastewater streams: acrylic acid wastewater and sulphide laden spent caustic. Test results showed that Mn/Ce and Pt/TiO2 were effective catalysts that greatly enhanced acetic acid, ammonia and acrylic acid wastewater destruction. However, the Mn/Ce catalyst performance appears to be inhibited by concentrated salts dissolved in solution. This could limit the applicability of this catalyst for the treatment of brackish wastewaters. Zr, Ce and Ce nanoparticles were also shown to exhibit some catalytic activity, however not to the extent of the Mn/Ce and the Pt/TiO2.


2007 ◽  
Vol 556-557 ◽  
pp. 835-838 ◽  
Author(s):  
Amador Pérez-Tomás ◽  
Michael R. Jennings ◽  
Philip A. Mawby ◽  
James A. Covington ◽  
Phillippe Godignon ◽  
...  

In prior work we have proposed a mobility model for describing the mobility degradation observed in SiC MOSFET devices, suitable for being implemented into a commercial simulator, including Coulomb scattering effects at interface traps. In this paper, the effect of temperature and doping on the channel mobility has been modelled. The computation results suggest that the Coulomb scattering at charged interface traps is the dominant degradation mechanism. Simulations also show that a temperature increase implies an improvement in field-effect mobility since the inversion channel concentration increases and the trapped charge is reduced due to bandgap narrowing. In contrast, increasing the substrate impurity concentration further degrades the fieldeffect mobility since the inversion charge concentration decreases for a given gate bias. We have good agreement between the computational results and experimental mobility measurements.


2022 ◽  
Vol 558 ◽  
pp. 153327
Author(s):  
Hai-Bin Ma ◽  
Ya-Huan Zhao ◽  
Yang Liu ◽  
Jing-Ting Zhu ◽  
Jun Yan ◽  
...  

2013 ◽  
Vol 740-742 ◽  
pp. 958-961 ◽  
Author(s):  
Shuji Katakami ◽  
Hiroyuki Fujisawa ◽  
Kensuke Takenaka ◽  
Hitoshi Ishimori ◽  
Shinji Takasu ◽  
...  

We fabricated and characterized an ultrahigh voltage (>10kV) p-channel silicon carbide insulated gate bipolar transistor (SiC-IGBT) with high channel mobility. Higher field-effect channel mobility of 13.5 cm2/Vs was achieved by the combination of adopting an n-type base layer with a retrograde doping profile and additional wet re-oxidation annealing (wet-ROA) at 1100°C in the gate oxidation process. The on-state characteristics of the p-channel SiC-IGBT at 200°C showed the low differential specific on-resistance of 24 mΩcm2 at VG = -20 V. The forward blocking voltage of the p-channel SiC-IGBT at 25°C was 10.2 kV a the leakage current density of 1.0 μA/cm2.


1989 ◽  
Vol 159 ◽  
Author(s):  
E.D. Richmond

ABSTRACTFor the first time the (1102) surface of sapphire has been investigated by X-ray photoelectron spectroscopy to ascertain chemical changes resulting from annealing in vacuum at 1300° C and 1450° C. As received substrates had a substantial surface C contaminant. For substrates that were chemically cleaned before inserting them into the MBE system no trace of carbon is detected. A residual flourine contaminant results from the cleaning procedure and is desorbed by the vacuum annealing. Spectra of annealed substrates are compared to the unannealed chemically cleaned substrates. The annealed substrates exhibit 0.4 to 0.5 eV shift to higher binding energy of the Al peak and a 0.3 eV shift to higher binding energy of the O peak. In addition, a 2% depletion of oxygen from the surface occurs.


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