Electrical characterization of TSVs with varying process knobs and temporary bond/adhesive system robustness studies for 2.5D/3D manufacturing

2013 ◽  
Vol 2013 (1) ◽  
pp. 000233-000233
Author(s):  
Niranjan Kumar
Keyword(s):  
Electrical Parameter ◽  
Electrical Characterization ◽  
Adhesive System ◽  
Parameter Extraction ◽  
Electrical Performance ◽  
Process Window ◽  
Film Properties ◽  
Wafer Processing ◽  
The Impact

TSVs are used to carry power/ground and signals straight to the heart of the logic/memory devices where all the intricate and busy architectures lie. I consider it like the downtown area inside a city where the real estate is more expensive and requires intricate design and execution. As a result in case of the TSVs, there is no room for electrical degradation and stress interaction with transistor devices (keep out zone). The Cu protrusion, it's interaction with the intricate local interconnects (M1 and below structures), the current leakage, capacitance, reliability, become highly critical to fully achieve the power per watt advantage of the TSVs. As a result, a thorough electrical characterization of TSVs with varying film properties and the process window becomes very critical for integration with the 20nm node (and below) devices. In this paper we will discuss implementation of modified oxide liner, barrier/seed, ECD fill and CMP of films to achieve robust TSVs for electrical parameter extraction. We will closely examine the impact of these film properties on the electrical performance and its repeatability to achieve wide process windows. Such studies are expected to improve manufacturing yields of TSV product wafers at fabs/foundries. Alternately, we will present detailed metrology studies of two temporary bond method/adhesive systems as it progresses through the thin wafer downstream processes (via-reveal processes). This exercise is targeted to address productivity and yield challenges with thin wafer processing (backside via-reveal process). We will attempt to demonstrate a robust temporary bond/adhesive system that exhibits no thin wafer damage/wrinkling and no edge profile degradation issues over repeated runs (production like). This study will help to characterize the adhesive and low temperature passivation film interfaces in details to support the thin wafer processing robustness for TSV manufacturing.

Electrical Characterization of E7 Liquid Crystal Molecules under the Impact of an External Electric Field (THz): A Theoretical approach

2020 ◽  
Vol 15 (2) ◽  
pp. 95-101
Keyword(s):  
Liquid Crystal ◽  
Electric Field ◽  
Order Parameter ◽  
Optical Switching ◽  
Rapid Change ◽  
Electrical Characterization ◽  
Optical Switching Devices ◽  
The Impact ◽  
Orientation Of Molecules

In this work, different parameters of E7 liquid crystal (LC) have been calculated under the influence of an electric field in THz frequency. The E7 LC parameters have positive as well as negative values of order parameter and birefringence under the influence for an electric field. The director angle of E7 LC shows fast fluctuations above the angle θ=45° and due to rapid change in the orientation of molecules, fast electro-optical switching devices based on E7 LC can be designed. The refractive index of the E7 LC maintains stability in THz frequency.

scholarly journals Structural Characterization of Movpe Grown Algan/Gan for Hemt Formation

2018 ◽  
Vol 57 (1) ◽  
pp. 72-81 ◽  
Author(s):  
V.N. Popok ◽  
T.S. Aunsborg ◽  
R.H. Godiksen ◽  
P.K. Kristensen ◽  
R.R. Juluri ◽  
...  
Keyword(s):  
Electrical Characterization ◽  
Charge Carrier Concentration ◽  
Electrical Performance ◽  
Clear Understanding ◽  
Si Substrates ◽  
Transfer Of Technology ◽  
Dislocation Densities ◽  
Unusual Phenomenon ◽  
Aln Buffer

Abstract Results on structural, compositional, optical and electrical characterization of MOVPE grown AlGaN/GaN heterostructures with focus on understanding how the AlN buffer synthesis affects the top films are reported. The study demonstrates very good correlation between different methods providing a platform for reliable estimation of crystalline quality of the AlGaN/GaN structures and related to that electrical performance which is found to be significantly affected by threading dislocations (TD): higher TD density reduces the electron mobility while the charge carrier concentration is found to be largely unchanged. The attempt to vary the ammonia flow during the AlN synthesis is found not to affect the film composition and dislocation densities in the following heterostructures. An unusual phenomenon of considerable diffusion of Ga from the GaN film into the AlN buffer is found in all samples under the study. The obtained results are an important step in optimization of AlGaN/GaN growth towards the formation of good quality HEMT structures on sapphire and transfer of technology to Si substrates by providing clear understanding of the role of synthesis parameter on structure and composition of the films.

Electrical Characterization of Al2O3 - SiO2 Mos Structures

1999 ◽  
Vol 567 ◽  
Author(s):  
L-Å Ragnarsson ◽  
E. Aderstedt ◽  
P. Lundgren
Keyword(s):  
Electrical Characterization ◽  
Thickness Reduction ◽  
Initial Thickness ◽  
Equivalent Thickness ◽  
Conventional Furnace ◽  
Capacitance Voltage ◽  
Layered Dielectric ◽  
The Impact ◽  
Mos Structures

ABSTRACTA comparative capacitance voltage method is used to investigate the equivalent thickness reduction during post metallization annealing of thermally grown ultrathin (∼15-27 Å) oxides. It is found that a double layered dielectric consisting of a thin Al2O3—SiO2 sandwich is appropriate to describe both the increased capacitance and the nearly unaltered current after anneal. It is further shown that the impact of initial thickness and method of growth — in a conventional furnace or by rapid thermal oxidation — on the equivalent thickness reduction is negligible.

Structural and Electrical Characterization of Doped Zirconia Nanostructured Fibres

2012 ◽  
Vol 545 ◽  
pp. 285-289
Author(s):  
Adrian Lowe ◽  
Deborah Eve Kho Siu Chu ◽  
Li Lu
Keyword(s):  
Grain Size ◽  
Electrical Characterization ◽  
Electrospinning Process ◽  
Electrical Performance ◽  
Energy Storage Materials ◽  
Impedance Response ◽  
Average Grain Size ◽  
Tetragonal Form ◽  
Cv Measurements

Pure and lithium-doped zirconia fibres have been produced using the electrospinning process. These fibres are seen to be mesoporous in nature and possess a dense outer skin that correlates with the existance of tetragonal structure. This tetragonal form exists in materials below a certain average grain size and also correlates well with capacitance retention, CV measurements and impedance response. During electrical performance, an initial irreversible solid electrolyte interface is believed to form and average grain size has a significant effect. This study suggests that in this mesoporous/skin form, electrospun zirconia fibres are promising energy storage materials.

Probing at Nanoscale Underneath the Gate Oxides in 4H-SiC MOS-Based Devices Annealed in N2O and POCl3

2014 ◽  
Vol 806 ◽  
pp. 143-147
Author(s):  
P. Fiorenza ◽  
Marilena Vivona ◽  
L.K. Swanson ◽  
Filippo Giannazzo ◽  
C. Bongiorno ◽  
...  
Keyword(s):  
Electrical Characterization ◽  
Cross Sectional ◽  
Direct Demonstration ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
N Incorporation ◽  
The Impact ◽  
Post Deposition ◽  
Partial Compensation

In this paper a comparative study of the impact of N2O and POCl3 annealing on the SiO2/SiC system is presented, combining nanoscale electrical characterization of SiC surface doping by scanning spreading resistance microscopy (SSRM) and scanning capacitance microscopy (SCM) to the conventional capacitance-voltage (C-V) and current-voltage (I-V) measurements on MOS-based devices. A significant reduction of the interface states density (from 1.8×1012 to 5.7×1011 cm-2eV-1) and, correspondingly, an increase in the carrier mobility (from 19 to 108 cm2V-1s-1) was found moving from N2O to POCl3 annealing. Furthermore, SSRM measurements on bare p+-type SiC regions selectively exposed to N2O and POCl3 at high temperature provided the direct demonstration of the incorporation of N or P-related donors in the SiC surface, leading to a partial compensation of substrate acceptors during N2O treatment and to an overcompensation during POCl3 annealing. Finally, cross-sectional SCM profiles performed on epitaxial n-doped 4H-SiC with 45 nm SiO2 (subjected to post deposition annealing in the two ambients) allowed to quantify the active donors concentrations associated to P or N incorporation under the gate oxide, showing almost a factor of ten higher doping (4.5×1018cm-3 vs 5×1017cm-3) in the case of P related donors.

scholarly journals Electrical Characterization of Conductive Threads for Textile Electronics

Electronics ◽  
2021 ◽  
Vol 10 (8) ◽  
pp. 967
Author(s):  
Adrian K. Stavrakis ◽  
Mitar Simić ◽  
Goran M. Stojanović
Keyword(s):  
Internet Of Things ◽  
Electronic Devices ◽  
Electrical Characterization ◽  
Maximum Power ◽  
Electrical Performance ◽  
Microscopic Scale ◽  
Mass Public ◽  
Power Handling ◽  
New Devices

In recent years, advancements in technology are constantly driving the miniaturization of electronic devices, not only in the renowned domain of Internet-of-Things but also in other fields such as that of flexible and textile electronics. As the latter forms a great ecosystem for new devices, that could be functional such as heating garments or sensory, many suppliers have already started producing and bringing to market conductive threads that can be used by researchers and the mass public for their work. However, to date, no extensive characterization has been carried out with respect to the electrical performance of such threads and that is what this article is aiming to amend. Four commercially available threads by two different suppliers were put under test, to establish their limitations in terms of maximum power handling, both continuous and instantaneous. They were subsequently examined at a microscopic scale as well, to verify any potential caveats in their design, and any hidden limitations. A preliminary profile for each of the four threads was successfully established.

scholarly journals A high electrical performance of DG-MOSFET transistors in 4H-SiC and 6H-SiC 130 nm technology by BSIM3v3 model

2019 ◽  
Vol 70 (2) ◽  
pp. 145-151
Author(s):  
Mourad Hebali ◽  
Menaouer Bennaoum ◽  
Mohammed Berka ◽  
Abdelkader Baghdad Bey ◽  
Mohammed Benzohra ◽  
...  
Keyword(s):  
Low Power ◽  
Low Voltage ◽  
Electrical Characterization ◽  
Electrical Performance ◽  
Subthreshold Slope ◽  
Ultra Low Power ◽  
Dg Mosfet ◽  
Subthreshold Operation ◽  
Very High

Abstract In this paper, the electrical performance of double gate DG-MOSFET transistors in 4H-SiC and 6H-SiC technologies have been studied by BSIM3v3 model. In which the I–V and gm–V characteristics and subthreshold operation of the DGMOSFET have been investigated for two models (series and parallel) based on equivalent electronic circuits and the results so obtained are compared with the single gate SG-MOSFET, using 130 nm technology and OrCAD PSpice software. The electrical characterization of DG-MOSFETs transistors have shown that they operate under a low voltage less than 1.2 V and low power for both models like the SG-MOSFET transistor, especially the series DG-MOSFET transistor is characterized by an ultra low power. The different transistors are characterized by an ultra low OFF leakage current of pA order, very high ON/OFF ratio of and high subthreshold slope of order 0.1 V/dec for the transistors in 6H-SiC and 4H-SiC respectively. These transistors also proved higher transconductance efficiency, especially the parallel DG-MOSFET transistor.

Revisited parameter extraction methodology for electrical characterization of junctionless transistors

2013 ◽  
Vol 90 ◽  
pp. 86-93 ◽  
Author(s):  
D.-Y. Jeon ◽  
S.J. Park ◽  
M. Mouis ◽  
M. Berthomé ◽  
S. Barraud ◽  
...  
Keyword(s):  
Electrical Characterization ◽  
Parameter Extraction ◽  
Junctionless Transistors
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