Effect of positive and negative interface trap charges on the performance of M-FinFET and its RF/linearity analysis

Multiple Fins structured FinFET (M-FinFET) is a promising semiconductor device for future improvisation of CMOS technology. In this paper, we investigate the impact of interface trap charges (positive and negative trap) at the HfO2/Si interface in M-FinFET for the first time. The various important DC attributes, RF/analog, and linearity metrics are studied in presence and absence of traps. Simultaneously, the various trap concentration effect on the characteristics of M-FinFET are also observed. The results show that the introduction of interface trap charges (ITC) has optimized the ON current, OFF current, and also improves sub-threshold swing (SS) characteristics as compared to no trap condition. It is observed that positive trap having trap concentration of 1012/cm2 enhances the ION ~5.14x, SS by 44.75%, and various important RF/analog parameter such as transconductance (Gm) improves by a factor 5, device efficiency by 7.4% and intrinsic gain (Av) 80.4%. On the other hand, linearity parameters like VIP2, VIP3 and 1 dB compression point show better performance in presence of positive and negative trap.

On the Modeling of the Donor/Acceptor Compensation Ratio in Carbon-Doped GaN to Univocally Reproduce Breakdown Voltage and Current Collapse in Lateral GaN Power HEMTs

The intentional doping of lateral GaN power high electron mobility transistors (HEMTs) with carbon (C) impurities is a common technique to reduce buffer conductivity and increase breakdown voltage. Due to the introduction of trap levels in the GaN bandgap, it is well known that these impurities give rise to dispersion, leading to the so-called “current collapse” as a collateral effect. Moreover, first-principles calculations and experimental evidence point out that C introduces trap levels of both acceptor and donor types. Here, we report on the modeling of the donor/acceptor compensation ratio (CR), that is, the ratio between the density of donors and acceptors associated with C doping, to consistently and univocally reproduce experimental breakdown voltage (VBD) and current-collapse magnitude (ΔICC). By means of calibrated numerical device simulations, we confirm that ΔICC is controlled by the effective trap concentration (i.e., the difference between the acceptor and donor densities), but we show that it is the total trap concentration (i.e., the sum of acceptor and donor densities) that determines VBD, such that a significant CR of at least 50% (depending on the technology) must be assumed to explain both phenomena quantitatively. The results presented in this work contribute to clarifying several previous reports, and are helpful to device engineers interested in modeling C-doped lateral GaN power HEMTs.

Simulation Study of the Impact of Traps in GaN Substrates on the Electrical Characteristics of AlGaN/GaN HEMTs with Thin Channel Layers

GaN substrates are promising candidates for GaN high electron mobility transistors (HEMTs) due to their epitaxial layer growth with a low defect density. In this study, technology computer-aided design simulations were executed to design the GaN HEMTs on semi-insulating GaN substrates with thin channel layers. Traps in the GaN substrates played a role in suppressing drain-leakage currents, although degrading transient responses changed the bias from off to on-state for the 0.02-μm thin channel layer. A trade-off relationship between the drain-leakage current and transient response is occurred by changing the trap concentration in the GaN substrates. The AlGaN back-barrier structure has been found to be highly effective in suppressing the drain-leakage current in low-trap-concentration GaN substrates. The trade-off relationship improved by adopting the back-barrier layers, and the maximum drain current decreased. The drain-current reduction compensated by increasing the Al content in the barriers without degrading the trade-off relationship. Therefore, for GaN HEMTs that have low-trap-concentration GaN substrates combined with the back-barrier layer, a high-Al-content barrier have characteristics that are favorable for the trade-off relationship in the case of thin channel layers. Moreover, the traps in GaN substrates were found to affect low-frequency S 21 , which is important for linearity of the power amplifier, as critically as the transient responses.

Effect of Different Sized Multi Walled Carbon Nanotubes on the Barrier Potential and Trap Concentration of Malachite Green Dye Based Organic Device

Present work shows effect of 8 nm diameter and 30 nm diameter multi walled carbon nanotubes (MWCNT) on the barrier potential and trap concentration of Malachite Green (MG) dye based organic device. MWCNTs are basically a bundle of concentric single-walled carbon nanotubes with different diameters. In this work, ITO coated glass substrate and aluminium have been used as front electrode and back electrode respectively and the spin coating method is used to prepare the MG dye based organic device. It has been observed that both barrier potential and trap concentration are in correlation. Estimation of both these parameters has been done from current-voltage characteristics of the device to estimate the trap energy and the barrier potential of the device. Device turn-on voltage or the transition voltage is also calculated by using current-voltage characteristics. In presence of 8 nm diameter MWCNT, the transition voltage is reduced from 3.9 V to 2.37 V, the barrier potential is lowered to 0.97 eV from 1.12 eV and the trap energy is lowered to 0.028 eV from 0.046 eV whereas incorporation of 30 nm diameter MWCNT shows reduction of transition voltage from 3.9 V to 2.71 V and a reduction of barrier potential and trap concentration from 1.12 eV to 1.03 eV and from 0.046 eV to 0.035 eV respectively. Presence of both 8 nm diameter and 30 nm diameter MWCNT lowers trap energy approximately to 39% and 24% respectively and lowers barrier potential approximately to 13% and 8% respectively. Estimation of barrier potential is also done by Norde method which shows lowering of the value from 0.88 eV to 0.79 eV and from 0.88 eV to 0.84 eV in presence of both 8 nm and 30 nm diameter multi walled carbon nanotubes respectively. Calculation of barrier potential from both the I-V characteristics and Norde method are in unison with each other. Indication of enhancement of charge flow in the device can be ascribed to the truncated values of barrier potential and trap energy.

Al Implantation and Post Annealing Effects in n-Type 4H-SiC

We investigated the post annealing effect of Al implantation in n-type 4H-SiC by using deep level transient spectroscopy (DLTS). The Schottky contacts were deposited on n-type epitaxial layer on 4H-SiC substrates and the effect of Al-implantation on the structures has been examined with and without post-annealing process. n-type epitaxial layer on a 4H-SiC substrate was implanted with Al-ion at an energy of 300 keV and a dose of 1.0 × 1015 cm–2. The effect of annealing has been studied by annealing the structures at 1700 C after ion implantation. DLTS measurements were performed before and after ion implantation, in order to determine the characteristics and magnitudes of the resulting electrical defects. Based on the DLTS measurement results, typical Z1/2 peak of SiC is obtained in reference samples without implantation. Z1/2 of the non-annealed samples had an energy level of 0.831 eV. The energy level was found to be deeper after the implantation whereas the capture cross section is about 60 times smaller and the trap concentration increases by a factor of 10. In other words, the Al-ion implantation clearly influenced the electrical characteristics of the sample and consequently also the DLTS measurement results. After post-implantation annealing, a new shallow defect (I2Al-A) was identified (∼0.028 eV) with a capture cross section of 1.9 × 10–21 cm –2 and a trap concentration of 4.8 × 1015 cm–3.

Contactless transient carrier spectroscopy and imaging technique using lock-in free carrier emission and absorption

In this paper we present a contactless transient carrier spectroscopy and imaging technique for traps in silicon. At each pixel, we fit the transient decay of the trap emission which allows us to obtain both the trap time constant and trap concentration. Here we show that this technique allows for high-resolution images. Furthermore, this technique also allows to discriminate between the presence of thermal donors or oxygen precipitates in as-grown wafers, without requiring a thermal donor killing step.

DC Gate Leakage Current Model Accounting for Trapping Effects in AlGaN/GaN HEMTs

A DC leakage current model accounting for trapping effects under the gate of AlGaN/GaN HEMTs on silicon has been developed. Based on TCAD numerical simulations (with Sentaurus Device), non-local tunneling under the Schottky gate is necessary to reproduce the measured transfer characteristics in a subthreshold regime. Once the trap concentration and distribution are determined in the device, the resulting gate leakage current is modeled making use of Verilog-A, for typical operation regimes.