Applications of Solid Phase Doping in Manufacturing MOS Devices

1990 ◽  
Vol 182 ◽  
Author(s):  
S. F. Gong ◽  
H. T. G. Hentzell ◽  
A. Robertsson
Keyword(s):  
Integrated Circuits ◽  
High Speed ◽  
Field Effect Transistors ◽  
Solid Phase ◽  
Mos Devices ◽  
Transmission Electron ◽  
Heavily Doped ◽  
Si Films ◽  
Secondary Ion ◽  
Si Wafer

AbstractSolid phase doping from Sb heavily-doped Si films has been studied by using transmission electron microscopy and secondary ion mass spectroscopy. Based on the results of the material study, metal-oxidesemiconductor field effect transistors (MOSFETs) made on a (100) Si wafer, and thin film transistors have been implemented. The technique for the MOSFETs suggests the possibility for making small dimensional and high speed integrated circuits by using the method of solid phase doping.

Barrier Properties of Electroless Ni-B UBM for Solder Joining

2015 ◽  
Vol 2015 (1) ◽  
pp. 000862-000867
Author(s):  
Masaru Morita ◽  
Toshiya Akamatsu ◽  
Nobuhiro Imaizumi ◽  
Seiki Sakuyama
Keyword(s):  
Integrated Circuits ◽  
High Speed ◽  
Solid Phase ◽  
Barrier Properties ◽  
Electrode Structure ◽  
Phase Diffusion ◽  
3D Ics ◽  
The Difference ◽  
Electroless Ni ◽  
Plating Layer

As demands accelerate for high density, high speed transmission and low power integrated circuits, 3D-ICs with through-silicon via (TSV) is pursued. In the structure of 3D-ICs, the first die is attached to the second die with micro bump, and the second die is attached to the circuit substrate with a C4 solder bump. The electrode structure of the second die is Cu/Ni UBM. The stress of the Ni-B layer is less than that of the Ni-P layer, and the Ni-B layer can suppress stress and die warpage. The purposes of our study are to clarify the difference in the barrier properties of the Ni-B UBM and Ni-P under bump metal (UBM) and the relevance of the barrier properties of Ni UBM and intermetallic compound (IMC) growth. It was found that an electroless Ni-B plating layer is superior to a Ni-P plating layer for UBM in liquid phase diffusion and in solid phase diffusion, and that a segregated B layer is formed under the IMC layer of a Ni-B land due to reflow soldering. It was estimated that this B layer plays the role of being a barrier layer for solder diffusion.

The Fabrication of High-Speed Electronic Devices by Ion-Beam Synthesis of GexSi1-x Strained Layers

1996 ◽  
Vol 438 ◽  
Author(s):  
R. G. Elliman ◽  
H. Jiang ◽  
W. C. Wong ◽  
P. Kringhøj
Keyword(s):  
Oxidation Rate ◽  
Field Effect ◽  
High Speed ◽  
Materials Science ◽  
Field Effect Transistors ◽  
Solid Phase ◽  
Ion Beam ◽  
Electronic Devices ◽  
Solid Phase Epitaxy ◽  
Strained Layers

AbstractGexSi1-x, strained layers can be fabricated by Ge implantation and solid-phase epitaxy and can be used in electronic devices to improve their performance. Several important materials science issues are addressed, including the effect of the strain on solid-phase-epitaxy, the effect of oxidation on the implanted Ge distribution, and the effect of Ge on the oxidation rate of Si. The potential of this process is demonstrated by comparing the performance of metal-oxidesemiconductor field-effect-transistors (MOSFETs) employing ion-beam synthesised GeSi strained layer channel regions with that of Si-only devices.

Studies of MOS and Heterojunction Devices Using Doped μc-Si and a-Si

1991 ◽  
Vol 219 ◽  
Author(s):  
D. R. Lee ◽  
C. H. Bjorkman ◽  
C. Wang ◽  
G. Lucovsky
Keyword(s):  
Photovoltaic Effect ◽  
Chemical Vapor ◽  
Flat Band ◽  
Mos Capacitor ◽  
Gate Electrodes ◽  
Mos Devices ◽  
Current Voltage ◽  
Heavily Doped ◽  
Si Films ◽  
Band Structure Model

ABSTRACTCurrent-voltage voltage characteristics of heterojunctions formed by remote plasma enhanced chemical vapor deposition (PECVD) of heavily doped μc-Si onto doped c-Si have been studied, as well as capacitance-voltage characteristics of MOS capacitor structures using heavily doped remote PECVD μc-Si and a-Si films as gate electrodes on thermally oxidized crystalline Si. Shifts in the flat-band voltages of MOS devices using the μc-Si and a-Si as gate electrodes relative to that of a reference Al/SiO2/c-Si structure are measured and explained in terms of a band structure model for the μc-Si and a-Si. Rectification and a photovoltaic effect observed in the pn heterojunctions are also explained in context of the same model.

scholarly journals Graded-Gap TechnologyFormattingof High-Speed GaAs – TransistorStructuresastheBasisforModern of Large Integrated Circuits

2015 ◽  
Vol 16 (1) ◽  
pp. 221-229
Author(s):  
S.P. Novosyadlyy ◽  
A.M. Bosats'kyy
Keyword(s):  
Integrated Circuits ◽  
Field Effect ◽  
High Speed ◽  
Field Effect Transistors ◽  
Effective Rate ◽  
Bipolar Transistors ◽  
Hot Electron ◽  
Silicon Devices ◽  
Heterostructure Field Effect Transistors ◽  
Gap Technology

Reducing the size of silicon devices is accompanied by an increase in the effective rate of electrons,  decrease transit time and the transition to a ballistic work.Power consumption is reduced too. Formation of large integrated circuits structures onSi-homotransition reduces their frequency range and performance.Nowadaysproposed several new types of devices and technologies forming of large integrated circuits structures that based on high speeds and mobility of electrons in GaAs, and  small size structures.These include, for example, the heterostructure field-effect transistors on a segmented doping, bipolar transistors with wide-emitter, transistor with soulful base, vertical ballistic transistors, devices with flat-doped barriers and hot electron transistors as element base of modern high-speed large integrated circuits.In this article we consider graded-gap technology formatting as bipolar and field-effect transistors, which are the basis of modern high-speedof large integrated circuits structures.

Electrical Activation of Heavily Doped Arsenic Implanted Silicon

1988 ◽  
Vol 128 ◽  
Author(s):  
J. Said ◽  
H. Jaouen ◽  
G. Ghibaudo ◽  
I. Stoemenos ◽  
P. Zaumseil
Keyword(s):  
Solid Phase ◽  
Electrical Activation ◽  
Activation Process ◽  
Solid Phase Epitaxy ◽  
X Ray Diffraction ◽  
Electrical Transmission ◽  
X Ray ◽  
Defect Migration ◽  
Transmission Electron ◽  
Heavily Doped

ABSTRACTThe combination of electrical, Transmission Electron Microscopy and Triple Crystal X-ray Diffraction measurements allow us to separate the existence of a local impurity activation process from the amorphous- crystal transformation. The local process occurs in the highly damaged surface layer induced by the arsenic implantation and is efficient well below the Solid Phase Epitaxy transition temperature. It is suggested that point defect migration should play an important role in the electrical impurity activation at low annealing temperatures.

Studies of Ultra-High Speed Silicon Crystal Growth From The Melt By Use of Conventional and High Resolution Transmission Electron Microscopy

1985 ◽  
Vol 43 ◽  
pp. 22-25
Author(s):  
A. G. Cullis
Keyword(s):  
Electron Microscopy ◽  
Crystal Growth ◽  
High Resolution ◽  
High Speed ◽  
Solid Phase ◽  
Silicon Crystal ◽  
Amorphous Solid ◽  
Orientation Dependence ◽  
Transmission Electron ◽  
Resolution Imaging

Fast melting and solidification of semiconductors by use of Q-switched laser irradiation techniques has provided, during the last few years, a large amount of information on novel high speed crystal growth processes. Under the highest quench rate conditions, the motion of the final solidification interface can be so rapid (many metres per second) that atomic ordering processes are overwhelmed and either defective crystal or even the amorphous solid phase is formed. Most work in this area has been carried out on elemental Si and electron microscopy of solidification structures has played an essential analytical role through both conventional and high resolution imaging studies. The present paper will outline recent progress which has been made in understanding the crystallographic orientation dependence of high-speed growth phenomena.

Enhanced Boron Diffusion in Amorphous Silicon

2004 ◽  
Vol 810 ◽  
Author(s):  
J.M. Jacques ◽  
N. Burbure ◽  
K.S. Jones ◽  
M.E. Law ◽  
L.S. Robertson ◽  
...  
Keyword(s):  
Amorphous Silicon ◽  
Room Temperature ◽  
Solid Phase ◽  
Amorphous Layer ◽  
Boron Diffusion ◽  
Cross Sectional ◽  
Enhanced Diffusion ◽  
Transmission Electron ◽  
Variable Angle Spectroscopic Ellipsometry ◽  
Secondary Ion

ABSTRACTIn prior works, we demonstrated the phenomenon of fluorine-enhanced boron diffusion within self-amorphized silicon. Present studies address the process dependencies of low temperature boron motion within ion implanted materials utilizing a germanium amorphization. Silicon wafers were preamorphized with either 60 keV or 80 keV Ge+ at a dose of 1×1015 atoms/cm2. Subsequent 500 eV, 1×1015 atoms/cm211B+ implants, as well as 6 keV F+ implants with doses ranging from 1×1014 atoms/cm2 to 5×1015 atoms/cm2 were also done. Furnace anneals were conducted at 550°C for 10 minutes under an inert N2 ambient. Secondary Ion Mass Spectroscopy (SIMS) was utilized to characterize the occurrence of boron diffusion within amorphous silicon at room temperature, as well as during the Solid Phase Epitaxial Regrowth (SPER) process. Amorphous layer depths were verified through Cross-Sectional Transmission Electron Microscopy (XTEM) and Variable Angle Spectroscopic Ellipsometry (VASE). Boron motion within as-implanted samples is observed at fluorine concentrations greater than 1×1020 atoms/cm3. The magnitude of the boron motion scales with increasing fluorine dose and concentration. During the initial stages of SPER, boron was observed to diffuse irrespective of the co-implanted fluorine dose. Fluorine enhanced diffusion at room temperature does not appear to follow the same process as the enhanced diffusion observed during the regrowth process.

Ohmic Contact Formation Mechanism in the Ge/Pd/N-GaAs System

1989 ◽  
Vol 148 ◽  
Author(s):  
E.D. Marshall ◽  
S.S. Lau ◽  
C.J. Palmstrøm ◽  
T. Sands ◽  
C.L. Schwartz ◽  
...  
Keyword(s):  
Electron Microscopy ◽  
Mass Spectrometry ◽  
Secondary Ion Mass Spectrometry ◽  
Solid Phase ◽  
Cross Sectional ◽  
Ohmic Behavior ◽  
Transmission Electron ◽  
Solid Phase Regrowth ◽  
Ohmic Contact Formation ◽  
Secondary Ion

ABSTRACTAnnealed Ge/Pd/n-GaAs samples utilizing substrates with superlattice marker layers have been analyzed using high resolution backside secondary ion mass spectrometry and cross-sectional transmission electron microscopy. Interfacial compositional and microstructural changes have been correlated with changes in contact resistivity. The onset of good ohmic behavior is correlated with the decomposition of an intermediate epitaxial Pd4(GaAs,Ge2) phase and solid-phase regrowth of Ge-incorporated GaAs followed by growth of a thin Ge epitaxial layer.

Deposition of Precursor Poly - Silicon Films for Flat Panel Display Applications

1997 ◽  
Vol 471 ◽  
Author(s):  
R. Pethe ◽  
C. Deshpandey ◽  
S. Dixit ◽  
E. Demaray ◽  
D. Meakin ◽  
...  
Keyword(s):  
High Speed ◽  
Flat Panel Displays ◽  
Flat Panel Display ◽  
Large Area ◽  
Flat Panel ◽  
Glass Substrates ◽  
Poly Silicon ◽  
Electronic Circuitry ◽  
Si Films ◽  
Si Wafer

Large grain poly-Silicon (p-Si) films have been evaluated for high speed TFT for flat panel displays [1,2]. It is expected that with good quality p-Si, “System on Glass” products, in which entire electronic circuitry is incorporated directly onto glass are achievable [3]. This approach therefore has the potential to fabricate Integrated AMLCD's (IAMLCD) and bypass conventional Si wafer based products and integrate CMOS circuits with direct view TFT LCD manufacturing. To realize this potential; it is necessary to develop a production process for depositing repeatable, good quality p-Si films on to large area glass substrates.

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