scholarly journals Influence of Flexibility of the Interconnects on the Dynamic Bending Reliability of Flexible Hybrid Electronics

Electronics ◽  
2020 ◽  
Vol 9 (2) ◽  
pp. 238 ◽  
Author(s):  
Nagarajan Palavesam ◽  
Waltraud Hell ◽  
Andreas Drost ◽  
Christof Landesberger ◽  
Christoph Kutter ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
High Performance ◽  
Electronic Systems ◽  
Test Results ◽  
Limited Information ◽  
Silicon Integrated Circuits ◽  
Series Of Experiments ◽  
Dynamic Bending ◽  
Flexible Metal ◽  
Flexible Foils

The growing interest towards thinner and conformable electronic systems has attracted significant attention towards flexible hybrid electronics (FHE). Thin chip-foil packages fabricated by integrating ultra-thin monocrystalline silicon integrated circuits (ICs) on/in flexible foils have the potential to deliver high performance electrical functionalities at very low power requirements while being mechanically flexible. However, only very limited information is available regarding the fatigue or dynamic bending reliability of such chip-foil packages. This paper reports a series of experiments where the influence of the type of metal constituting the interconnects on the foil substrates on their dynamic bending reliability has been analyzed. The test results show that chip-foil packages with interconnects fabricated from a highly flexible metal like gold endure the repeated bending tests better than chip-foil packages with stiffer interconnects fabricated from copper or aluminum. We conclude that further analysis work in this field will lead to new technical concepts and designs for reliable foil based electronics.

A High-Performance Interface ASIC for Quartz Rate Sensor

2011 ◽  
Vol 483 ◽  
pp. 471-474
Author(s):  
Wei Ping Chen ◽  
Qing Yi Wang ◽  
Liang Yin ◽  
Zhi Ping Zhou
Keyword(s):  
Integrated Circuits ◽  
Power Consumption ◽  
High Performance ◽  
Low Noise ◽  
Stable Operation ◽  
Cmos Process ◽  
Test Results ◽  
Bias Stability ◽  
Output Noise ◽  
Rate Sensor

In this work, an ASIC interface for quartz rate sensor (QRS) is introduced. Based on 0.6μm 18V N-well CMOS process, it is the first to be realized in the domestic. This chip has a minimized size of 5×4.4mm2. Compared with traditional interface constructed by separate devices, such interface implemented with integrated circuits is advantageous in size and power consumption. This satisfies the requirements of miniature and low power consumption in space industry and military domain. The test results show that this interface features low noise, high linearity, and stable operation. Integrated with the sensor, the entire system presents high performance in short term bias stability, nonlinearity, output noise, bias variation over temperature, and power consumption.

Numerical Simulation of Stretchable and Foldable Silicon Integrated Circuits

2009 ◽  
Vol 74 ◽  
pp. 197-200
Author(s):  
Zhuang Jian Liu ◽  
Yong Wei Zhang ◽  
Ji Zhou Song ◽  
Dae Hyeong Kim ◽  
Yong Gang Huang ◽  
...  
Keyword(s):  
Thin Film ◽  
Numerical Simulation ◽  
Integrated Circuits ◽  
High Performance ◽  
Large Strain ◽  
Simulation Studies ◽  
Linear Elastic ◽  
Silicon Integrated Circuits ◽  
Elastic Responses ◽  
Principal Strains

This paper presents numerical simulation strategies for stretchable silicon integrated circuits that use stiff thin film on elastomeric substrates. Detailed numerical simulation studies reveal the key underlying aspects of these systems. The results indicate, as an example, optimized mechanics and materials for circuits that exhibit maximum principal strains less than 0.2% even for applied strains of up to ~90%. Simple circuits, including CMOS inverters provide an example that validates these designs. The results suggest practical routes to high performance electronics with linear elastic responses to large strain deformations, suitable for diverse applications that are not readily addressed with conventional wafer-based technologies.

Overview of High Performance Packaging Materials

1990 ◽  
Vol 203 ◽  
Author(s):  
Barry C. Johnson
Keyword(s):  
Integrated Circuits ◽  
High Performance ◽  
Building Blocks ◽  
Electrical Performance ◽  
Electronic Systems ◽  
Circuit Performance ◽  
Signal Velocity ◽  
Semiconductor Chip ◽  
Thermal Cooling ◽  
The Impact

ABSTRACTHigh Performance Integrated Circuits form the basic building blocks of modern electronic systems that are designed to process ever larger numbers of electrical signals at greater signal velocity and fidelity. In such applications, each circuit must be packaged in order to provide it with necessary mechanical support, environmental protection, electrical interconnection and thermal cooling. The package, however, can also impose certain constraints on the chip. It can degrade electrical performance, add size and weight, introduce reliability problems and increase cost. Thus, packaging can be viewed as a complex balance between the provision of desired functions and the reduction of associated constraints.The ability to strike a proper balance has become increasingly difficult in recent years due to the relentless march of integrated circuits toward higher levels of complexity, size, speed, heat flux and customization. It is anticipated that the continuing evolution of high performance circuits and systems will soon be limited by the package designs and materials-of-construction, rather than by the devices on the semiconductor chip.The intent of this talk is to provide a brief overview of high performance packaging and the related materials issues. The approach is to (a) present the forecasted trends in relevant circuit performance characteristics, (b) discuss the impact of these characteristics on current chip and board level packaging methods, and (c) present new package and materials concepts that might furnish potential solutions to the developing circuit-package performance gap.

3-D Integration Technology for High Performance Detector Arrays

2006 ◽  
Vol 970 ◽  
Author(s):  
Dorota Temple ◽  
Christopher A. Bower ◽  
Dean Malta ◽  
James E. Robinson ◽  
Phillip R. Coffman ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Focal Plane ◽  
High Performance ◽  
Three Dimensional ◽  
Focal Plane Arrays ◽  
Detector Arrays ◽  
Silicon Integrated Circuits ◽  
Military Systems ◽  
On Chip ◽  
Chip Signal

ABSTRACTThis paper describes a technology for three-dimensional (3-D) integration of multiple layers of silicon integrated circuits. The technology promises to dramatically enhance on-chip signal processing capabilities of a variety of detector devices hybridized with Si electronics. The focus of the paper is on high performance infrared focal plane arrays based on HgCdTe, which offer the ultimate in infrared sensitivity and find application in high performance military systems. Performance data from test FPA devices with integrated multilayer Si stacks are discussed in this paper.

The Structure and Properties of MoSi2 Thin Film in Mos Process

1980 ◽  
Vol 38 ◽  
pp. 326-327
Author(s):  
C.K. Wu ◽  
P. Chang ◽  
N. Godinho
Keyword(s):  
Thin Film ◽  
Integrated Circuits ◽  
High Performance ◽  
Large Scale ◽  
Process Development ◽  
Structure And Properties ◽  
Metal Silicides ◽  
High Oxidation ◽  
Important Approach ◽  
High Oxidation Resistance

Recently, the use of refractory metal silicides as low resistivity, high temperature and high oxidation resistance gate materials in large scale integrated circuits (LSI) has become an important approach in advanced MOS process development (1). This research is a systematic study on the structure and properties of molybdenum silicide thin film and its applicability to high performance LSI fabrication.

Confirming the Signal Integrity in Transmission of Digital Signals on Microstrip Straight Circuits via the Eye Diagrams

2014 ◽  
Vol 5 (1) ◽  
pp. 737-741
Author(s):  
Alejandro Dueñas Jiménez ◽  
Francisco Jiménez Hernández
Keyword(s):  
Integrated Circuits ◽  
Printed Circuit Board ◽  
Signal Integrity ◽  
High Volume ◽  
Information Storage ◽  
Circuit Board ◽  
Electromagnetic Simulation ◽  
Electronic Systems ◽  
Digital Signals ◽  
Printed Circuit

Because of the high volume of processing, transmission, and information storage, electronic systems presently requires faster clock speeds tosynchronizethe integrated circuits. Presently the “speeds” on the connections of a printed circuit board (PCB) are in the order of the GHz. At these frequencies the behavior of the interconnects are more like that of a transmission line, and hence distortion, delay, and phase shift- effects caused by phenomena like cross talk, ringing and over shot are present and may be undesirable for the performance of a circuit or system.Some of these phrases were extracted from the chapter eight of book “2-D Electromagnetic Simulation of Passive Microstrip Circuits” from the corresponding author of this paper.

Electrical Invasiveness of Grinding and Polishing Silicon Integrated Circuits Down to 1 μm Remaining Silicon Thickness

2016 ◽  
Author(s):  
Robert Chivas ◽  
Scott Silverman ◽  
Michael DiBattista ◽  
Ulrike Kindereit
Keyword(s):  
Integrated Circuits ◽  
Failure Analysis ◽  
Electron Hole ◽  
Analysis Techniques ◽  
Silicon Integrated Circuits ◽  
Electron Hole Pair ◽  
Pair Generation ◽  
Silicon Thickness ◽  
Performance Timing ◽  
Grinding And Polishing

Abstract Anticipating the end of life for IR-based failure analysis techniques, a method of global backside preparation to ultra-thin remaining silicon thickness (RST) has been developed. When the remaining silicon is reduced, some redistribution of stress is expected, possibly altering the performance (timing) of integrated circuits in addition to electron-hole pair generation. In this work, a study of the electrical invasiveness due to grinding and polishing silicon integrated circuits to ultra-thin (< 5 um global, ~ 1 um local) remaining thickness is presented.

Highly electroconductive and uniform WS2 film growth by sulfurization of W film using diethyl sulfide

2021 ◽  
Author(s):  
Yoobeen Lee ◽  
Jin Won Jung ◽  
Jin Seok Lee
Keyword(s):  
Transition Metal ◽  
Grain Boundaries ◽  
High Performance ◽  
Film Growth ◽  
Transition Metal Dichalcogenides ◽  
Electronic Systems ◽  
Intrinsic Defects ◽  
Diethyl Sulfide ◽  
Metal Dichalcogenides

The reduction of intrinsic defects, including vacancies and grain boundaries, remains one of the greatest challenges to produce high-performance transition metal dichalcogenides (TMDCs) electronic systems. A deeper comprehension of the...

scholarly journals A Brief Overview of On-Chip Voltage Regulation in High-Performance and High-Density Integrated Circuits

IEEE Access ◽  
2021 ◽  
Vol 9 ◽  
pp. 813-826
Author(s):  
Farid Uddin Ahmed ◽  
Zarin Tasnim Sandhie ◽  
Liaquat Ali ◽  
Masud H. Chowdhury
Keyword(s):  
Integrated Circuits ◽  
High Performance ◽  
Voltage Regulation ◽  
High Density ◽  
On Chip
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