ZoneBOND™ Thin Wafer Support Process for Wafer Bonding Applications

2010 ◽  
Vol 2010 (DPC) ◽  
pp. 001080-001094 ◽  
Author(s):  
Jeremy McCutcheon ◽  
Robert Brown ◽  
JoElle Dachsteiner
Keyword(s):  
Integrated Circuits ◽  
Wafer Bonding ◽  
Integrated Circuit ◽  
Room Temperature ◽  
Adhesive Bonding ◽  
Temperature Stability ◽  
Optoelectronic Device ◽  
Mems Devices ◽  
Thermal Compression ◽  
Temporary Bonding

Wafer-to-wafer bonding is widely used to support both the production of integrated circuits and MEMS devices. Bonding may be accomplished in a variety of ways including anodic, thermal compression, and adhesive bonding. The bond may be either permanent or temporary. Permanent wafer bonding is used to combine two materials together that remain together for the life of the device, for example, in the production of Si/GaAs wafer heterostructures for integration of an optoelectronic device into silicon integrated circuit technology. Temporary bonding is used to support the device wafer during certain processing steps, and then removed once the device wafer is completed. Currently, there are several temporary bonding processes being developed in industry. The leading technology utilizes some form of polymeric material to temporarily fasten or bond a rigid backing material, usually silicon or glass, to the device wafer for processing. The main issues associated with these techniques are temperature stability of the adhesive, removal from the support wafer, and cleaning the adhesive from the device wafer. The ideal process would require bonding at an acceptable temperature (usually less than 200°C), surviving through higher temperature processes, followed by debonding at lower temperature or even room temperature. In this paper, an alternative solution is reported that utilizes current thermoplastic adhesives and silicon support wafers coupled with a patented technology, developed by Brewer Science, Inc. Support wafers are bonded to device wafers at acceptable temperatures, mechanical integrity is maintained through semiconductor or MEMs processing, and the completely processed device wafer is then safely debonded from the support wafer at room temperature.

TEM study of phosphorus-implanted pseudomorphic Si0.88Ge0.12 on Si(100)

1995 ◽  
Vol 53 ◽  
pp. 468-469
Author(s):  
N. David Theodore ◽  
Donald Y.C Lie ◽  
J. H. Song ◽  
Peter Crozier
Keyword(s):  
Integrated Circuits ◽  
Heterojunction Bipolar Transistors ◽  
Integrated Circuit ◽  
High Speed ◽  
Room Temperature ◽  
Strain Relaxation ◽  
Bipolar Transistors ◽  
Sige Hbt ◽  
Integrated Circuit Manufacturing ◽  
Microstructural Behavior

SiGe is being extensively investigated for use in heterojunction bipolar-transistors (HBT) and high-speed integrated circuits. The material offers adjustable bandgaps, improved carrier mobilities over Si homostructures, and compatibility with Si-based integrated-circuit manufacturing. SiGe HBT performance can be improved by increasing the base-doping or by widening the base link-region by ion implantation. A problem that arises however is that implantation can enhance strain-relaxation of SiGe/Si.Furthermore, once misfit or threading dislocations result, the defects can give rise to recombination-generation in depletion regions of semiconductor devices. It is of relevance therefore to study the damage and anneal behavior of implanted SiGe layers. The present study investigates the microstructural behavior of phosphorus implanted pseudomorphic metastable Si0.88Ge0.12 films on silicon, exposed to various anneals.Metastable pseudomorphic Si0.88Ge0.12 films were grown ~265 nm thick on a silicon wafer by molecular-beam epitaxy. Pieces of this wafer were then implanted at room temperature with 100 keV phosphorus ions to a dose of 1.5×1015 cm-2.

Anodic Bonding of Silicon-Pyrex and Silicon-Soda Lime Glass at Room Temperature

2014 ◽  
Vol 1082 ◽  
pp. 420-423
Author(s):  
Muhammad Hafiz Ab Aziz ◽  
Zaliman Sauli ◽  
Vithyacharan Retnasamy ◽  
Hussin Kamarudin ◽  
Wan Mokhdzani Wan Norhaimi ◽  
...  
Keyword(s):  
Bond Strength ◽  
Wafer Bonding ◽  
Room Temperature ◽  
Bonding Temperature ◽  
Soda Lime ◽  
Anodic Bonding ◽  
Soda Lime Glass ◽  
Cleaning Process ◽  
Mems Devices ◽  
Before And After

Silicon wafer bonding opens possibilities in creating MEMS devices and anodic bonding is found to be the most relevant wafer bonding technique process in constructing and packaging MEMS. This paper reports on the bond strength comparison between silicon and different glass based materials via anodic bonding. Two types of glass based surface used pyrex and soda lime glass. Bonding temperature is set at room temperature while a high direct current voltage of 15kV. Experiments were carried out using an in-house designed anodic bonder and the bond strength were measured using a bond strength tester. The anodic approach process was done in two sets which are before and after the cleaning process for each sample. Results show that all samples showed higher bond strength after the cleaning process. Silicon-soda lime glass have higher bonding strength of 1950 Pa compared to silicon-pyrex bonding which only gives 1850 Pa of bond strength.

Washable Coatings for Packaging Processes

2016 ◽  
Vol 2016 (1) ◽  
pp. 000094-000099
Author(s):  
Alex Brewer ◽  
Alex Laymon ◽  
John Moore
Keyword(s):  
Polyvinyl Alcohol ◽  
Thermal Resistance ◽  
Room Temperature ◽  
Solder Bump ◽  
Dielectric Coating ◽  
Cross Linking ◽  
Thermal Compression ◽  
Temporary Bonding ◽  
Heat Activation ◽  
Industry Needs

Abstract Many packaging processes require the protection of components while another application is conducted. This may include a planarizing coat over large topography while a deposition, bonding, or curing step is completed. Washable coatings are materials that protect the substrate during thermal or mechanical activities and are simply washed away using readily available and green products, such as water or detergent. Washable products are not new, an example includes laser washable coatings that remove debris from the heat activation zone (HAZ) during scribe and break processes. In such cases, thermal resistance is desired as high as possible. The chemistry of washable products includes polyvinyl alcohol (PVA) and polyvinylpyrrolidone (PVP) [1]. While these are excellent choices for consumer packaging (e.g. laundry packets, vitamins), they are best used in electronics for room temperature processing due to their cross-linking upon exposure to heat and metals. Alternatively, thermal resistant and washable products (e.g. DaeCoat™ 515) are available that provide protection to ≥300°C without the aid of mechanical tooling [2]. Planarizing coatings over metals can be thick (>300μm) as in cases where solder bump encapsulation is needed during dielectric coating and cure or when another die is thermal compression bonded. This approach has been demonstrated with washable temporary bonding adhesives in protecting C4 bumps while bonding micro-bumped die onto FPGA interposers [3]. Washable adhesives have been created for thermal and vacuum driven processing as EMI/RFI shielding in a PVD tool. Such coatings are applied to porous substrates, affixing die, processing, and removal by water washing [4]. Success in these and related temporary applications depend upon matching the chemistry of the washable coating with the process. Our experience in creating solutions for these and other industry needs will be discussed as well as the criteria for using temporary washable coatings.

ZoneBOND Thin Wafer Support Process for Wafer Bonding Applications

2010 ◽  
Vol 7 (3) ◽  
pp. 138-142 ◽  
Author(s):  
Jeremy McCutcheon ◽  
Robert Brown ◽  
JoElle Dachsteiner
Keyword(s):  
Wafer Bonding ◽  
Room Temperature ◽  
Bonding Process ◽  
Temporary Bonding ◽  
Higher Temperature

The ZoneBOND process has been developed as an alternative temporary bonding process that bonds at an acceptable temperature (usually less than 200°C), survives through higher-temperature processes, and then debonds at room temperature. The technology utilizes standard silicon or glass carriers and current thermoplastic adhesives developed by Brewer Science, Inc.

Scanning Electron Microscopy in Hybrid Microelectronics

1976 ◽  
Vol 34 ◽  
pp. 456-457
Author(s):  
S. Khadpe ◽  
R. Faryniak
Keyword(s):  
Integrated Circuits ◽  
Thick Film ◽  
Integrated Circuit ◽  
Failure Modes ◽  
Three Dimensional ◽  
Circuit Components ◽  
Hybrid Microcircuit ◽  
Electrical Connections ◽  
Scanning Electron

The Scanning Electron Microscope (SEM) is an important tool in Thick Film Hybrid Microcircuits Manufacturing because of its large depth of focus and three dimensional capability. This paper discusses some of the important areas in which the SEM is used to monitor process control and component failure modes during the various stages of manufacture of a typical hybrid microcircuit.Figure 1 shows a thick film hybrid microcircuit used in a Motorola Paging Receiver. The circuit consists of thick film resistors and conductors screened and fired on a ceramic (aluminum oxide) substrate. Two integrated circuit dice are bonded to the conductors by means of conductive epoxy and electrical connections from each integrated circuit to the substrate are made by ultrasonically bonding 1 mil aluminum wires from the die pads to appropriate conductor pads on the substrate. In addition to the integrated circuits and the resistors, the circuit includes seven chip capacitors soldered onto the substrate. Some of the important considerations involved in the selection and reliability aspects of the hybrid circuit components are: (a) the quality of the substrate; (b) the surface structure of the thick film conductors; (c) the metallization characteristics of the integrated circuit; and (d) the quality of the wire bond interconnections.

Micromechanics Measurements Applied to Integrated Circuit Microelectronics

1997 ◽  
Vol 473 ◽  
Author(s):  
David R. Clarke
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Fracture Resistance ◽  
Interface Fracture ◽  
New Techniques ◽  
Fracture Properties ◽  
Engineered Structures ◽  
Mechanical And Fracture Properties ◽  
Interconnect Lines ◽  
Metallic Interconnect

ABSTRACTAs in other engineered structures, fracture occasionally occurs in integrated microelectronic circuits. Fracture can take a number of forms including voiding of metallic interconnect lines, decohesion of interfaces, and stress-induced microcracking of thin films. The characteristic feature that distinguishes such fracture phenomena from similar behaviors in other engineered structures is the length scales involved, typically micron and sub-micron. This length scale necessitates new techniques for measuring mechanical and fracture properties. In this work, we describe non-contact optical techniques for probing strains and a microscopic “decohesion” test for measuring interface fracture resistance in integrated circuits.

Nanofabricated SiO2-Si-SiO2 Resonant Tunneling Diodes

2000 ◽  
Vol 631 ◽  
Author(s):  
J. G. Fleming ◽  
E. Chow ◽  
S.-Y. Lin
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Resonant Tunneling ◽  
Resonant Tunneling Diodes ◽  
Resonance Tunneling ◽  
Tunneling Diodes

ABSTRACTResonance Tunneling Diodes (RTDs) are devices that can demonstrate very highspeed operation. Typically they have been fabricated using epitaxial techniques and materials not consistent with standard commercial integrated circuits. We report here the first demonstration of SiO2-Si-SiO2 RTDs. These new structures were fabricated using novel combinations of silicon integrated circuit processes.

The Radio Probe™: A New Measurement Tool for High Speed Integrated Circuits

2005 ◽  
Author(s):  
Mark Kimball
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
High Speed ◽  
Attenuation Factor ◽  
Cost Effective ◽  
Frequency Measurement ◽  
Single Frequency ◽  
Measurement Tool ◽  
Probe Design ◽  
Differential Measurement

Abstract This article presents a novel tool designed to allow circuit node measurements in a radio frequency (RF) integrated circuit. The discussion covers RF circuit problems; provides details on the Radio Probe design, which achieves an input impedance of 50Kohms and an overall attenuation factor of 0 dB; and describes signal to noise issues in the output signal, along with their improvement techniques. This cost-effective solution incorporates features that make it well suited to the task of differential measurement of circuit nodes within an RF IC. The Radio Probe concept offers a number of advantages compared to active probes. It is a single frequency measurement tool, so it complements, rather than replaces, active probes.

A Technique for Reliably Preparing Full-Length Metallographic Cross-Sections of Integrated Circuit Bond Wires

2006 ◽  
Author(s):  
Carl Nail
Keyword(s):  
Integrated Circuits ◽  
High Precision ◽  
Cross Sections ◽  
Integrated Circuit ◽  
Radiographic Analysis ◽  
Good Resolution ◽  
Metallographic Preparation ◽  
Bond Wires ◽  
Darkfield Imaging ◽  
Bond Wire

Abstract To overcome the obstacles in preparing high-precision cross-sections of 'blind' bond wires in integrated circuits, this article proposes a different technique that generates reliable, repeatable cross-sections of bond wires across most or all of their lengths, allowing unencumbered and relatively artifact-free analysis of a given bond wire. The basic method for cross-sectioning a 'blind' bond wire involves radiographic analysis of the sample and metallographic preparation of the sample to the plane of interest. This is followed by tracking the exact location of the plane on the original radiograph using a stereomicroscope and finally darkfield imaging in which the wire is clearly visible with good resolution.

Emerging Techniques for the Characterization of Nano-Mechanical Properties of Integrated Circuit Components

2008 ◽  
Author(s):  
Nicholas Randall ◽  
Rahul Premachandran Nair
Keyword(s):  
Mechanical Properties ◽  
Quality Control ◽  
Integrated Circuits ◽  
Integrated Circuit ◽  
Manufacturing Process ◽  
Solder Bumps ◽  
Initial Work ◽  
Circuit Components ◽  
Materials Used

Abstract With the growing complexity of integrated circuits (IC) comes the issue of quality control during the manufacturing process. In order to avoid late realization of design flaws which could be very expensive, the characterization of the mechanical properties of the IC components needs to be carried out in a more efficient and standardized manner. The effects of changes in the manufacturing process and materials used on the functioning and reliability of the final device also need to be addressed. Initial work on accurately determining several key mechanical properties of bonding pads, solder bumps and coatings using a combination of different methods and equipment has been summarized.

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