scholarly journals Design and Implementation of Efficient MOSFET’s Utilization Based Proposed Voltage Controlled Oscillator

2021 ◽  
Vol 2089 (1) ◽  
pp. 012073
Author(s):  
B S Priyanka Kumari ◽  
Sobhit Saxena

Abstract Ring oscillator is a device which consists of NOT gates connected in the form of ring. This ring oscillator’s output oscillates between the true and false stages controlled by applied voltage. Now days this voltage controlled oscillator (VCO) becomes the heart of modern electronic devices and communication systems. Earlier five-stage complementary metal oxide semiconductor (CMOS) based VCO for the Phase Locked Loop (PLL) was implemented. High frequency oscillations are required for many applications and further it is observed that a very general technique is normally adopted by researchers to achieve high frequency that if number of transistors is increased then the frequency can be increased. But the consequences of increase in number of transistors are the increase in delay and more number of MOSFET occupies more area and more power dissipation. So, in this paper VCO is designed with efficient utilization of MOSFETs. There is a balance between frequency and number of transistors, so that the area and power dissipation can be reduced. From the obtained results it can observed that the number of MOSFET’s, Independent Nodes, boundary nodes total nodes and power are reduced compared to five stage VCO and VCO based Ring oscillator.

Author(s):  
Prakash Sharma

Abstract: This paper presents a relative study among two Ring oscillators architecture (CMOS, NMOS) and current-starved Voltage-controlled oscillator (CS-VCO) on the basis of different parameters like power dissipation ,phase noise etc. All the design has been done in 45- nm CMOS technology node and 2.3 GHz Centre frequency have been taken for the comparison because of their applications in AV Devices and Radio control. An inherent idea of the given performance parameters has been realize by thecomparative study. The comparative data shows that NMOS based Ring oscillator is good option in terms of the phase noise performance. In this study NMOS Ring Oscillator have attain a phase noise -97.94 dBc/Hz at 1 MHz offset frequency from 2.3 GHz center frequency. The related data also shows that CMOS Ring oscillator is the best option in terms of power consumption. In this work CMOS Ring oscillator evacuatea power of 1.73 mW which is quite low. Keywords: Voltage controlled oscillator (VCO), phase noise, power consumption, Complementary metal-oxide-semiconductor (CMOS), Current Starved Voltage-Controlled Oscillator (CS- VCO), Pull up network (PUN), Pull down network (PDN)


Sensors ◽  
2018 ◽  
Vol 18 (10) ◽  
pp. 3346 ◽  
Author(s):  
Joni Kilpijärvi ◽  
Niina Halonen ◽  
Maciej Sobocinski ◽  
Antti Hassinen ◽  
Bathiya Senevirathna ◽  
...  

A complementary metal-oxide-semiconductor (CMOS) chip biosensor was developed for cell viability monitoring based on an array of capacitance sensors utilizing a ring oscillator. The chip was packaged in a low temperature co-fired ceramic (LTCC) module with a flip chip bonding technique. A microcontroller operates the chip, while the whole measurement system was controlled by PC. The developed biosensor was applied for measurement of the proliferation stage of adherent cells where the sensor response depends on the ratio between healthy, viable and multiplying cells, which adhere onto the chip surface, and necrotic or apoptotic cells, which detach from the chip surface. This change in cellular adhesion caused a change in the effective permittivity in the vicinity of the sensor element, which was sensed as a change in oscillation frequency of the ring oscillator. The sensor was tested with human lung epithelial cells (BEAS-2B) during cell addition, proliferation and migration, and finally detachment induced by trypsin protease treatment. The difference in sensor response with and without cells was measured as a frequency shift in the scale of 1.1 MHz from the base frequency of 57.2 MHz. Moreover, the number of cells in the sensor vicinity was directly proportional to the frequency shift.


2021 ◽  
Author(s):  
Keith Powell ◽  
Liwei Li ◽  
Amirhassan Shams-Ansari ◽  
Jianfu Wang ◽  
Debin Meng ◽  
...  

Abstract The electro-optic modulator encodes electrical signals onto an optical carrier, and is essential for the operation of global communication systems and data centers that society demands. An ideal modulator results from scalable semiconductor fabrication and is integrable with electronics. Accordingly, it is compatible with complementary metal-oxide-semiconductor (CMOS) fabrication processes. Moreover, modulators using the Pockels effect enables low loss, ultrafast, and wide-bandwidth data transmission. Although strained silicon-based modulators could satisfy these criteria, fundamental limitations such as two-photon absorption, poor thermal stability and a narrow transparency window hinder their performance. On the other hand, as a wide bandgap semiconductor material, silicon carbide is CMOS compatible and does not suffer from these limitations. Due to its combination of color centers, high breakdown voltage, and strong thermal conductivity, silicon carbide is a promising material for CMOS electronics and photonics with applications ranging from sensors to quantum and nonlinear photonics. Importantly, silicon carbide exhibits the Pockels effect, but a modulator has not been realized since the discovery of this effect more than three decades ago. Here we design, fabricate, and demonstrate the first Pockels modulator in silicon carbide. Specifically, we realize a waveguide-integrated, small form-factor, gigahertz-bandwidth modulator that can operate using CMOS-level drive voltages on a thin film of silicon carbide on insulator. Furthermore, the device features no signal degradation and stable operation at high optical intensities (913 kW/mm2), allowing for high optical signal-to-noise ratios for long distance communications. Our work unites Pockels electro-optics with a CMOS platform to pave the way for foundry-compatible integrated photonics.


Circuit World ◽  
2021 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Ali Majeed ◽  
Esam Alkaldy

Purpose This study aims to replace current multi-layer and coplanar wire crossing methods in QCA technology to avoid fabrication difficulties caused by them. Design/methodology/approach Quantum-dot cellular automata (QCA) is one of the newly emerging nanoelectronics technology tools that is proposed as a good replacement for complementary metal oxide semiconductor (CMOS) technology. This technology has many challenges, among them being component interconnection and signal routing. This paper will propose a new wire crossing method to enhance layout use in a single layer. The presented method depends on the central cell clock phase to enable two signals to cross over without interference. QCADesigner software is used to simulate a full adder circuit designed with the proposed wire crossing method to be used as a benchmark for further analysis of the presented wire crossing approach. QCAPro software is used for power dissipation analysis of the proposed adder. Findings A new cost function is presented in this paper to draw attention to the fabrication difficulties of the technology when designing QCA circuits. This function is applied to the selected benchmark circuit, and the results show good performance of the proposed method compared to others. The improvement is around 59, 33 and 75% compared to the best reported multi-layer wire crossing, coplanar wire crossing and logical crossing, respectively. The power dissipation analysis shows that the proposed method does not cause any extra power consumption in the circuit. Originality/value In this paper, a new approach is developed to bypass the wire crossing problem in the QCA technique.


Micromachines ◽  
2020 ◽  
Vol 11 (1) ◽  
pp. 65
Author(s):  
Wenhao Zhi ◽  
Qingxiao Quan ◽  
Pingping Yu ◽  
Yanfeng Jiang

Photodiode is one of the key components in optoelectronic technology, which is used to convert optical signal into electrical ones in modern communication systems. In this paper, an avalanche photodiode (APD) is designed and fulfilled, which is compatible with Taiwan Semiconductor Manufacturing Company (TSMC) 45-nm standard complementary metal–oxide–semiconductor (CMOS) technology without any process modification. The APD based on 45 nm process is beneficial to realize a smaller and more complex monolithically integrated optoelectronic chip. The fabricated CMOS APD operates at 850 nm wavelength optical communication. Its bandwidth can be as high as 8.4 GHz with 0.56 A/W responsivity at reverse bias of 20.8 V. Its active area is designed to be 20 × 20 μm2. The Simulation Program with Integrated Circuit Emphasis (SPICE) model of the APD is also proposed and verified. The key parameters are extracted based on its electrical, optical and frequency responses by parameter fitting. The device has wide potential application for optical communication systems.


2018 ◽  
Vol 7 (3.12) ◽  
pp. 871
Author(s):  
Thejusraj. H ◽  
Prithivi Raj ◽  
J Selvakumar ◽  
S Praveen Kumar

This paper presents the analysis of various oscillators that generate high frequency of oscillation for high speed communication, clock generation and clock recovery. The Ring oscillator and the Current Starved Voltage Controlled Oscillator(CSVCO) (for 5-stagewithout resistor and with resistor) have been implemented using the Cadence Virtuoso tool in 90 nm technology. The generated frequency of oscillation and the power consumption values of the voltage controlled oscillators have been calculated after inclusion in the PLL, and were also compared to identify the most suitable voltage controlled oscillator for a given application.


Electronics ◽  
2019 ◽  
Vol 8 (5) ◽  
pp. 558 ◽  
Author(s):  
Bjorn Van Bockel ◽  
Jeffrey Prinzie ◽  
Paul Leroux

This article presents a radiation tolerant single-shot time-to-digital converter (TDC) with a resolution of 15.6 ps, fabricated in a 65 nm complementary metal oxide semiconductor (CMOS) technology. The TDC is based on a multipath pseudo differential ring oscillator with reduced phase delay, without the need for calibration or interpolation. The ring oscillator is placed inside a Phase Locked Loop (PLL) to compensate for Process, Voltage and Temperature (PVT) variations- and variations due to ionizing radiation. Measurements to evaluate the performance of the TDC in terms of the total ionizing dose (TID) were done. Two different samples were irradiated up to a dose of 2.2 MGy SiO 2 while still maintaining a resolution of 15.6 ps. The TDC has a differential non-linearity (DNL) and integral non-linearity (INL) of 0.22 LSB rms and 0.34 LSB rms respectively.


2020 ◽  
Vol 18 (3) ◽  
pp. 210-215
Author(s):  
Shubham Tayal ◽  
Sunil Jadav

Power dissipation and delay are the challenging issues in the design of VLSI circuits. This manuscript explores joint effect of Self-Bias transistors (SBTs) and Optimum Bulk Bias Technique (OBBT) on CMOS circuits. Earlier investigations on SBTs shows decrease in power dissipation of combinational as well as sequential circuits. We extend the analysis by studying the effect of OBBT on the static and dynamic power of CMOS circuits with SBTs coupled amid the pull-up/down network and the supply bars. Extensive SPICE simulations have been carried out in 0.18 μm technology. Results demonstrate that, a 73% drop in power in case of combinational circuits and 43% in case of sequential circuits can be accomplished by engaging OBBT in digital circuits. Trade-off between power and delay is also been presented.


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