BENCHMARK RESULTS FOR HIGH-SPEED 4-BIT ACCUMULATORS IMPLEMENTED IN INDIUM PHOSPHIDE DHBT TECHNOLOGY
2004 ◽
Vol 14
(03)
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pp. 646-651
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Keyword(s):
High-speed accumulators are frequently used as a benchmark of the high-speed performance and ability to yield large scale circuits in InP double hetereojunction bipolar (DHBT) processes. In previous work, we reported test results of an InP DHBT 4-bit accumulator with 624 transistors operating at 41 GHz clock frequency with a power consumption of 4.1W. In this work, we report on modifications that allow the circuit to operate at a lower supply voltage and a corresponding lower power consumption. Simulation results for this modification indicate that a 16% power reduction can be obtained, while maintaining a high-speed operating frequency of 40 GHz.
2015 ◽
Vol 19
◽
pp. 19-36
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Keyword(s):
Keyword(s):
2002 ◽
Vol 11
(01)
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pp. 51-55
Keyword(s):
2017 ◽
Vol 5
(1)
◽
pp. 16
Keyword(s):
2015 ◽
Vol 98
(10)
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pp. 57-66
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Keyword(s):
2015 ◽
Vol 24
(04)
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pp. 1550048
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Keyword(s):
2015 ◽
pp. 239-244
Keyword(s):
2019 ◽
Vol 28
(10)
◽
pp. 1950165
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