Normally-off GaN MOSFETs on Silicon Substrates with High-temperature Operation

2009 ◽  
Vol 1202 ◽  
Author(s):  
Hiroshi Kambayashi ◽  
Yuki Niiyama ◽  
Takehiko Nomura ◽  
Masayuki Iwami ◽  
yoshihiro Satoh ◽  
...  

AbstractWe have demonstrated enhancement-mode n-channel gallium nitride (GaN) MOSFETs on Si (111) substrates with high-temperature operation up to 300 °C. The GaN MOSFETs have good normally-off operation with the threshold voltages of +2.7 V. The MOSFET exhibits good output characteristics from room temperature to 300 °C. The leakage current at 300°C is less than 100 pA/mm at the drain-to-source voltage of 0.1 V. The on-state resistance of MOSFET at 300°C is about 1.5 times as high as that at room temperature. These results indicate that GaN MOSFET is suitable for high-temperature operation compared with AlGaN/GaN HFET.

2009 ◽  
Vol 615-617 ◽  
pp. 715-718 ◽  
Author(s):  
Andrew Ritenour ◽  
Volodymyr Bondarenko ◽  
Robin L. Kelley ◽  
David C. Sheridan

Prototype 800 V, 47 A enhancement-mode SiC VJFETs have been developed for high temperature operation (250 °C). With an active area of 23 mm2 and target threshold voltage of +1.25 V, these devices exhibited a 28 m room temperature on-resistance and excellent blocking characteristics at elevated temperature. With improved device packaging, on-resistance and saturation current values of 15 m and 100 A, respectively, are achievable.


2006 ◽  
Vol 53 (12) ◽  
pp. 2908-2913 ◽  
Author(s):  
Takehiko Nomura ◽  
Hiroshi Kambayashi ◽  
Mitsuru Masuda ◽  
Sonomi Ishii ◽  
Nariaki Ikeda ◽  
...  

2014 ◽  
Vol 778-780 ◽  
pp. 903-906 ◽  
Author(s):  
Kevin Matocha ◽  
Kiran Chatty ◽  
Sujit Banerjee ◽  
Larry B. Rowland

We report a 1700V, 5.5mΩ-cm24H-SiC DMOSFET capable of 225°C operation. The specific on-resistance of the DMOSFET designed for 1200V applications is 8.8mΩ-cm2at 225°C, an increase of only 60% compared to the room temperature value. The low specific on-resistance at high temperatures enables a smaller die size for high temperature operation. Under a negative gate bias temperature stress (BTS) at VGS=-15 V at 225°C for 20 minutes, the devices show a threshold voltage shift of ΔVTH=-0.25 V demonstrating one of the key device reliability requirements for high temperature operation.


Science ◽  
2018 ◽  
Vol 362 (6419) ◽  
pp. 1131-1134 ◽  
Author(s):  
Aristide Gumyusenge ◽  
Dung T. Tran ◽  
Xuyi Luo ◽  
Gregory M. Pitch ◽  
Yan Zhao ◽  
...  

Although high-temperature operation (i.e., beyond 150°C) is of great interest for many electronics applications, achieving stable carrier mobilities for organic semiconductors at elevated temperatures is fundamentally challenging. We report a general strategy to make thermally stable high-temperature semiconducting polymer blends, composed of interpenetrating semicrystalline conjugated polymers and high glass-transition temperature insulating matrices. When properly engineered, such polymer blends display a temperature-insensitive charge transport behavior with hole mobility exceeding 2.0 cm2/V·s across a wide temperature range from room temperature up to 220°C in thin-film transistors.


2008 ◽  
Vol 600-603 ◽  
pp. 1063-1066 ◽  
Author(s):  
Konstantin Vassilevski ◽  
Keith P. Hilton ◽  
Nicolas G. Wright ◽  
Michael J. Uren ◽  
A.G. Munday ◽  
...  

Trenched and implanted vertical JFETs (TI-VJFETs) with blocking voltages of 700 V were fabricated on commercial 4H-SiC epitaxial wafers. Vertical p+-n junctions were formed by aluminium implantation in sidewalls of strip-like mesa structures. Normally-on 4H-SiC TI-VJFETs had specific on-state resistance (RO-S ) of 8 mW×cm2 measured at room temperature. These devices operated reversibly at a current density of 100 A/cm2 whilst placed on a hot stage at temperature of 500 °C and without any protective atmosphere. The change of RO-S with temperature rising from 20 to 500 °C followed a power law (~ T 2.4) which is close to the temperature dependence of electron mobility in 4H-SiC.


2012 ◽  
Vol 717-720 ◽  
pp. 1261-1264 ◽  
Author(s):  
Amita Patil ◽  
Naresh Rao ◽  
Vinayak Tilak

This paper pertains to development of high temperature capable digital integrated circuits in n-channel, enhancement-mode Silicon Carbide (SiC) MOS technology. Among the circuits developed in this work are data latch, flip flops, 4-bit shift register and ripple counter. All circuits are functional from room temperature up to 300C without any notable degradation in performance at elevated temperature. The 4-bit counter demonstrated stable behavior for over 500 hours of continuous operation at 300C.


2009 ◽  
Vol 1202 ◽  
Author(s):  
Donat J. As ◽  
Elena Tschumak ◽  
Florentina Niebelschüetz ◽  
W. Jatal ◽  
Joerg Pezoldt ◽  
...  

AbstractNon-polar cubic AlGaN/GaN HFETs were grown by plasma assisted MBE on 3C-SiC substrates. Both normally-on and normally-off HFETs were fabricated using contact lithography. Our devices have a gate length of 2 μm, a gate width of 25 μm, and source-to-drain spacing of 8 μm. For the source and drain contacts the Al0.36Ga0.64N top layer was removed by reactive ion etching (RIE) with SiCl4 and Ti/Al/Ni/Au ohmic contacts were thermally evaporated. The gate metal was Pd/Ni/Au. At room temperature the DC-characteristics clearly demonstrate enhancement and depletion mode operation with threshold voltages of +0.7 V and −8.0 V, respectively. A transconductance of about 5 mS/mm was measured at a drain source voltage of 10 V for our cubic AlGaN/GaN HFETs, which is comparable to that observed in non-polar a-plane devices. From capacity voltage measurements a 2D carrier concentration of about 7×1012 cm-2 is estimated. The influence of source and drain contact resistance, leakage current through the gate contact and parallel conductivity in the underlaying GaN buffer are discussed.


2005 ◽  
Vol 871 ◽  
Author(s):  
Tsuyoshi Sekitani ◽  
Shingo Iba ◽  
Yusaku Kato ◽  
Yoshiaki Noguchi ◽  
Takao Someya ◽  
...  

AbstractWe have fabricated pentacene field-effect transistors (FETs) on polyimide-sheet films with polyimide gate dielectric layers and parylene encapsulation layer, and investigated the high-temperature performance. It is found that the mobility of encapsulated FETs is enhanced from 0.5 to 0.8 cm2/Vs when the device is heated from room temperature to 160°C under light-shielding nitrogen environment. Furthermore, after the removal of annealing temperatures up to 160°C, the transistor characteristic of mobility and on/off current ratio show no significant changes, demonstration the excellent thermal stability of the present organic FETs.


2011 ◽  
Vol 2011 (HITEN) ◽  
pp. 000098-000103
Author(s):  
R. Schrader ◽  
K. Speer ◽  
J. Casady ◽  
V. Bondarenko ◽  
D. Sheridan

The high-temperature static and dynamic characteristics of the new 1200 V, 45 mΩ, 9 mm2 depletion-mode SiC vertical trench junction field-effect transistor (vtJFET) are compared with those of a 1200 V, 50 mΩ, 9 mm2 enhancement-mode SiC vtJFET. It is shown that both devices are fully capable of high-temperature operation and that each type has its own unique advantages. For applications operating in extreme high-temperature environments, the larger saturation current (~2.5x) and lower on-state resistance (~150 mΩ at 250 °C) of the depletion-mode SiC vtJFET provide very attractive performance at temperatures beyond silicon's fundamental limitations. In addition, operating the normally-on vtJFET at VGS less than 2 V reduces the gate drive's current requirements to a negligible level, which is an important design factor for high-temperature power modules that use multiple die in parallel.


Sign in / Sign up

Export Citation Format

Share Document