Tunable CMOS Active Inductor Using Widlar Current Source

2018 ◽  
Vol 28 (02) ◽  
pp. 1950027 ◽  
Author(s):  
Dhara P Patel ◽  
Shruti Oza-Rahurkar
Keyword(s):  
Quality Factor ◽  
Supply Voltage ◽  
Noise Analysis ◽  
Current Source ◽  
Cmos Technology ◽  
The Other ◽  
Active Inductor ◽  
Voltage Sensitivity ◽  
Current Mirror ◽  
Characterization Factors

A novel tuning principle for simple gyrator-based CMOS active inductor (AI) circuit is presented. The method makes use of Widlar current source to enhance the quality factor. The simulation of the proposed AI provides a maximum quality factor of 1819 at 2.88[Formula: see text]GHz. The AI shows the inductive bandwidth of 1.66[Formula: see text]GHz to 3.16[Formula: see text]GHz and power consumption of 6.87[Formula: see text]mW. The other characterization factors such as linearity, supply voltage sensitivity and noise analysis are discussed. The performance of the tunable AI using Widlar current source are compared with the same using a simple current mirror. An AI using a conventional current mirror (CCM) and Widlar current source have been implemented in the 0.18[Formula: see text][Formula: see text]m CMOS technology.

Nano Power Current Reference Circuit consisting of Sub-threshold CMOS Circuits

2017 ◽  
Vol 2 (1) ◽  
pp. 1-4
Author(s):  
Dinesh Kushwaha ◽  
D. K. Mishra
Keyword(s):  
Large Scale ◽  
Low Voltage ◽  
Supply Voltage ◽  
Circuit Simulation ◽  
Current Source ◽  
Cmos Technology ◽  
Threshold Region ◽  
Voltage Range ◽  
Current Reference ◽  
Reference Circuit

This paper proposes a low voltage CMOS Nano power current reference circuit and presents its performance with circuit simulation in 180- nm UMC CMOS technology. The proposed circuit consists of start-up, Bias-voltage, current-source sub-circuits with most of the MOSFETs operating in sub-threshold region. Simulation results shows that the circuit generates a stable reference current of 4-nA in supply voltage range 1 V- 1.8 V with line sensitivity of 0.203%/V.The temperature coefficient of the current was 7592ppm/°C at 1.8 V in the range of 0°C-100°C. The power dissipation was 380 NW at 1.8 V Supply. The proposed circuit would be suitable for use in sub-threshold –operated power-aware large-scale integration

A Low-Voltage Low-Power Resistor-Based Current Mirror and Its Applications

2017 ◽  
Vol 26 (11) ◽  
pp. 1750180 ◽  
Author(s):  
Leila Safari ◽  
Shahram Minaei
Keyword(s):  
Output Voltage ◽  
High Performance ◽  
Low Voltage ◽  
Supply Voltage ◽  
Input Voltage ◽  
Cmos Technology ◽  
Current Mirror ◽  
Output Impedance ◽  
High Cmrr ◽  
High Output Impedance

In this paper, a CMOS resistor-based current mirror (RBCM) aimed to be used in low-voltage applications is presented. The main features of the proposed current mirror are very low input voltage requirement (a few mV), low output voltage requirement, high output impedance and simple circuitry. The core structure of the proposed RBCM consists of three transistors (excluding bias circuitry) and two low value grounded resistors. The proposed circuit alleviates the need for cascode structures which are conventionally used to boost the output impedance and linearity. SPICE simulations using 0.18[Formula: see text][Formula: see text]m CMOS technology parameters under supply voltage of 0.9[Formula: see text]V are reported which show input and output voltage requirements of 40[Formula: see text]mV and 0.1[Formula: see text]V respectively, low THD of 1.2%, [Formula: see text] of 496[Formula: see text][Formula: see text], [Formula: see text] of 1[Formula: see text]M[Formula: see text], [Formula: see text]3[Formula: see text]dB bandwidth of 181[Formula: see text]MHz and power dissipation of 154[Formula: see text][Formula: see text]W. A high CMRR differential amplifier and a high performance current difference circuit as applications of the proposed RBCM are given. The proposed RBCM is very useful in tackling restrictions of modern technologies such as reduced supply voltage and transistors low intrinsic output impedance.

scholarly journals Design of active inductor-based butterworth and chebyshev microwave bandpass filters in standard 0.18µm-CMOS technology

2019 ◽  
Vol 8 (1) ◽  
pp. 27
Author(s):  
Jarjar Mariem ◽  
Pr. EL Quazzani Nabih
Keyword(s):  
Cmos Technology ◽  
Active Filters ◽  
Active Inductor ◽  
Current Mirror ◽  
Mos Transistors ◽  
Operational Transconductance Amplifier ◽  
Scattering Parameters ◽  
Frequency Range ◽  
Transconductance Amplifier ◽  
Insertion Losses

<p>In this paper we propose a synthesis of microwave active filters having Butterworth and Chebyshev responses in the frequency range 1GHz-2GHz. The filter fundamental block, used to build an active inductor, consists of CMOS-based Operational Transconductance Amplifier (OTA) circuits. These amplifiers are made out of simple current mirror using MOS transistors. The simulation procedure has been carried out through PSPICE software showing good performances regarding scattering parameters in terms insertion losses, of out-of-band rejection and phase.</p>

High Performance CMOS Current Mirror Using Class-AB Level Shifted Bulk Driven Flipped Voltage Follower Cell

2019 ◽  
Vol 28 (08) ◽  
pp. 1950140
Author(s):  
Caffey ◽  
Rishikesh Pandey
Keyword(s):  
Supply Voltage ◽  
Tracking Error ◽  
Cmos Technology ◽  
Current Mirror ◽  
Design Environment ◽  
Output Resistance ◽  
Class Ab ◽  
Flipped Voltage Follower ◽  
Voltage Follower ◽  
High Output

This paper presents a novel current mirror structure based on level shifted class-AB flipped voltage follower cell, which operates at the supply voltage of 1.2[Formula: see text]V. The level shifted class-AB flipped voltage follower cell and regulated cascode structure are used at the input and the output stages to achieve low input resistance and very high output resistance, respectively. A comparison of performance parameters of the proposed current mirror with existing structures shows that the proposed current mirror has a very less current tracking error of 0.99%, high output resistance of 18.7[Formula: see text]M[Formula: see text], wide bandwidth of 239.245[Formula: see text]MHz and low power dissipation of 104[Formula: see text][Formula: see text]W. The proposed circuit has been simulated in Cadence virtuoso analog design environment and layout of the proposed circuit has been designed in Cadence virtuoso layout XL editor using BSIM3V3 180[Formula: see text]nm CMOS technology. The post-layout simulation results have also been presented to demonstrate the effectiveness of the proposed circuit.

A VERY LOW-TC SECOND-ORDER TEMPERATURE-COMPENSATED CMOS CURRENT REFERENCE

2014 ◽  
Vol 23 (03) ◽  
pp. 1450042 ◽  
Author(s):  
LIANG LIANG ◽  
ZHANGMING ZHU ◽  
YINTANG YANG
Keyword(s):  
Temperature Compensation ◽  
Supply Voltage ◽  
Design Method ◽  
Current Source ◽  
Second Order ◽  
Cmos Process ◽  
Current Mirror ◽  
First Order ◽  
Temperature Range ◽  
Current Reference

This paper proposes a novel second-order temperature-compensated CMOS current reference which exploits a new self-biased current source for first-order temperature compensation and a resistor-free widlar current mirror for second-order temperature compensation. Moreover, by deriving the temperature coefficient (TC) of the reference current, the temperature compensation condition equations together with a design method of minimizing the thermal drift in a required temperature range are presented. Based on these, the circuit is designed in a standard 0.18 μm CMOS process and achieves a very low TC of only 16.9 ppm/°C in a temperature range between -40°C and 120°C, with 1 μA reference current at 27°C. Besides, the current reference can operate at supply voltage down to 1.3 V, with a good supply regulation of 0.5%/V. At 27°C, its power consumption is 8.93 μW.

scholarly journals A 0.026 mm2 Time Domain CMOS Temperature Sensor with Simple Current Source

Micromachines ◽  
2020 ◽  
Vol 11 (10) ◽  
pp. 899 ◽  
Author(s):  
Sangwoo Park ◽  
Sangjin Byun
Keyword(s):  
Time Domain ◽  
Temperature Sensor ◽  
Feedback Loop ◽  
Supply Voltage ◽  
Current Source ◽  
Cmos Process ◽  
Voltage Sensitivity ◽  
Temperature Dependent ◽  
Digital Conversion ◽  
Pmos Transistor

This paper presents a time domain CMOS temperature sensor with a simple current source. This sensor chip only occupies a small active die area of 0.026 mm2 because it adopts a simple current source consisting of an n-type poly resistor and a PMOS transistor and a simple current controlled oscillator consisting of three current starved inverter delay cells. Although this current source is based on a simple architecture, it has better temperature linearity than the conventional approach that generates a temperature-dependent current through a poly resistor using a feedback loop. This temperature sensor is designed in a 0.18 μm 1P6M CMOS process. In the post-layout simulations, the temperature error was measured within a range from −1.0 to +0.7 °C over the temperature range of 0 to 100 °C after two point calibration was carried out at 20 and 80 °C, respectively. The temperature resolution was set as 0.32 °C and the temperature to digital conversion rate was 50 kHz. The energy efficiency is 1.4 nJ/sample and the supply voltage sensitivity is 0.077 °C/mV at 27 °C while the supply voltage varies from 1.65 to 1.95 V.

scholarly journals CMOS Active Inductor Based Voltage Controlled Oscillator

2018 ◽  
Vol 6 (2) ◽  
pp. 97
Author(s):  
Dhara P Patel ◽  
Shruti Oza ◽  
Rajesh A Thakker
Keyword(s):  
Phase Noise ◽  
Power Dissipation ◽  
High Efficiency ◽  
Low Voltage ◽  
Supply Voltage ◽  
Current Source ◽  
Active Inductor ◽  
Voltage Controlled Oscillator ◽  
Active Inductors ◽  
Minimum Number

<p class="MsoNormal" style="margin-top: 6.0pt; text-align: justify;"><span style="font-size: 9pt;" lang="EN-IN">A Tunable Active Inductor (TAI) based Voltage Controlled Oscillator (VCO) for Radio Frequency (RF) applications ranging from 670 MHz - 1.53 GHz is presented. A design of low phase noise and compact VCO is proposed. In order to lower the phase noise of VCO, its RF output power has been improved. The use of low voltage active in-ductor circuit reduces the power dissipation of VCO. The single ended CMOS active inductors with minimum number of transistors are used to consume less die area of VCO circuit. The low power dissipation of the circuit have high efficiency to generate output RF power. A supply independent variable current source tunes the VCO. The post layout design is simulated in Cadence spectreRF using TSMC 180 nm process libraries. The VCO circuit shows the phase noise variation from -124 to  - 126 dBc/Hz and an active area of 0.0049 mm<sup>2</sup>. The VCO core circuit, excluding output buffers, consumes 10 mW at 1.8 V supply voltage.</span></p>

scholarly journals Fully Integrated K-Band Active Bandpass Filter In GPDK 90nm CMOS Technology

2018 ◽  
Vol 11 (1) ◽  
pp. 3-6
Author(s):  
Md. Jamil Uddin ◽  
Hadaate Ullah ◽  
Mohammad Arif Sobhan Bhuiyan
Keyword(s):  
Quality Factor ◽  
Circuit Design ◽  
Bandpass Filter ◽  
Noise Figure ◽  
Cmos Technology ◽  
Active Inductor ◽  
Rf Transceiver ◽  
Chip Area ◽  
Fully Integrated ◽  
Chip Size

Abstract The bandpass filter is one of the essential blocks of every modern RF transceiver. Performance of the transceiver greatly depends on the performance of the bandpass filter. A bandpass filter designed with passive inductors suffers from some drawbacks like large chip size, low-quality factor, less tenability etc. To prevail over these constraints, an active inductor-based bandpass filter circuit has been designed in GPDK-90nm CMOS technology utilizing cadence virtuoso environment. The simulation result shows that the active inductor-based bandpass filter circuit design achieves a gain of 6.79dB, a bandwidth of 5.05 GHz and a noise figure of 3.10dB. The circuit dissipates only 3.55mW power for its operation from a single 1.5V DC supply. By avoiding bulky inductor in the design helped to attain a very small chip area of 127.704μm2.

scholarly journals A Bulk-Driven Quasi-Floating Gate Regulated Cascode Current Mirror and Its Application in Squarer Circuit

2022 ◽  
Author(s):  
bchir bchir ◽  
Mounira Bchir ◽  
Imen Aloui ◽  
Nejib Hassen
Keyword(s):  
Performance Improvement ◽  
Supply Voltage ◽  
Harmonic Distortion ◽  
Cmos Technology ◽  
Floating Gate ◽  
Input Current ◽  
Current Mirror ◽  
Transfer Error ◽  
Simulation Results ◽  
Cascode Current Mirror

Abstract A regulated cascode current mirror (RGC) and its improved version with bulk driven quasi floating gate technique (BD-QFG) are presented in this paper. The proposed BD-QFG RGC current mirror (CM) is compared with the conventional (GD) RGC CM to show the performance improvement. The conventional and unconventional CM are implemented in Candace Virtuoso using 90 nm CMOS technology. For input current (Iin) varied from 0 to 200 μA and for 0.8 V supply voltage, the simulation results present that the proposed BD-QFG RGC CM has less variation in current transfer error (0.2%) as compared to the GD RGC CM (12%). The output voltage requirement for 200 µA input current is respectively 0.7 V and 0.17 V for the GD RGC CM and the BD-QFG RGC CM. The power consumption of the proposed circuit is 22.71 μW which is 0.15 μW higher than the GD RGC (22.56 μW). The total harmonic distortion (THD) of the proposed circuit is 0.4% which is 1.1% less than the conventional circuit (1.5%). All these improvements in the proposed BD-QFG RGC CM are attained at a cost of 0.05 GHz reduction in frequency (2.31 GHz). The minimum supply voltage of BD-QFG RGC CM and GD RGC CM is 0.4 V and

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