SiC MESFETs for High-Frequency Applications

MRS Bulletin ◽  
2005 ◽  
Vol 30 (4) ◽  
pp. 308-311 ◽  
Author(s):  
S. Sriram ◽  
A. Ward ◽  
J. Henning ◽  
S. T. Allen
Keyword(s):  
Integrated Circuit ◽  
High Frequency ◽  
Field Effect Transistors ◽  
High Volume ◽  
Junction Temperature ◽  
Time To Failure ◽  
Power Performance ◽  
Operating Life ◽  
Reliability Characteristics ◽  
Improved Performance

AbstractSignificant progress has been made in the development of SiC metal semiconductor field-effect transistors (MESFETs) and monolithic microwave integrated-circuit (MMIC) power amplifiers for high-frequency power applications. Three-inch-diameter high-purity semi-insulating 4H-SiC substrates have been used in this development, enabling high-volume fabrication with improved performance by minimizing surface- and substrate-related trapping issues previously observed in MESFETs. These devices exhibit excellent reliability characteristics, with mean time to failure in excess of 500 h at a junction temperature of 410°C. A sampling of these devices has also been running for over 5000 h in an rf high-temperature operating-life test, with negligible changes in performance. High-power SiC MMIC amplifiers have also been demonstrated with excellent yield and repeatability. These MMIC amplifiers show power performance characteristics not previously available with conventional GaAs technology. These developments have led to the commercial availability of SiC rf power MESFETs and to the release of a foundry process for MMIC fabrication.

scholarly journals Lithography for enabling advances in integrated circuits and devices

2012 ◽  
Vol 370 (1973) ◽  
pp. 4015-4041 ◽  
Author(s):  
C. Michael Garner
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Extreme Ultraviolet ◽  
Field Effect Transistors ◽  
Semiconductor Industry ◽  
High Volume ◽  
Pattern Transfer ◽  
Time Pattern ◽  
Technology Roadmap ◽  
The Future

Because the transistor was fabricated in volume, lithography has enabled the increase in density of devices and integrated circuits. With the invention of the integrated circuit, lithography enabled the integration of higher densities of field-effect transistors through evolutionary applications of optical lithography. In 1994, the semiconductor industry determined that continuing the increase in density transistors was increasingly difficult and required coordinated development of lithography and process capabilities. It established the US National Technology Roadmap for Semiconductors and this was expanded in 1999 to the International Technology Roadmap for Semiconductors to align multiple industries to provide the complex capabilities to continue increasing the density of integrated circuits to nanometre scales. Since the 1960s, lithography has become increasingly complex with the evolution from contact printers, to steppers, pattern reduction technology at i-line, 248 nm and 193 nm wavelengths, which required dramatic improvements of mask-making technology, photolithography printing and alignment capabilities and photoresist capabilities. At the same time, pattern transfer has evolved from wet etching of features, to plasma etch and more complex etching capabilities to fabricate features that are currently 32 nm in high-volume production. To continue increasing the density of devices and interconnects, new pattern transfer technologies will be needed with options for the future including extreme ultraviolet lithography, imprint technology and directed self-assembly. While complementary metal oxide semiconductors will continue to be extended for many years, these advanced pattern transfer technologies may enable development of novel memory and logic technologies based on different physical phenomena in the future to enhance and extend information processing.

scholarly journals A Broadband Active Microwave Monolithically Integrated Circuit Balun in Graphene Technology

2020 ◽  
Vol 10 (6) ◽  
pp. 2183
Author(s):  
Dalal Fadil ◽  
Vikram Passi ◽  
Wei Wei ◽  
Soukaina Ben Salk ◽  
Di Zhou ◽  
...  
Keyword(s):  
Integrated Circuit ◽  
High Frequency ◽  
Field Effect Transistors ◽  
Excellent Performance ◽  
Monolithically Integrated ◽  
Upper Limit ◽  
Ambipolar Behavior ◽  
Active Balun ◽  
Graphene Fet ◽  
Rf Performances

This paper presents the first graphene radiofrequency (RF) monolithic integrated balun circuit. It is composed of four integrated graphene field effect transistors (GFETs). This innovative active balun concept takes advantage of the GFET ambipolar behavior. It is realized using an advanced silicon carbide (SiC) based bilayer graphene FET technology having RF performances of about 20 GHz. Balun circuit measurement demonstrates its high frequency capability. An upper limit of 6 GHz has been achieved when considering a phase difference lower than 10° and a magnitude of amplitude imbalance less than 0.5 dB. Hence, this circuit topology shows excellent performance with large broadband performance and a functionality of up to one-third of the transit frequency of the transistor.

IR Thermography for Temperature Measurements and Fault Location on AlGaN/GaN HEMTs and MMICs

2015 ◽  
Author(s):  
Lény Baczkowski ◽  
Franck Vouzelaud ◽  
Dominique Carisetti ◽  
Nicolas Sarazin ◽  
Jean-Claude Clément ◽  
...  
Keyword(s):  
Fault Location ◽  
Hot Spot ◽  
Life Time ◽  
High Electron Mobility Transistors ◽  
Junction Temperature ◽  
High Electron ◽  
Ir Thermography ◽  
Operating Life ◽  
Gan Hemt ◽  
Electron Mobility Transistors

Abstract This paper shows a specific approach based on infrared (IR) thermography to face the challenging aspects of thermal measurement, mapping, and failure analysis on AlGaN/GaN high electron-mobility transistors (HEMTs) and MMICs. In the first part of this paper, IR thermography is used for the temperature measurement. Results are compared with 3D thermal simulations (ANSYS) to validate the thermal model of an 8x125pm AIGaN/GaN HEMT on SiC substrate. Measurements at different baseplate temperature are also performed to highlight the non-linearity of the thermal properties of materials. Then, correlations between the junction temperature and the life time are also discussed. In the second part, IR thermography is used for hot spot detection. The interest of the system for defect localization on AIGaN/GaN HEMT technology is presented through two case studies: a high temperature operating life test and a temperature humidity bias test.

High-frequency equivalent circuits of junction-gate field-effect transistors

1970 ◽  
Vol 6 (18) ◽  
pp. 590
Author(s):  
P.U. Calzolari ◽  
S. Graffi ◽  
A. Mazzone
Keyword(s):  
High Frequency ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Equivalent Circuits

scholarly journals Impact of device scaling on the electrical properties of MoS2 field-effect transistors

2021 ◽  
Vol 11 (1) ◽  
Author(s):  
Goutham Arutchelvan ◽  
Quentin Smets ◽  
Devin Verreck ◽  
Zubair Ahmed ◽  
Abhinav Gaur ◽  
...  
Keyword(s):  
Field Effect Transistors ◽  
Oxide Thickness ◽  
Channel Length ◽  
Contact Length ◽  
Power Performance ◽  
Semiconducting Materials ◽  
Large Area ◽  
Short Channel ◽  
Device Scaling ◽  
Performance Area

AbstractTwo-dimensional semiconducting materials are considered as ideal candidates for ultimate device scaling. However, a systematic study on the performance and variability impact of scaling the different device dimensions is still lacking. Here we investigate the scaling behavior across 1300 devices fabricated on large-area grown MoS2 material with channel length down to 30 nm, contact length down to 13 nm and capacitive effective oxide thickness (CET) down to 1.9 nm. These devices show best-in-class performance with transconductance of 185 μS/μm and a minimum subthreshold swing (SS) of 86 mV/dec. We find that scaling the top-contact length has no impact on the contact resistance and electrostatics of three monolayers MoS2 transistors, because edge injection is dominant. Further, we identify that SS degradation occurs at short channel length and can be mitigated by reducing the CET and lowering the Schottky barrier height. Finally, using a power performance area (PPA) analysis, we present a roadmap of material improvements to make 2D devices competitive with silicon gate-all-around devices.

scholarly journals Modelling Reliability Characteristics of Technical Equipment of Local Area Computer Networks

Electronics ◽  
2021 ◽  
Vol 10 (8) ◽  
pp. 955
Author(s):  
Vasyl Teslyuk ◽  
Andriy Sydor ◽  
Vincent Karovič ◽  
Olena Pavliuk ◽  
Iryna Kazymyra
Keyword(s):  
Large Scale ◽  
Computer Network ◽  
Network Reliability ◽  
Local Area ◽  
Technical Equipment ◽  
Time To Failure ◽  
Reliability Parameters ◽  
Reliability Characteristics ◽  
Global World ◽  
Level 2

Technical systems in the modern global world are rapidly evolving and improving. In most cases, these are large-scale multi-level systems and one of the problems that arises in the design process of such systems is to determine their reliability. Accordingly, in the paper, a mathematical model based on the Weibull distribution has been developed for determining a computer network reliability. In order to simplify calculating the reliability characteristics, the system is considered to be a hierarchical one, ramified to level 2, with bypass through the level. The developed model allows us to define the following parameters: the probability distribution of the count of working output elements, the availability function of the system, the duration of the system’s stay in each of its working states, and the duration of the system’s stay in the prescribed availability condition. The accuracy of the developed model is high. It can be used to determine the reliability parameters of the large, hierarchical, ramified systems. The research results of modelling a local area computer network are presented. In particular, we obtained the following best option for connecting workstations: 4 of them are connected to the main hub, and the rest (16) are connected to the second level hub, with a time to failure of 4818 h.

scholarly journals Modelling of Dynamic Properties of Silicon Carbide Junction Field-Effect Transistors (JFETs)

Energies ◽  
2020 ◽  
Vol 13 (1) ◽  
pp. 187 ◽  
Author(s):  
Kamil Bargieł ◽  
Damian Bisewski ◽  
Janusz Zarębski
Keyword(s):  
Silicon Carbide ◽  
Integrated Circuit ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Dynamic Properties ◽  
Modified Model ◽  
Spice Model ◽  
Capacitance Voltage ◽  
Effect Transistor ◽  
Switching Characteristics

The paper deals with the problem of modelling and analyzing the dynamic properties of a Junction Field Effect Transistor (JFET) made of silicon carbide. An examination of the usefulness of the built-in JFET Simulation Program with Integrated Circuit Emphasis (SPICE) model was performed. A modified model of silicon carbide JFET was proposed to increase modelling accuracy. An evaluation of the accuracy of the modified model was performed by comparison of the measured and calculated capacitance–voltage characteristics as well as the switching characteristics of JFETs.

AlGaN/GaN HEMTs: RECENT DEVELOPMENTS AND FUTURE DIRECTIONS

2008 ◽  
Vol 18 (04) ◽  
pp. 913-922 ◽  
Author(s):  
SIDDHARTH RAJAN ◽  
UMESH K. MISHRA ◽  
TOMÁS PALACIOS
Keyword(s):  
Field Effect ◽  
High Speed ◽  
Digital Circuits ◽  
Field Effect Transistors ◽  
Rf Power ◽  
Power Performance ◽  
Future Directions ◽  
Recent Developments ◽  
Gan Hemts ◽  
State Of Art

This paper provides an overview of recent work and future directions in Gallium Nitride transistor research. We discuss the present status of Ga -polar AlGaN / GaN HEMTs and the innovations that have led to record RF power performance. We describe the development of N -polar AlGaN / GaN HEMTs with microwave power performance comparable with state-of-art Ga -polar AlGaN / GaN HEMTs. Finally we will discuss how GaN -based field effect transistors could be promising for a less obvious application: low-power high-speed digital circuits.

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