scholarly journals Ultrahigh ON/Off Current Ratio γ-Graphyne-1 Nanotube Based Sub 10 nm TFET Modeling and Simulation

2022 ◽  
Author(s):  
Behrouz Rouzkhash ◽  
Alireza Salehi ◽  
Mohammad Taghi Ahmadi
Keyword(s):  
Field Effect Transistors ◽  
Ballistic Transport ◽  
Mean Free Path ◽  
Channel Length ◽  
High Electron ◽  
Current Ratio ◽  
Electron Effective Mass ◽  
Channel Lengths ◽  
Non Equilibrium Green’S Function ◽  
Research Analysis

Abstract Utilizing γ-graphyne-1 nanotubes (GyNTs) in the Tunneling Field Effect Transistors (TFETs) suppresses ambipolarity and enhances subthreshold swing (SS) of TFETs which is because of large energy band gap and high electron effective mass of GyNTs. In this research analysis of structural, electronic and thermoelectric properties of γ-graphyne-1 family under the deformation potential (DP) approach reveals that electron-phonon mean free path (MFP) of an Armchair GyNT (3AGyNT) and Zigzag GyNT (2ZGyNT) are 45 and 290 nm, respectively. Therefore, ballistic transport of sub 10 nm 3AGyNT-TFETs and 2ZGyNT-TFETs in different channel lengths are investigated utilizing Non-Equilibrium Green’s Function (NEGF) formalism in the DFTB platform. Ultrahigh Current Ratio (OOCR) value of 1.6 x 1010 at VDD = 0.2 V and very low point SS of 5 mV/dec are belonged to the 3AGyNT-TFET with channel length of 9.6 nm. 2ZGyNT-TFETs shows higher on-state current and SS as well as lower OOCR than those of 3AGyNT-TFETs. A linear relationship between channel length and logarithmic off-state current is reported that is consistent with WKB approximation. The obtained results along with the ultralow power consumption of the suggested GyNT-TFETs, make them as replacement of digital silicon MOSFETs in the next generation nanoelectronic devices.

Nanocrystalline Silicon TFTs With 50 nm Thick Deposited Channel Layer, 10 cm2/Vs Electron Mobility and 108 On/Off Current Ratio

2001 ◽  
Vol 664 ◽  
Author(s):  
Robert B. Min ◽  
Sigurd Wagner
Keyword(s):  
Field Effect ◽  
High Mobility ◽  
Nanocrystalline Silicon ◽  
Channel Length ◽  
High Electron ◽  
Field Effect Mobility ◽  
Current Ratio ◽  
Gate Structure ◽  
Electron Field ◽  
Top Gate Structure

ABSTRACTThin film transistors were made using 50 nm thick directly deposited nanocrystalline silicon channel layers. The transistors have coplanar top gate structure. The nanocrystalline silicon was deposited from discharges in silane, hydrogen and silicon tetrafluoride. The transistors combine a high electron field effect mobility of ∼ 10 cm2/Vs with a low “off” current of ∼ 10−14 A per µm of channel length, and an “on”/“off” current ratio of ∼ 108. This result shows that directly deposited silicon can combine high mobility with low “off” currents.

scholarly journals Coupled NEGF-PSO Method for Maximizing the Current Ratio of CNTFETs Based on Oxide Thickness Optimization

2021 ◽  
Author(s):  
Amin Ghasemi Nejad Raeini ◽  
Zoheir Kordrostami ◽  
Samaneh Hamedi
Keyword(s):  
Field Effect Transistors ◽  
Cutoff Frequency ◽  
Pso Algorithm ◽  
Oxide Thickness ◽  
Performance Parameters ◽  
Thickness Optimization ◽  
Current Ratio ◽  
Maximum Current ◽  
Independent Variable ◽  
Channel Lengths

Abstract Carbon nanotube field-effect transistors (CNTFETs) with optimized oxide thicknesses have been proposed. The optimum oxide thickness that provides the maximum current ratio (on/off ratio) has been calculated for each design. The effect of oxide thickness on the on/off ratio has been investigated by changing its value as the independent variable and calculating on state and off state currents. PSO algorithm has been used to find the exact optimum value of the oxide thickness with the objective of having a maximum current ratio that is one of the most important parameters in switching applications. The optimum insulator thickness is calculated for CNTFETs with different chiral vectors, insulator types, channel lengths and source/drain doping levels. For further study of the CNTFETs, performance parameters such as cutoff frequency and transconductance of the devices have also been calculated and studied. The results of the paper show that the CNTFET designers should select the oxide thickness very carefully not only based on reported values in other works. Each design requires its own optimum oxide thickness which provides the maximum on/off current ratio only for that design.

Short-channel and high-mobility p- and n-type organic single-crystal transistors with air-gap structures

2012 ◽  
Vol 1402 ◽  
Author(s):  
M. Uno ◽  
T. Uemura ◽  
K. Miwa ◽  
A. Facchetti ◽  
J. Takeya
Keyword(s):  
Single Crystal ◽  
High Speed ◽  
Carrier Mobility ◽  
Field Effect Transistors ◽  
High Mobility ◽  
Channel Length ◽  
Air Gap ◽  
Short Channel ◽  
Glass Substrates ◽  
Channel Lengths

ABSTRACTIn an effort to realize high-speed organic logic components, p- and n-type single-crystal organic field-effect transistors (SC-OFETs) were fabricated using air-gap structures with channel lengths as short as several μm. High carrier mobility of about 10 cm2/Vs is demonstrated in rubrene SC-OFETs even with the short channel length of 6 μm, using Si-based microstructures. The contact resistance is estimated to be 450 Ohm cm, which is only 5% of the total channel resistance between source and drain electrodes. Performances of n-type air-gap devices based on PDIF-CN2 are also demonstrated exhibiting electron transport with the carrier mobility of about 2 cm2/Vs. Furthermore, micron-scale air-gap structures are fabricated using insulating materials on glass substrates to reduce parasitic gate capacitance. The cut-off frequency of this rubrene air-gap device is measured to be as high as 8 MHz with applied drain voltage VD of 15 V. These techniques are promising to be applicable to next-generation organic high-speed logic circuits.

scholarly journals Performance Parameters of 3 Value 8t Cntfet Based Sram Cell Design using H-Spice

2019 ◽  
Vol 8 (2S5) ◽  
pp. 22-27
Keyword(s):  
Field Effect Transistors ◽  
Ballistic Transport ◽  
Memory Cell ◽  
Channel Length ◽  
Order Effects ◽  
Binary Number ◽  
Threshold Voltages ◽  
Sram Cell ◽  
Carbon Nano Tubes ◽  
Carbon Nano Tube

this paper presents a design of a 3ValueLogic 9T memory cell using carbon nano-tube field-effect transistors (CNTFETs). The carbon nano tubes with their superior transport properties, excellent current capabilities ballistic transport operation, 3-value logic have been proposed for 8T SRAM cell implementation in CNTFET technology. The CNTFET design to achieves the different threshold voltages. And it also avoids the usage of additional power supplies. The channel length used here is 18nm wide. The power consumption is reduced, as there is absence of stand-by power dissipation. Second order effects are removed by using CNTFET. In a 3 Value Logic, it only takes log3 (2n) bits to represent an n-bit binary number. In 3Value logic 9T memory cell based CNTFET have been developed and extensive HSPICE simulations have been performed in realistic environments. CNTFET 9T based SRAM cell proves which is Dynamic power better than CNTFET, based 3value logic 8T SRAM cell as well as CMOS SRAM cell.

Vertical-Type a-Si:H Field-Effect Transistors

1984 ◽  
Vol 33 ◽  
Author(s):  
Yasutaka Uchida ◽  
Masakiyo Matsumura
Keyword(s):  
Field Effect ◽  
Field Effect Transistors ◽  
Type A ◽  
Channel Length ◽  
Experimental Results ◽  
Simple Analysis ◽  
Current Ratio

ABSTRACTVertical-type a-Si:H Field Effect Transistors with 1 μm channel length have been investigated. A simple analysis of the FET characteristics indicates that the reduction of the channel length is an effective method to improve the FET characteristics at least up to the channel length of 1 μm. Experimental results showed that the on-resistance is approximately propotional to the channel length and that on off current ratio of the vertical-type FET with 1 μm channel length was more than 104.

Projected Performance of Sub-10 nm GaN-based Double Gate MOSFETs

2017 ◽  
Vol 2 (2) ◽  
pp. 15-19 ◽  
Author(s):  
Md. Saud Al Faisal ◽  
Md. Rokib Hasan ◽  
Marwan Hossain ◽  
Mohammad Saiful Islam
Keyword(s):  
High Speed ◽  
Field Effect Transistors ◽  
Cmos Technology ◽  
Channel Length ◽  
Capacitive Coupling ◽  
Oxide Semiconductor ◽  
Double Gate ◽  
Short Channel ◽  
Channel Effects ◽  
Silvaco Atlas

GaN-based double gate metal-oxide semiconductor field-effect transistors (DG-MOSFETs) in sub-10 nm regime have been designed for the next generation logic applications. To rigorously evaluate the device performance, non-equilibrium Green’s function formalism are performed using SILVACO ATLAS. The device is turn on at gate voltage, VGS =1 V while it is going to off at VGS = 0 V. The ON-state and OFF-state drain currents are found as 12 mA/μm and ~10-8 A/μm, respectively at the drain voltage, VDS = 0.75 V. The sub-threshold slope (SS) and drain induced barrier lowering (DIBL) are ~69 mV/decade and ~43 mV/V, which are very compatible with the CMOS technology. To improve the figure of merits of the proposed device, source to gate (S-G) and gate to drain (G-D) distances are varied which is mentioned as underlap. The lengths are maintained equal for both sides of the gate. The SS and DIBL are decreased with increasing the underlap length (LUN). Though the source to drain resistance is increased for enhancing the channel length, the underlap architectures exhibit better performance due to reduced capacitive coupling between the contacts (S-G and G-D) which minimize the short channel effects. Therefore, the proposed GaN-based DG-MOSFETs as one of the excellent promising candidates to substitute currently used MOSFETs for future high speed applications.

Nanoscale transistors

2017 ◽  
Author(s):  
Sandip Tiwari
Keyword(s):  
Field Effect Transistors ◽  
Ballistic Transport ◽  
Dimensional Change ◽  
Real Space ◽  
Operational Characteristics ◽  
Statistical Variations ◽  
Channel Transport ◽  
And Control ◽  
Long Channel ◽  
Detailed Nature

This chapter brings together the physical underpinnings of field-effect transistors operating in their nanoscale limits. It tackles the change in dominant behavior from scattering-limited long-channel transport to mesoscopic and few scattering events limits in quantized channels. It looks at electrostatics and a transistor’s controllability as dimensions are shrunk—the interplay of geometry and control—and then brings out the operational characteristics in “off”-state, e.g., the detailed nature of insulator’s implications or threshold voltage’s statistical variations grounded in short-range and long-range effects, and “on”-state, where quantization, quantized channels, ballistic transport and limited scattering are important. It also explores the physical behavior for zero bandgap and monoatomic layer materials by focusing on real-space and reciprocal-space funneling as one of the important dimensional change consequences through a discussion of parasitic resistances.

scholarly journals Impact of device scaling on the electrical properties of MoS2 field-effect transistors

2021 ◽  
Vol 11 (1) ◽  
Author(s):  
Goutham Arutchelvan ◽  
Quentin Smets ◽  
Devin Verreck ◽  
Zubair Ahmed ◽  
Abhinav Gaur ◽  
...  
Keyword(s):  
Field Effect Transistors ◽  
Oxide Thickness ◽  
Channel Length ◽  
Contact Length ◽  
Power Performance ◽  
Semiconducting Materials ◽  
Large Area ◽  
Short Channel ◽  
Device Scaling ◽  
Performance Area

AbstractTwo-dimensional semiconducting materials are considered as ideal candidates for ultimate device scaling. However, a systematic study on the performance and variability impact of scaling the different device dimensions is still lacking. Here we investigate the scaling behavior across 1300 devices fabricated on large-area grown MoS2 material with channel length down to 30 nm, contact length down to 13 nm and capacitive effective oxide thickness (CET) down to 1.9 nm. These devices show best-in-class performance with transconductance of 185 μS/μm and a minimum subthreshold swing (SS) of 86 mV/dec. We find that scaling the top-contact length has no impact on the contact resistance and electrostatics of three monolayers MoS2 transistors, because edge injection is dominant. Further, we identify that SS degradation occurs at short channel length and can be mitigated by reducing the CET and lowering the Schottky barrier height. Finally, using a power performance area (PPA) analysis, we present a roadmap of material improvements to make 2D devices competitive with silicon gate-all-around devices.

scholarly journals The frontiers of functionalized graphene-based nanocomposites as chemical sensors

2021 ◽  
Vol 10 (1) ◽  
pp. 330-369
Author(s):  
Norizan M. Nurazzi ◽  
Norli Abdullah ◽  
Siti Z. N. Demon ◽  
Norhana A. Halim ◽  
Ahmad F. M. Azmi ◽  
...  
Keyword(s):  
Electron Mobility ◽  
Room Temperature ◽  
Chemical Sensor ◽  
Performance Enhancement ◽  
Ballistic Transport ◽  
Quantum Hall ◽  
Single Atom ◽  
Research Progress ◽  
Thick Sheet ◽  
High Electron

Abstract Graphene is a single-atom-thick sheet of sp2 hybridized carbon atoms that are packed in a hexagonal honeycomb crystalline structure. This promising structure has endowed graphene with advantages in electrical, thermal, and mechanical properties such as room-temperature quantum Hall effect, long-range ballistic transport with around 10 times higher electron mobility than in Si and thermal conductivity in the order of 5,000 W/mK, and high electron mobility at room temperature (250,000 cm2/V s). Another promising characteristic of graphene is large surface area (2,630 m2/g) which has emerged so far with its utilization as novel electronic devices especially for ultrasensitive chemical sensor and reinforcement for the structural component applications. The application of graphene is challenged by concerns of synthesis techniques, and the modifications involved to improve the usability of graphene have attracted extensive attention. Therefore, in this review, the research progress conducted in the previous decades with graphene and its derivatives for chemical detection and the novelty in performance enhancement of the chemical sensor towards the specific gases and their mechanism have been reviewed. The challenges faced by the current graphene-based sensors along with some of the probable solutions and their future improvements are also being included.

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