scholarly journals High-Resolution Two-Dimensional Imaging of the 4H-SiC MOSFET Channel by Scanning Capacitance Microscopy

Nanomaterials ◽  
2021 ◽  
Vol 11 (6) ◽  
pp. 1626
Author(s):  
Patrick Fiorenza ◽  
Mario S. Alessandrino ◽  
Beatrice Carbone ◽  
Alfio Russo ◽  
Fabrizio Roccaforte ◽  
...  

In this paper, a two-dimensional (2D) planar scanning capacitance microscopy (SCM) method is used to visualize with a high spatial resolution the channel region of large-area 4H-SiC power MOSFETs and estimate the homogeneity of the channel length over the whole device perimeter. The method enabled visualizing the fluctuations of the channel geometry occurring under different processing conditions. Moreover, the impact of the ion implantation parameters on the channel could be elucidated.

2020 ◽  
Vol 90 (3) ◽  
pp. 30502
Author(s):  
Alessandro Fantoni ◽  
João Costa ◽  
Paulo Lourenço ◽  
Manuela Vieira

Amorphous silicon PECVD photonic integrated devices are promising candidates for low cost sensing applications. This manuscript reports a simulation analysis about the impact on the overall efficiency caused by the lithography imperfections in the deposition process. The tolerance to the fabrication defects of a photonic sensor based on surface plasmonic resonance is analysed. The simulations are performed with FDTD and BPM algorithms. The device is a plasmonic interferometer composed by an a-Si:H waveguide covered by a thin gold layer. The sensing analysis is performed by equally splitting the input light into two arms, allowing the sensor to be calibrated by its reference arm. Two different 1 × 2 power splitter configurations are presented: a directional coupler and a multimode interference splitter. The waveguide sidewall roughness is considered as the major negative effect caused by deposition imperfections. The simulation results show that plasmonic effects can be excited in the interferometric waveguide structure, allowing a sensing device with enough sensitivity to support the functioning of a bio sensor for high throughput screening. In addition, the good tolerance to the waveguide wall roughness, points out the PECVD deposition technique as reliable method for the overall sensor system to be produced in a low-cost system. The large area deposition of photonics structures, allowed by the PECVD method, can be explored to design a multiplexed system for analysis of multiple biomarkers to further increase the tolerance to fabrication defects.


2021 ◽  
Vol 16 ◽  
Author(s):  
Joice Sophia Ponraj ◽  
Muniraj Vignesh Narayanan ◽  
Ranjith Kumar Dharman ◽  
Valanarasu Santiyagu ◽  
Ramalingam Gopal ◽  
...  

: Increasing energy crisis across the globe requires immediate solutions. Two-dimensional (2D) materials are in great significance because of its application in energy storage and conversion devices but the production process significantly impacts the environment thereby posing a severe problem in the field of pollution control. Green synthesis method provides an eminent way of reduction in pollutants. This article reviews the importance of green synthesis in the energy application sector. The focus of 2D materials like graphene, MoS2, VS2 in energy storage and conversion devices are emphasized based on supporting recent reports. The emerging Li-ion batteries are widely reviewed along with their promising alternatives like Zn, Na, Mg batteries and are featured in detail. The impact of green methods in the energy application field are outlined. Moreover, future outlook in the energy sector is envisioned by proposing an increase in 2D elemental materials research.


2021 ◽  
Vol 11 (1) ◽  
Author(s):  
Goutham Arutchelvan ◽  
Quentin Smets ◽  
Devin Verreck ◽  
Zubair Ahmed ◽  
Abhinav Gaur ◽  
...  

AbstractTwo-dimensional semiconducting materials are considered as ideal candidates for ultimate device scaling. However, a systematic study on the performance and variability impact of scaling the different device dimensions is still lacking. Here we investigate the scaling behavior across 1300 devices fabricated on large-area grown MoS2 material with channel length down to 30 nm, contact length down to 13 nm and capacitive effective oxide thickness (CET) down to 1.9 nm. These devices show best-in-class performance with transconductance of 185 μS/μm and a minimum subthreshold swing (SS) of 86 mV/dec. We find that scaling the top-contact length has no impact on the contact resistance and electrostatics of three monolayers MoS2 transistors, because edge injection is dominant. Further, we identify that SS degradation occurs at short channel length and can be mitigated by reducing the CET and lowering the Schottky barrier height. Finally, using a power performance area (PPA) analysis, we present a roadmap of material improvements to make 2D devices competitive with silicon gate-all-around devices.


2021 ◽  
Vol 11 (14) ◽  
pp. 6537
Author(s):  
Marian Łupieżowiec

The article presents the concept of monitoring buildings and infrastructure elements located near large construction investments (the construction of high-rise buildings of the Oak Terraces housing estate in Katowice and the construction of a tunnel under the roundabout in Katowice along the intercity express road DTŚ). The impacts include deep excavation, lowering of the groundwater level over a large area, and dynamic influences related to the use of impact methods of soil improvement. The presented monitoring includes observation of the groundwater level with the use of piezometers, geodetic measurements of settlement and inclinations, as well as the measurement of vibration amplitudes generated during the works involving shocks and vibrations. It was also important to observe the development of cracks on the basis of a previously made inventory of damage. The results of the monitoring allow corrections to be made in the technology of works (e.g., reduction of vibration amplitudes, application of additional protections at excavations, etc.) or the use additional safety measures. Currently, there are also monitoring systems used during the operation of completed facilities.


2002 ◽  
Vol 716 ◽  
Author(s):  
Nihar R. Mohapatra ◽  
Madhav P. Desai ◽  
Siva G. Narendra ◽  
V. Ramgopal Rao

AbstractThe impact of technology scaling on the MOS transistor performance is studied over a wide range of dielectric permittivities using two-dimensional (2-D) device simulations. It is found that the device short channel performance is degraded with increase in the dielectric permittivity due to an increase in dielectric physical thickness to channel length ratio. For Kgate greater than Ksi, we observe a substantial coupling between source and drain regions through the gate dielectric. We provide extensive 2-D device simulation results to prove this point. Since much of the coupling between source and drain occurs through the gate dielectric, it is observed that the overlap length is an important parameter for optimizing DC performance in the short channel MOS transistors. The effect of stacked gate dielectric and spacer dielectric on the MOS transistor performance is also studied to substantiate the above observations.


2010 ◽  
Vol 42 ◽  
pp. 204-208 ◽  
Author(s):  
Xiang Dong Li ◽  
Quan Cai Wang

In this paper, the characteristic of grinding force in two-dimensional ultrasonic vibration assisted grinding nano-ceramic was studied by experiment based on indentation fracture mechanics, and mathematical model of grinding force was established. The study shows that grinding force mainly result from the impact of the grains on the workpiece in ultrasonic grinding, and the pulse power is much larger than normal grinding force. The ultrasonic vibration frequency is so high and the contact time of grains with the workpiece is so short that the pulse force will be balanced by reaction force from workpiece. In grinding workpiece was loaded by the periodical stress field, which accelerates the fatigue fracture.


2014 ◽  
Vol 590 ◽  
pp. 546-550
Author(s):  
Zhi Qiang Fan ◽  
Hai Bo Yang ◽  
Fei Zhao ◽  
Rong Zhu ◽  
Dong Bai Sun

The practical requirements of the project the nozzle entrance temperature is high, the gas specific heat ratio varies greatly, so it must consider the specific heat ratio change impact on two-dimensional nozzle contour design. Divided into consideration specific heat ratio change and not consider two kinds of scheme design of 1.4Ma nozzle profile and build the model using the arc line method, numerical simulation is carried out through the CFD software Fluent, analysis of two kinds of design scheme comparison. The results show that, in the supersonic nozzle at low Maher numbers, two schemes of nozzle design profile similarity, parameters change little flow tube, export the Maher number and the flow quality can meet the design requirements, proof of specific heat ratio has little effect on the design results in the design of the nozzle under the condition of low Maher number.


2008 ◽  
Vol 1069 ◽  
Author(s):  
Ryoji Kosugi ◽  
Toyokazu Sakata ◽  
Yuuki Sakuma ◽  
Tsutomu Yatsuo ◽  
Hirofumi Matsuhata ◽  
...  

ABSTRACTIn practical use of the SiC power MOSFETs, further reduction of the channel resistance, high stability under harsh environments, and also, high product yield of large area devices are indispensable. Pn diodes with large chip area have been already reported with high fabrication yield, however, there is few reports in terms of the power MOSFETs. To clarify the difference between the simple pn diodes and power MOSFETs, we have fabricated four pn-type junction TEGs having the different structural features. Those pn junctions are close to the similar structure of DIMOS (Double-implanted MOS) step-by-step from the simple pn diodes. We have surveyed the V-I characteristics dependence on each structural features over the 2inch wafer. Before their fabrication, we formed grid patterns with numbering over the 2inch wafer, then performed the synchrotron x-ray topography observation. This enables the direct comparison the electrical and spectrographic characteristics of each pn junctions with the fingerprints of defects.Four structural features from TypeA to TypeD are as follows. TypeA is the most simple structure as same as the standard pn diodes formed by Al+ ion implantation (I/I), except that the Al+ I/I condition conforms to that of the p-well I/I in the DIMOS. The JTE structure was used for the edge termination on all junctions. While the TypeA consists of one p-type region, TypeB and TypeC consists of a lot of p-wells. The difference of Type B and C is a difference of the oxide between the adjacent p-wells. The oxide of TypeB consists of the thick field oxide, while that of TypeC consists of the thermal oxide corresponding to the gate oxide in the DIMOS. In the TypeD structure, n+ region corresponding to the source in the DIMOS was added by the P+ I/I. The TypeD is the same structure of the DIMOS, except that the gate and source contacts are shorted. The V-I measurements of the pn junctions are performed using the KEITHLEY 237 voltage source meters with semi-auto probe machine. An active area of the fabricated pn junctions TEGs are 150um2 and 1mm2. Concentration and thickness of the drift layer are 1e16cm−3 and 10um, respectively.In order to compare the V-I characteristics of fabricated pn junctions with their defects information that obtained from x-ray topography measurements directly, the grid patterns are formed before the fabrication. The grid patterns were formed over the 2inch wafer by the SiC etching. The synchrotron x-ray topography measurements are carried out at the Beam-Line 15C in Photon-Factory in High-Energy-Accelerator-Research-Organization. Three diffraction conditions, g=11-28, -1-128, and 1-108, are chosen in grazing-incidence geometry (improved Berg-Barrett method).In the presentation, the V-I characteristics mapping on the 2inch wafer for each pn junctions, and the comparison of V-I characteristics with x-ray topography will be reported.


NANO ◽  
2021 ◽  
Author(s):  
Arslan Usman ◽  
Abdul Sattar ◽  
Hamid Latif ◽  
Muhammad Imran

The impact of phonon and their surrounding environment on exciton and its complexes were investigated in monolayer WSe2 semiconductor. Phonon up-conversion has been studied in past for conventional III–V semiconductors, but its role in two-dimensional layered transition metal dichalcogenides has rarely been explored. We investigated the photoluminescence up-conversion mechanism in WSe2 monolayer and found that a lower energy photon gain energy upto 64[Formula: see text]meV to be up-converted to emission photon at room temperature. Moreover, the phonon-exciton coupling mechanism has also been investigated and the role of dielectric screening has been explored to get complete insight of coulomb’s interaction in these electron-hole pairs. Investigations of charge carrier’s lifetime reveal that boron nitride encapsulated monolayer has shorter recombination time as low as 41 ps as compared to a bare monolayer on SiO2 substrate. These results are very promising for realizing spintronics-based application from two-dimensional layered semiconductors.


Sign in / Sign up

Export Citation Format

Share Document