MULTI-FACTOR AUTHENTICATED SECURE DIGITAL LOCKER USING GSM

In this time and age, technology is on an ever-developing trend, bringing with it a plethora of new advancements to daily life and common activities, but with these advancements, a whole new set of issues and vulnerabilities become present. This paper aims to discuss and propose a solution to the vulnerability of physical security lockers, a facet of security that many organisations tend to neglect. It aims to provide an elevated level of security for companies who use physical lockers to secure sensitive information or important contents. More specifically, the paper discusses the plausibility and the advantage of utilising multi-factor authentication with dynamic passwords or OTP code for short and facial recognition to access physical lockers. The proposed system will require employees to have accounts in their respective locker by entering their respective ID and passing the facial recognition feature. The system will then provide the employee with an OTP code, allowing the company an extra layer of security from intruders or malicious individuals.

IMPLEMENTATION OF A REDUCED COMPLEXITY HIGH PERFORMANCE DATA ACQUISITION CHIP USING 0.18 MICRON TECHNOLOGY

Data acquisition (DAQ) in the general sense is the process of collecting information from the real world. For engineers and scientists, this data is mostly numerical and is usually collected, stored and analysed using computers. However, most of the input signals cannot be read directly by digital computers. Because they are generally analog signals distinguished by continuous values, while computers can only recognise digital signals containing only the on/off levels. DAQ systems are therefore inevitably necessary, as they include the translation requirements from analog signals to digital data. For this reason, they have become significant in wide range of applications in modern science and technology [1]. The paper precents the disign of a 12-bit high-speed low-power Data Acquisition (DAQ) Chip. In this paper, the disigns of the building block components are aimed at high-accuracy along with high-speed and low power dissipation. A modifided flash Analog-to-Digital converter (ADC) was used instead of the traditional flash proposed DAQ chip operates at 1 GHz master clock frequency and achieves a sampling speed of 125 MS/s. It dissipates only 64.9 mW of power as compared to 97.2 mW when traditional flash ADC was used.

TIME DOMAIN METHOD FOR THE DETERMINATION OF THE STEADY STATE BEHAVIOUR OF NONLINEAR CIRCUITS DRIVEN BY MULTI-TONE SIGNALS

Time domain methods, while well suited to compute the steady state behaviour of strongly nonlinear non-autonomous electrical circuits, are inefficient if the periods of the forcing signals have a very large minimum common multiple. The solution of the periodicity constraint requires to integrate the differential algebraic equation (DAE) describing the circuit along the T period and this can be a CPU time consuming task. Literature reports several attempts to extend the SH method to simulate circuits driven by multi-tone signals [2] [4] [5]. However, as far as we know, all they suffer of limitations and it is our opinion that an efficient and general extension has not been found, yet. In this paper we present a possible extension that takes its origin from the previous approach reported in [2]. In this paper a modification of the conventional shooting method is presented that tries to overcome the above drawback.

SCALING CHALLENGES OF HIGH-TECH SMES DEVELOPING INTERNET OF THINGS TECHNOLOGY

This paper is a review of the organizational structure and challenges that a technological enterprise faces during scaling, from the perspective of the engineering management. After expanding operations internationally, the distributed engineering teams developing hardware and software for internet of things applications, face issues regarding culture, communication, leadership, project planning and management. Relevant literature addressing these issues is presented. We elaborate on already implemented measures for improving the overall efficiency and propose further processes introduced in recent literature that can be beneficial for further optimizing the new product development. Potential knock-on effects by such implementation are also discussed.

CFA BASED UNIVERSAL BIQUAD FILTER

This paper is a review of the organizational structure and challenges that a technological enterprise faces during scaling, from the perspective of the engineering management. After expanding operations internationally, the distributed engineering teams developing hardware and software for internet of things applications, face issues regarding culture, communication, leadership, project planning and management. Relevant literature addressing these issues is presented. We elaborate on already implemented measures for improving the overall efficiency and propose further processes introduced in recent literature that can be beneficial for further optimizing the new product development. Potential knock-on effects by such implementation are also discussed. A universal biquad filter using current feedback amplifiers (CFA) as active devices and a canonical number of capacitors is presented. It realizes the classical feedforward structure through the use of grounded capacitors and MOS transistors, which permit a full integrability. The proposed circuit has attractive characteristics, as the possibility to electronically control the transfer function coefficients and the possibility to be directly inserted within cascaded configurations. The theoretical analysis of the circuit is followed by some PSPICE simulation results in agreement with the theoretical findings. In this paper a universal fully integrable biquad using CFAs as active devices and a canonical number of capacitors is presented. It realizes the classical feedforward structure [3] through the use of grounded capacitors and MOS transistors. The presence of grounded capacitors makes the proposed circuit absorb shunt parasitic capacitances. All the possible kinds of responses can be realized, while in the biquad reported in [2] only the low-pass and band-pass responses can be obtained. The numerator and denominator coefficients of the voltage transfer function of the proposed biquad can be electronically controlled by acting on the gate voltages of the MOS transistors of the circuit. Moreover the presented structure has a low-impedance output and then it can be cascaded without additional buffers.

IMPLEMENTATION OF FPGA-BASED DVB-T2 TRANSMITTER FOR A SECOND GENERATION DIGITAL TERRESTRIAL TELEVISION BROADCASTING SYSTEM

Nowadays, with strong development of Science and Technology, integrated circuits continue to dominate not only in the field of digital information. Over the last several years, Technological television industry has taken huge strides and powerful transformation to meet with government’s policy about digitization of television all over the country in period 2015 – 2020. Stemming from the practical needs of “localization of products” and mastering of technological design of DVB-T2 transmitter (Digital Video Broadcasting – Terrestrial for Second generation), the authors have made an effort to research in algorithm, designed and tested in Field Programmable Gate Array (FPGA) technology. DVB-T2 is mainly aimed to replace the current standard DVB-T. The main motivation of DVB-T2 is to provide broadcasters with more advanced and efficient alternative to DVB-T standards. In DVB-T2 transmitter system, digital audio, video, and other data are compressed into a single signal to be transmitted on a single RF channel, using orthogonal frequency-division multiplexing (OFDM) with concatenated channel coding and interleaving. The higher offered bit rate makes it a suited system for carrying HDTV signals on the terrestrial TV channel. The next generation broadcasting systems should be designed to make full use of spectral resources while providing reliable transmissions in order to enable services like multichannel HDTV (High Definition Television) and innovative data casting services. The efficient usage of the radio spectrum can be achieved by the introduction of Single Frequency Networks (SFN). Digital transmitter DVB-T2 implemented on FPGA using a software Xilinx System Generator for DSP tool and Xilinx ISE Design Suite 14.7. System Generator for DSP is in conjunction on environment MATLAB-Simulink that is capable of simulating the proposed hardware structures that is synthesized and implemented by the programmable elements in Field-programmable Gate Arrays. In this project, adaptative MPEG-TS bitrate converter is designed to allows to increasing or reducing the MPEG TS rate by adding or filtering NULL packets. The entire digital transmitter DVB-T2 is integrated in one chip Xilinx FPGA Kintex-7 XC7K325T-1FFG676. Experimental design on development Kit NetFPGA-1G-CML of Digilent Corporation is performed at design department of technology center of Vietnamese Communications Television Development JSC. Authors are continuing to improve products, put into practical applications to replace the digital terrestrial television broadcasting stations that are being used in Vietnam. The article named “Implementation of FPGA-based DVB-T2 transmitter for a second generation digital terrestrial television broadcasting system” presents the research results, design methods, test results to compare, evaluate the accuracy of algorithm implementation. The results open up new directions for technological television in Vietnam.

SIMULTANEOUS STRAIN AND TEMPERATURE MEASUREMENT USING COMBINED FIBER AND FIBER BRAGG GRATING SENSORS

We propose here a new technique for simultaneous strain and temperature measurement using a Fiber Bragg Grating sensors. This technique employs an interferometric detection using two Fiber Bragg Gratings. A fiber Bragg grating is used as a reference while another fiber Bragg grating and a length of a bare fiber are used as the two sensing elements. As the temperature and strain change, the length of the sensing elements, (Fiber and Fiber Bragg Grating) change. These changes result in a phase and wavelength shifts. To measure these effects we use a Folded Mach Zhender interferometer, and a detection system made out of two photodiodes and data processing system. The sensitivity and dynamic range are analyzed and presented.

BCH CODES DECODER BASED ON EUCLID ALGORITHM

In the process of algebraic decoding of BCH codes over the field GF(q) with the word length n = qm-1, correcting t errors, both in the time and frequency domains, it is necessary to find the error locator polynomial ?(x) as the least polynomial for which the key equation. Berlekamp proposed a simple iterative scheme, which was called the Berlekamp-Messi algorithm, and is currently used in most practical applications. Comparative statistical tests of the proposed decoder and decoder using the Berlikamp-Messi algorithm showed that they differ slightly in decoding speed. The proposed algorithm is implemented in the environment in Turbo Pascal and can be used for the entire family of BCH codes by replacing the primitive Galois polynomial.

BLOCKCHAIN FOR VEHICLES BASED ON EXONUM PLATFORM THE WORLD

We propose a new vehicle monitoring system based on Exonum blockchain platform. This system may help autonomous vehicles to make decisions. This system can also help in investigating crimes and traffic offense. The article describes the main trends in the field of intellectualization of transport systems and mobility. The blockchain technology and its capabilities in enhancing cybersecurity are described through the creation of a safe and reliable system for sending the parameters of the current state of each vehicle through its neighbours. The proposed system will serve as an important step towards the development of a motion control system for connected and autonomous vehicles.

DISPERSION COMPENSATION USING ELECTRONIC METHODS BROADCASTING SYSTEM

System distortions due to chromatic dispersion (CD), polarization mode dispersion (PMD), laser phase noise and fiber nonlinearities have a significant impact on the performance of high-speed fiber optic networks. In connection with the need to improve the quality of information transmission in high-speed fiber-optic communication systems, coherent detection with a digital signal processing unit is of particular interest. The main goal of the DSP block is to reduce the impact of linear and nonlinear effects that degrade the quality of information transfer. In this direction, the use of adaptive filters with adaptation algorithms for filter coefficients plays an important role. The Constant Modulus Algorithm (CMA) and the Least Mean Square (LMS) method used to compensate for dispersion distortions are presented. The load on transport networks based on fiber-optic transmission systems is increasing at an accelerating rate. This paper discusses the possibility and limitations of increasing the throughput of fiber-optic transmission systems by reducing the distance between carriers. A comparison is made between fixed and flexible grids in terms of the spectral bandwidth efficiency. It is concluded that the use of flexible mesh technology is promising when switching to channel speeds above 100 Gbit/s.