scholarly journals Thermodynamic equilibrium theory revealing increased hysteresis in ferroelectric field-effect transistors with free charge accumulation

2021 ◽  
Vol 4 (1) ◽  
Author(s):  
Jasper Bizindavyi ◽  
Anne S. Verhulst ◽  
Bart Sorée ◽  
William G. Vandenberghe
Keyword(s):  
Free Energy ◽  
Gibbs Free Energy ◽  
Field Effect ◽  
Thermodynamic Potential ◽  
Field Effect Transistors ◽  
Charge Accumulation ◽  
Free Charge ◽  
Equilibrium Behavior ◽  
Grand Potential ◽  
The Impact

AbstractAt the core of the theoretical framework of the ferroelectric field-effect transistor (FeFET) is the thermodynamic principle that one can determine the equilibrium behavior of ferroelectric (FERRO) systems using the appropriate thermodynamic potential. In literature, it is often implicitly assumed, without formal justification, that the Gibbs free energy is the appropriate potential and that the impact of free charge accumulation can be neglected. In this Article, we first formally demonstrate that the Grand Potential is the appropriate thermodynamic potential to analyze the equilibrium behavior of perfectly coherent and uniform FERRO-systems. We demonstrate that the Grand Potential only reduces to the Gibbs free energy for perfectly non-conductive FERRO-systems. Consequently, the Grand Potential is always required for free charge-conducting FERRO-systems. We demonstrate that free charge accumulation at the FERRO interface increases the hysteretic device characteristics. Lastly, a theoretical best-case upper limit for the interface defect density DFI is identified.

scholarly journals Numerical Evaluation of the Effect of Geometric Tolerances on the High-Frequency Performance of Graphene Field-Effect Transistors

Nanomaterials ◽  
2021 ◽  
Vol 11 (11) ◽  
pp. 3121
Author(s):  
Monica La Mura ◽  
Patrizia Lamberti ◽  
Vincenzo Tucci
Keyword(s):  
High Frequency ◽  
Communication Systems ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Field Effect Transistors ◽  
Channel Length ◽  
Geometrical Parameters ◽  
Effect Transistor ◽  
Rf Performance ◽  
The Impact

The interest in graphene-based electronics is due to graphene’s great carrier mobility, atomic thickness, resistance to radiation, and tolerance to extreme temperatures. These characteristics enable the development of extremely miniaturized high-performing electronic devices for next-generation radiofrequency (RF) communication systems. The main building block of graphene-based electronics is the graphene-field effect transistor (GFET). An important issue hindering the diffusion of GFET-based circuits on a commercial level is the repeatability of the fabrication process, which affects the uncertainty of both the device geometry and the graphene quality. Concerning the GFET geometrical parameters, it is well known that the channel length is the main factor that determines the high-frequency limitations of a field-effect transistor, and is therefore the parameter that should be better controlled during the fabrication. Nevertheless, other parameters are affected by a fabrication-related tolerance; to understand to which extent an increase of the accuracy of the GFET layout patterning process steps can improve the performance uniformity, their impact on the GFET performance variability should be considered and compared to that of the channel length. In this work, we assess the impact of the fabrication-related tolerances of GFET-base amplifier geometrical parameters on the RF performance, in terms of the amplifier transit frequency and maximum oscillation frequency, by using a design-of-experiments approach.

Insight into Channel Conduction Mechanisms of 4H-SiC(0001) MOSFET Based on Temperature-Dependent Hall Effect Measurement

2020 ◽  
Vol 1004 ◽  
pp. 620-626
Author(s):  
Hironori Takeda ◽  
Mitsuru Sometani ◽  
Takuji Hosoi ◽  
Takayoshi Shimura ◽  
Hiroshi Yano ◽  
...  
Keyword(s):  
Hall Effect ◽  
Field Effect ◽  
Elevated Temperatures ◽  
Field Effect Transistors ◽  
Free Carrier ◽  
Oxide Semiconductor ◽  
Thermal Excitation ◽  
Temperature Dependent ◽  
Conduction Mechanisms ◽  
The Impact

Temperature-dependent Hall effect measurements were conducted to investigate the channel conduction mechanisms of 4H-SiC metal-oxide-semiconductor field-effect transistors (MOSFETs). This method allows us to discriminate the impact of the density of mobile (free) carriers in the inversion channels and their net mobility on the performance of SiC MOSFETs. It was found that, while the free carrier ratio of SiC MOSFETs with conventional gate oxides formed by dry oxidation is below 4% at 300 K, increasing the free carrier ratio due to thermal excitation of trapped electrons from SiO2/SiC interfaces leads to an unusual improvement in the field-effect mobility of SiC MOSFETs at elevated temperatures. Specifically, a significant increase in free carrier density surpasses the mobility degradation caused by phonon scattering for thermally grown SiO2/SiC interfaces. It was also found that, although nitrogen incorporation in SiO2/SiC interfaces increases the free carrier ratio typically up to around 30%, introduction of an additional scattering factor associated with interface nitridation compensates for the moderate amount of thermally generated mobile carriers at high temperatures, indicating a fundamental drawback of nitridation of SiO2/SiC interfaces. On the basis of these findings, we discuss the channel conduction mechanisms of SiC MOSFETs.

A New Approach to the Characteristics and Short-Channel Effects of Double-Gate Carbon Nanotube Field-Effect Transistors using MATLAB: A Numerical Study

2012 ◽  
Vol 67 (6-7) ◽  
pp. 317-326 ◽  
Author(s):  
Alireza Heidari ◽  
Niloofar Heidari ◽  
Foad Khademi Jahromi ◽  
Roozbeh Amiri ◽  
Mohammadali Ghorbani
Keyword(s):  
Carbon Nanotube ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Open Boundary ◽  
Double Gate ◽  
Short Channel Effects ◽  
Drain Voltage ◽  
Short Channel ◽  
Channel Effects ◽  
The Impact

In this paper, first, the impact of different gate arrangements on the short-channel effects of carbon nanotube field-effect transistors with doped source and drain with the self-consistent solution of the three-dimensional Poisson equation and the Schr¨odinger equation with open boundary conditions, within the non-equilibrium Green function, is investigated. The results indicate that the double-gate structure possesses a quasi-ideal subthreshold oscillation and an acceptable decrease in the drain induced barrier even for a relatively thick gate oxide (5 nm). Afterward, the electrical characteristics of the double-gate carbon nanotube field-effect transistors (DG-CNTFET) are investigated. The results demonstrate that an increase in diameter and density of the nanotubes in the DG-CNTFET increases the on-state current. Also, as the drain voltage increases, the off-state current of the DG-CNTFET decreases. In addition, regarding the negative gate voltages, for a high drain voltage, increasing in the drain current due to band-to-band tunnelling requires a larger negative gate voltage, and for a low drain voltage, resonant states appear

scholarly journals Quantum Treatment of Inelastic Interactions for the Modeling of Nanowire Field-Effect Transistors

Materials ◽  
2019 ◽  
Vol 13 (1) ◽  
pp. 60 ◽  
Author(s):  
Youseung Lee ◽  
Demetrio Logoteta ◽  
Nicolas Cavassilas ◽  
Michel Lannoo ◽  
Mathieu Luisier ◽  
...  
Keyword(s):  
Inelastic Scattering ◽  
Field Effect ◽  
Phonon Scattering ◽  
Field Effect Transistors ◽  
Order Approximation ◽  
Three Dimensional ◽  
Computational Time ◽  
Thermal Current ◽  
The Impact ◽  
Quantum Treatment

During the last decades, the Nonequilibrium Green’s function (NEGF) formalism has been proposed to develop nano-scaled device-simulation tools since it is especially convenient to deal with open device systems on a quantum-mechanical base and allows the treatment of inelastic scattering. In particular, it is able to account for inelastic effects on the electronic and thermal current, originating from the interactions of electron–phonon and phonon–phonon, respectively. However, the treatment of inelastic mechanisms within the NEGF framework usually relies on a numerically expensive scheme, implementing the self-consistent Born approximation (SCBA). In this article, we review an alternative approach, the so-called Lowest Order Approximation (LOA), which is realized by a rescaling technique and coupled with Padé approximants, to efficiently model inelastic scattering in nanostructures. Its main advantage is to provide a numerically efficient and physically meaningful quantum treatment of scattering processes. This approach is successfully applied to the three-dimensional (3D) atomistic quantum transport OMEN code to study the impact of electron–phonon and anharmonic phonon–phonon scattering in nanowire field-effect transistors. A reduction of the computational time by about ×6 for the electronic current and ×2 for the thermal current calculation is obtained. We also review the possibility to apply the first-order Richardson extrapolation to the Padé N/N − 1 sequence in order to accelerate the convergence of divergent LOA series. More in general, the reviewed approach shows the potentiality to significantly and systematically lighten the computational burden associated to the atomistic quantum simulations of dissipative transport in realistic 3D systems.

Modeling the impact of junction angles in tunnel field-effect transistors

2012 ◽  
Vol 69 ◽  
pp. 31-37 ◽  
Author(s):  
Kuo-Hsing Kao ◽  
Anne S. Verhulst ◽  
William G. Vandenberghe ◽  
Bart Sorée ◽  
Guido Groeseneken ◽  
...  
Keyword(s):  
Field Effect ◽  
Field Effect Transistors ◽  
The Impact

scholarly journals Nonlinearity Analysis of Quantum Capacitance and its Effect on Nano-Graphene Field Effect Transistor characteristics

2021 ◽  
Author(s):  
MUNINDRA MUNINDRA ◽  
DEVA NAND
Keyword(s):  
Field Effect ◽  
Field Effect Transistors ◽  
Drain Current ◽  
Charge Carrier Concentration ◽  
Single Layer Graphene ◽  
Quantum Capacitance ◽  
Large Area ◽  
Source Voltage ◽  
Current Calculation ◽  
The Impact

Abstract A simple, compact, and fundamental physics-based quasi-analytic model for Single layer graphene field effect transistors (GFETs) with large area graphene is presented in which the quantum mechanical density gradient method is utilised. The basic device physics of the two-dimensional (2D) graphene channel is studied analytically. This modeling leads to the precise drain current calculation of the GFETs. The drain current calculation for GFETs starts from charge carrier concentration, its density of states and quantum capacitance(QC). QC depends on the channel voltage as a function of gate to source voltage Vgs and drain to source voltage Vds primarily. The formulation of the drain current with velocity saturation has been done by the Monte Carlo simulation method. The performance of the analytical GFETs model is present the precise values of QC, its impact on drain current and transfer as well as output characteristics. The impact of QC at nanometer technology adds the nonlinearity to characteristics curves. The proposed method provides better results as compared with the previous analytical and simulated results.

Effect of dielectric surface passivation on organic field-effect transistors: spectral analysis of the density of trap-states

2021 ◽  
Vol 37 (1) ◽  
pp. 015015
Author(s):  
Yogesh Yadav ◽  
Samarendra Pratap Singh
Keyword(s):  
Contact Resistance ◽  
Field Effect ◽  
Surface Passivation ◽  
Field Effect Transistors ◽  
Contact Potential Difference ◽  
Dielectric Surface ◽  
Trap States ◽  
Organic Field Effect Transistors ◽  
The Impact ◽  
Lower Contact

Abstract The semiconductor/dielectric interface is arguably the most important region in field-effect transistors. This article investigates the performance-enhancing effects of passivation of the dielectric surface by a self-assembled layer (SAM) of silanes on organic field-effect transistors. Apart from conventional figures of merit for the devices, the energetic distribution of the density of the in-gap trap-states (trap-DOS) and the contact resistance are evaluated using numerical methods. The investigation reveals that the surface passivation of the dielectric SiO2 has a dual effect on device operation. Firstly, it establishes quantitatively that the surface passivation leads to a significant reduction in the density of both shallow and deep traps in the organic semiconductor PBTTT-C14. This effect outweighs the impact of the SAM dipoles on the device turn-on. Secondly, the contact resistance gets lowered by a factor of more than 10 due to the improved top-surface morphology of the PBTTT-C14 thin film. The lower contact resistance in devices is corroborated by lower contact potential difference between PBTTT-C14 and gold, measured using scanning kelvin probe microscopy.

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