scholarly journals Simulação analítica de espelhos de corrente utilizando associação série do transistores SOI MOSFET

2020 ◽  
Author(s):  
◽  
Paulo Rodrigues Silva
Keyword(s):  
Open Loop ◽  
Common Source ◽  
Model Parameters ◽  
Current Mirror ◽  
Soi Mosfet ◽  
Current Mirrors ◽  
Threshold Voltages ◽  
Analog Blocks ◽  
Self Cascode ◽  
Output Conductance

This work presents an analysis of the advantages of symmetric (S-SC) and asymmetric (A-SC) self-cascode associations of nMOSFETs in relation to a single transistor (ST) SOI MOSFET by means of analytical simulations of basic analog blocks. Besides presenting the characteristics of a single transistor amplifier, current mirrors with different architectures are studied. The study and evaluation of these analog blocks were performed based on electricals characteristics obtained from SPICE circuits simulations, using ICAP/4 software. Initially, model parameters were adjusted to fit experimental data, to ensure simulated devices characteristics similar to the real ones. After these adjustments, symmetric self-cascode (association of two transistors with identical threshold voltages) and asymmetric self-cascode (association of two transistors with different threshold voltages) of SOI nMOSFETs were simulated at device level. Electrical parameters such as drain current (IDS), transconductance (gm), output conductance (gD), Early voltage (VEA), open loop gain voltage and gm/IDS ratio are presented as a function of the voltage applied to single transistor terminals and composite device (symmetric and asymmetric associations) with different dimensions. Then, the series associations and the single transistors (ST) were used in current mirrors circuits in CommonSource and single transistor in Cascode and Wilson architectures to verify the composed structure performance. It has been verified that current mirror using association S-SC present electrical behavior similar to the current mirror formed by SOI MOSFET ST, with the same channel length. It has been observed that the association A-SC features better electric performance in relation to the S-SC and ST in common-source current mirror, as well, in relation to Cascode and Wilson architectures using single transistors, in week and moderate inversion regions, due to the better output conductance and, consequently, the higher Early voltage

scholarly journals Analysis of Current Mirrors with Asymmetric Self-Cascode Association of SOI MOSFETs through SPICE Simulations

2020 ◽  
Vol 15 (2) ◽  
pp. 1-5
Author(s):  
Paulo Rodrigues da Silva ◽  
Michelly De Souza
Keyword(s):  
Composite Structure ◽  
Common Source ◽  
Current Mirror ◽  
Output Resistance ◽  
Figures Of Merit ◽  
Current Mirrors ◽  
Source Current ◽  
The Common ◽  
Self Cascode ◽  
Asymmetric Configuration

In this paper the performance of different architectures of current mirrors implemented with single SOI transistors and self-cascode transistors, both symmetric and asymmetric is evaluated. A comparison of current mirrors figures of merit, looking for the advantages of the asymmetric composite structure in relation to a single SOI MOSFETs and the symmetric self-cascode transistor is performed. This analysis has been carried out through analytical simulations, using common-source, Cascode and Wilson current mirrors architectures. It is shown that asymmetric configuration can provide larger output resistance even in the common-source current mirror than other architectures with conventional single transistors.

scholarly journals Output Conductance of Line-TFETs for Different Device Parameters and its Effect on Basic Analog Circuits

2020 ◽  
Vol 15 (1) ◽  
pp. 1-7 ◽  
Author(s):  
Walter Gonçalez Filho ◽  
João Antonio Martino ◽  
Paula Ghedini Der Agopian
Keyword(s):  
Analog Circuits ◽  
Analog Circuit ◽  
Field Effect Transistors ◽  
Drain Current ◽  
Common Source ◽  
Gate Length ◽  
Current Mirrors ◽  
Conduction Mechanisms ◽  
The Impact ◽  
Output Conductance

This work addresses the impact of different device parameters on the analog characteristics of Line-Tunneling Field Effect Transistors (Line-TFETs). Source-to-drain separation, pocket thickness, pocket doping, gate-source alignment and the gate length are varied in order to evaluate their impact on the conduction mechanisms and on the overall transfer characteristics of the device. The variation of the main parameters responsible for device variability (pocket thickness and doping and gate-source alignment) is performed in order to analyze their impact on current mirrors, revealing that gate-source overlap improves the analog characteristics of the Line-TFET and that pocket doping should be limited to values smaller than 1018cm-3. Even though the drain current and the transconductance (gm) of this device are proportional to the gate area, simulations compared to experimental data show that the output conductance (gd) of Line-TFETs is practically independent of the gate length. The conduction mechanisms were analyzed through numerical simulations, revealing that this unique characteristic is due to source-to-drain tunneling, which defines the average value of gd on the saturation-like region and does not depend upon the gate length. The impact of this characteristic on analog circuit design is illustrated considering the example of a common-source stage and comparing its design when using MOSFET devices. This example reveals that the designer may choose whether to increase gm or gd in order to increase the circuit gain when using Line-TFETs, fundamentally differing from the MOSFET design.  

Design of a Low-Voltage Low-Power CMOS Operational Amplifier

2013 ◽  
Vol 380-384 ◽  
pp. 3283-3286
Author(s):  
Lin Hai Cui ◽  
Rui Xu ◽  
Zhan Peng Jiang ◽  
Chang Chun Dong
Keyword(s):  
Low Power ◽  
Operational Amplifier ◽  
High Efficiency ◽  
Low Voltage ◽  
Low Frequency ◽  
Open Loop ◽  
Common Source ◽  
Output Stage ◽  
Input Stage ◽  
Current Mirrors

A low voltage, low power two-stage operational amplifier (op-amp) was proposed in this paper. A folded-cascode structure is used in the input stage of the amplifier to get high gain. Current mirrors are used in the input stage to make the transconduotance constant. A simple push-pull common source amplifier is adopted as the output stage to take the advantages of its high efficiency. The experimental results show that the unity-gain bandwidth is 12.5MHz, the low-frequency open-loop voltage gain is 100dB,the phase margin is 65°, and power dissipation is 98.8μw.

scholarly journals Low-voltage, low-power and high gain cmosota using active positive feedback with feed forward and FDCM techniques

2002 ◽  
Vol 15 (1) ◽  
pp. 93-101
Author(s):  
Lyes Bouzerara ◽  
Tahar Belaroussi ◽  
Boualem Amirouche
Keyword(s):  
Positive Feedback ◽  
Low Voltage ◽  
Supply Voltage ◽  
Phase Margin ◽  
Current Mirror ◽  
Power Supply Voltage ◽  
Gain Bandwidth ◽  
Frequency Dependent ◽  
Feed Forward ◽  
Current Mirrors

A low voltage, high dc gain and wideband load compensated cas code operational transconductance amplifier (OTA), using an active positive feedback with feed forward technique and frequency-dependent current mirrors (FDCM), is presented and analyzed. Such techniques stand as a powerful method of gain bandwidth and phase margin enhancements. In this paper, a frequency-dependent current mirror, whose input impedance increases with frequency, is used to form the feed forward path at the input of the current mirror with a feed forward capacitor. By using these techniques, the gain bandwidth product of the amplifier is improved from 115 MHz to 194 MHz, the phase margin is also improved from 85? to 95? and the gain is enhanced from 11 dB to 93 dB. This amplifier operates at 2.5 V power supply voltage drives a capacitive load of 1pF and gives a power dissipation of 7 mW. The predicted performance is verified by simulations using HSPICE tool with 0.8 fim CMOS AMS parameters.

scholarly journals Current Mirror Circuits with Improved Performance

2012 ◽  
pp. 117-122
Author(s):  
Bajrang Bansal ◽  
Prabhat Ranjan ◽  
Himanshu Kaushik
Keyword(s):  
Signal Processing ◽  
Current Mirror ◽  
Processing Elements ◽  
Current Mirrors ◽  
Op Amps ◽  
Improved Performance ◽  
Almost All

Current mirrors are core structures for almost all analog mode circuits and are integral part of a signal processing elements like op amps. The performance of analog structures largely depends on their characteristics. In this paper we present some of the current mirror circuits and analyze their performances, so that one can choose a suitable current mirror for a particular application.

The Role of Different Sources of Uncertainty in Data Assimilation with Coupled Land Surface - Subsurface Models

2021 ◽  
Author(s):  
Eduardo Emilio Sanchez-Leon ◽  
Natascha Brandhorst ◽  
Bastian Waldowski ◽  
Ching Pui Hung ◽  
Insa Neuweiler ◽  
...  
Keyword(s):  
Plant Physiology ◽  
Data Assimilation ◽  
Land Surface ◽  
Reference Model ◽  
Land Surface Model ◽  
Open Loop ◽  
Surface Model ◽  
Model Parameters ◽  
Area Index ◽  
Sources Of Uncertainty

<p>The success of data assimilation systems strongly depends on the suitability of the generated ensembles. While in theory data assimilation should correct the states of an ensemble of models, especially if model parameters are included in the update, its effectiveness will depend on many factors, such as ensemble size, ensemble spread, and the proximity of the prior ensemble simulations to the data. In a previous study, we generated an ensemble-based data-assimilation framework to update model states and parameters of a coupled land surface-subsurface model. As simulation system we used the Terrestrial Systems Modeling Platform TerrSysMP, with the community land-surface model (CLM) coupled to the subsurface model Parflow. In this work, we used the previously generated ensemble to assess the effect of uncertain input forcings (i.e. precipitation), unknown subsurface parameterization, and/or plant physiology in data assimilation. The model domain covers a rectangular area of 1×5km<sup>2</sup>, with a uniform depth of 50m. The subsurface material is divided into four units, and the top soil layers consist of three different soil types with different vegetation. Streams are defined along three of the four boundaries of the domain. For data assimilation, we used the TerrsysMP PDAF framework. We defined a series of data assimilation experiments in which sources of uncertainty were considered individually, and all additional settings of the ensemble members matched those of the reference. To evaluate the effect of all sources of uncertainty combined, we designed an additional test in which the input forcings, subsurface parameters, and the leaf area index of the ensemble were all perturbed. In all these tests, the reference model had homogenous subsurface units and the same grid resolution as all models of the ensemble. We used point measurements of soil moisture in all data assimilation experiments. We concluded that precipitation dominates the dynamics of the simulations, and perturbing the precipitation fields for the ensemble have a major impact in the performance of the assimilation. Still, considerable improvements are observed compared to open-loop simulations. In contrast, the effect of variable plant physiology was minimal, with no visible improvement in relevant fluxes such as evapotranspiration. As expected, improved ensemble predictions are propagated longer in time when parameters are included in the update.</p>

Development of a 300°C capable SiC based operational amplifier

2010 ◽  
Vol 2010 (HITEC) ◽  
pp. 000305-000309 ◽  
Author(s):  
Vinayak Tilak ◽  
Cheng-Po Chen ◽  
Peter Losee ◽  
Emad Andarawis ◽  
Zachary Stum
Keyword(s):  
Silicon Carbide ◽  
High Temperature ◽  
Operational Amplifier ◽  
Room Temperature ◽  
Open Loop ◽  
Common Source ◽  
Loop Gain ◽  
Long Term Stability ◽  
Silicon Silicon

Silicon carbide based ICs have the potential to operate at temperatures exceeding that of conventional semiconductors such as silicon. Silicon carbide (SiC) based MOSFETs and ICs were fabricated and measured at room temperature and 300°C. A common source amplifier was fabricated and tested at room temperature and high temperature. The gain at room temperature and high temperature was 7.6 and 6.8 respectively. A SiC MOSFET based operational amplifier was also fabricated and tested at room temperature and 300°C. The small signal open loop gain at 1kHz was 60 dB at room temperature and 57 dB at 300°C. Long term stability testing at 300°C of the MOSFET and common source amplifiers showed very little drift.

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