Device Fabrication and Challenges

2015 ◽  
Vol 135 (8) ◽  
pp. 549-553 ◽  
Author(s):  
Sommawan Khumpuang ◽  
Shiro HARA
Keyword(s):  
Device Fabrication

Structural changes in silicon-on-insulator material during post-implantation annealing

1986 ◽  
Vol 44 ◽  
pp. 736-737
Author(s):  
C. O. Jung ◽  
S. J. Krause ◽  
S.R. Wilson
Keyword(s):  
Integrated Circuits ◽  
Oxide Layer ◽  
High Speed ◽  
Structural Changes ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
High Quality ◽  
Radiation Hardened ◽  
Post Implantation ◽  
Very High

Silicon-on-insulator (SOI) structures have excellent potential for future use in radiation hardened and high speed integrated circuits. For device fabrication in SOI material a high quality superficial Si layer above a buried oxide layer is required. Recently, Celler et al. reported that post-implantation annealing of oxygen implanted SOI at very high temperatures would eliminate virtually all defects and precipiates in the superficial Si layer. In this work we are reporting on the effect of three different post implantation annealing cycles on the structure of oxygen implanted SOI samples which were implanted under the same conditions.

Analysis of Silicon-On-Insulator Structures Formed By Oxygen Ion Implantation

1985 ◽  
Vol 43 ◽  
pp. 300-301
Author(s):  
N. Lewis ◽  
E. L. Hall ◽  
A. Mogro-Campero ◽  
R. P. Love
Keyword(s):  
Ion Implantation ◽  
Single Crystal ◽  
Single Crystal Silicon ◽  
Silicon Layer ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
High Dose ◽  
Crystal Silicon ◽  
Oxygen Ion ◽  
Oxygen Ion Implantation

The formation of buried oxide structures in single crystal silicon by high-dose oxygen ion implantation has received considerable attention recently for applications in advanced electronic device fabrication. This process is performed in a vacuum, and under the proper implantation conditions results in a silicon-on-insulator (SOI) structure with a top single crystal silicon layer on an amorphous silicon dioxide layer. The top Si layer has the same orientation as the silicon substrate. The quality of the outermost portion of the Si top layer is important in device fabrication since it either can be used directly to build devices, or epitaxial Si may be grown on this layer. Therefore, careful characterization of the results of the ion implantation process is essential.

Effects of substrate quality and annealing on defect structures at GaAs/Si interfaces

1987 ◽  
Vol 45 ◽  
pp. 340-341
Author(s):  
H. L. Tsai ◽  
J. W. Lee
Keyword(s):  
Growth Process ◽  
Molecular Beam ◽  
Substrate Surface ◽  
Lattice Misfit ◽  
Device Fabrication ◽  
Silicon Substrates ◽  
Defect Structures ◽  
Gaas Film ◽  
Substrate Quality ◽  
Gaas On Si

Growth of GaAs on Si using epitaxial techniques has been receiving considerable attention for its potential application in device fabrication. However, because of the 4% lattice misfit between GaAs and Si, defect generation at the GaAs/Si interface and its propagation to the top portion of the GaAs film occur during the growth process. The performance of a device fabricated in the GaAs-on-Si film can be degraded because of the presence of these defects. This paper describes a HREM study of the effects of both the substrate surface quality and postannealing on the defect propagation and elimination.The silicon substrates used for this work were 3-4 degrees off [100] orientation. GaAs was grown on the silicon substrate by molecular beam epitaxy (MBE).

Tem analysis of multiple-energy arsenic implanted and Rta'd silicon

1987 ◽  
Vol 45 ◽  
pp. 246-247
Author(s):  
R.A. Herring
Keyword(s):  
Device Fabrication ◽  
High Concentration ◽  
Tem Analysis ◽  
Defect Clusters ◽  
High Fluences ◽  
Small Defect ◽  
Before And After ◽  
The Matrix ◽  
The Difference ◽  
Factor Type

Rapid thermal annealing (RTA) of ion-implanted Si is important for device fabrication. The defect structures of 2.5, 4.0, and 6.0 MeV As-implanted silicon irradiated to fluences of 2E14, 4E14, and 6E14, respectively, have been analyzed by electron diffraction both before and after RTA at 1100°C for 10 seconds. At such high fluences and energies the implanted As ions change the Si from crystalline to amorphous. Three distinct amorphous regions emerge due to the three implantation energies used (Fig. 1). The amorphous regions are separated from each other by crystalline Si (marked L1, L2, and L3 in Fig. 1) which contains a high concentration of small defect clusters. The small defect clusters were similar to what had been determined earlier as being amorphous zones since their contrast was principally of the structure-factor type that arises due to the difference in extinction distance between the matrix and damage regions.

Behavior of contact-silicided TFSOI gate structures

1994 ◽  
Vol 52 ◽  
pp. 860-861
Author(s):  
N. David Theodore ◽  
Juergen Foerstner ◽  
Peter Fejes
Keyword(s):  
Semiconductor Device ◽  
Series Resistance ◽  
Field Effect Transistors ◽  
Silicon Layer ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
Continuous Layer ◽  
Buried Oxide ◽  
Device Structures ◽  
Thin Silicon

As semiconductor device dimensions shrink and packing-densities rise, issues of parasitic capacitance and circuit speed become increasingly important. The use of thin-film silicon-on-insulator (TFSOI) substrates for device fabrication is being explored in order to increase switching speeds. One version of TFSOI being explored for device fabrication is SIMOX (Silicon-separation by Implanted OXygen).A buried oxide layer is created by highdose oxygen implantation into silicon wafers followed by annealing to cause coalescence of oxide regions into a continuous layer. A thin silicon layer remains above the buried oxide (~220 nm Si after additional thinning). Device structures can now be fabricated upon this thin silicon layer.Current fabrication of metal-oxidesemiconductor field-effect transistors (MOSFETs) requires formation of a polysilicon/oxide gate between source and drain regions. Contact to the source/drain and gate regions is typically made by use of TiSi2 layers followedby Al(Cu) metal lines. TiSi2 has a relatively low contact resistance and reduces the series resistance of both source/drain as well as gate regions

Microstructure of sputter deposited Ni-Sb ohmic contacts on GaAs

1989 ◽  
Vol 47 ◽  
pp. 450-451
Author(s):  
S. Yegnasubramanian ◽  
V.C. Kannan ◽  
R. Dutto ◽  
P.J. Sakach
Keyword(s):  
High Performance ◽  
Ohmic Contacts ◽  
Surface Defects ◽  
Pure Metal ◽  
Device Fabrication ◽  
Native Oxide ◽  
Metal Thin Films ◽  
Recent Developments ◽  
Different Temperatures ◽  
Sputter Deposited

Recent developments in the fabrication of high performance GaAs devices impose crucial requirements of low resistance ohmic contacts with excellent contact properties such as, thermal stability, contact resistivity, contact depth, Schottky barrier height etc. The nature of the interface plays an important role in the stability of the contacts due to problems associated with interdiffusion and compound formation at the interface during device fabrication. Contacts of pure metal thin films on GaAs are not desirable due to the presence of the native oxide and surface defects at the interface. Nickel has been used as a contact metal on GaAs and has been found to be reactive at low temperatures. Formation Of Ni2 GaAs at 200 - 350C is reported and is found to grow epitaxially on (001) and on (111) GaAs, but is shown to be unstable at 450C. This paper reports the investigations carried out to understand the microstructure, nature of the interface and composition of sputter deposited and annealed (at different temperatures) Ni-Sb ohmic contacts on GaAs by TEM. Attempts were made to correlate the electrical properties of the films such as the sheet resistance and contact resistance, with the microstructure. The observations are corroborated by Scanning Auger Microprobe (SAM) investigations.

An Overview of 300 mm SOI Starting Wafer Quality and Its Yield Detractors

2005 ◽  
Author(s):  
Pei Y. Tsai ◽  
Junedong Lee ◽  
Paul Ronsheim ◽  
Lindsay Burns ◽  
Richard Murphy ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Device Fabrication ◽  
Sampling Plan ◽  
Silicon On Insulator ◽  
Manufacturing Processes ◽  
Circuit Performance ◽  
Characterization Techniques ◽  
Wafer Manufacturing

Abstract A stringent sampling plan is developed to monitor and improve the quality of 300mm SOI (silicon on insulator) starting wafers procured from the suppliers. The ultimate goal is to obtain the defect free wafers for device fabrication and increase yield and circuit performance of the semiconductor integrated circuits. This paper presents various characterization techniques for QC monitor and examples of the typical defects attributed to wafer manufacturing processes.

Graphene Oxide and Its Derivatives: Their Synthesis and Use in Organic Synthesis

2019 ◽  
Vol 23 (2) ◽  
pp. 188-204 ◽  
Author(s):  
Xiangjun Peng ◽  
Xianyun Xu ◽  
Fujiang Huang ◽  
Qian Liu ◽  
Liangxian Liu
Keyword(s):  
Graphene Oxide ◽  
Carbon Materials ◽  
Device Fabrication ◽  
Organic Reactions ◽  
Bond Forming ◽  
Bond Forming Reactions ◽  
Modern Physics ◽  
Recent Developments ◽  
Optical And Mechanical Properties ◽  
Nitrogen Double Bond

Since Geim and co-workers reported their groundbreaking experiments on graphene, research on graphene oxide (GO) and its derivatives has greatly influenced the field of modern physics, chemistry, device fabrication, material science, and nanotechnology. The unique structure and fascinating properties of these carbon materials can be ascribed to their eminent chemical, electronic, electrochemical, optical, and mechanical properties of GO and its derivatives, particularly compared to other carbon allotropes. The present Review aims to provide an overview on the recent developments in the preparation of GO and its derivatives and their applications in organic reactions. We will first outline the synthesis of GO and its derivatives. Then, we will discuss the major sections about their application as stoichiometric and catalytic oxidants in organic reactions, a particular emphasis on the carbon-carbon, carbon-oxygen, and carbon-nitrogen single bond-forming reactions, as well as carbon-oxygen and carbon-nitrogen double bond-forming reactions. Simultaneously, this Review also describes briefly transition metal supported on GO or its derivatives as a catalyst for organic reaction. Lastly, we will present an outlook of potential areas where GO and its derivatives may be expected to find utility or opportunity for further growth and study.

Robust n/sup +//p/sup +/ dual-gate cmos device fabrication using dopant drive-out technique

2005 ◽  
Author(s):  
D.C.H. Yu ◽  
K.H. Lee ◽  
A. Kornblit ◽  
C.C. Fu ◽  
R.H. Yan ◽  
...  
Keyword(s):  
Device Fabrication ◽  
Dual Gate

Sol–gel magnetite inks for inkjet printing

2019 ◽  
Vol 7 (21) ◽  
pp. 6426-6432 ◽  
Author(s):  
Denis S. Kolchanov ◽  
Vladislav Slabov ◽  
Kirill Keller ◽  
Ekaterina Sergeeva ◽  
Mikhail V. Zhukov ◽  
...  
Keyword(s):  
Inkjet Printing ◽  
Sol Gel ◽  
Device Fabrication ◽  
Magnetic Device ◽  
Magnetic Structures

The article describes an easy-to-implement and print-ready composition for inkjet printing of magnetic structures, which can be used for security printing, coding, and marking, magnetic device fabrication or creation of micro-antennas.

Sign in / Sign up

Export Citation Format

Share Document