Study of CoSix Spike Leakage for 0.1-um CMOS

2000 ◽  
Vol 611 ◽  
Author(s):  
Ken-ichi Goto
Keyword(s):  
Leakage Current ◽  
Process Conditions ◽  
Si Substrate ◽  
Leakage Currents ◽  
Junction Area ◽  
Atom Diffusion ◽  
Silicide Film ◽  
Leakage Model ◽  
Leakage Mechanism ◽  
Ultra Shallow Junctions

ABSTRACTWe have clarified a new leakage mechanism in Co salicide process for the ultra-shallow junctions of 0.1-um CMOS devices and revealed the optimum Co salicide process conditions for minimizing the leakage current. We found that leakage currents generate from many localized points that are randomly distributed in the junction area, and not from the junction edge. We successfully verified our localized leakage model using Monte Carlo simulation. We identified abnormal CoSix spiking growth under the Co silicide film, as being the origin of the localized leakage current. These CoSix spikes grow rapidly only during annealing between 400°C and 450°C when Co2Si phase is formed. These spikes never grow during annealing at over 500°C, and decrease with high temperature annealing over 500°C. A minimum leakage current can be achieved by optimized annealing at between 800°C and 850°C for 30 sec. This is because a trade-off between reducing the CoSix spikes and preventing the Co atom diffusion from Co silicide film to Si substrate, which begins at annealing above 900°C.

Device Characteristics of Ultra-shallow Junctions Formed by fRTP Annealing

2004 ◽  
Vol 810 ◽  
Author(s):  
A. Satta ◽  
R. Lindsay ◽  
S. Severi ◽  
K. Henson ◽  
K. Maex ◽  
...  
Keyword(s):  
Thermal Processing ◽  
Wafer Surface ◽  
Process Conditions ◽  
Device Performance ◽  
Correct Process ◽  
Leakage Currents ◽  
Dopant Activation ◽  
Junction Formation ◽  
Ultra Shallow Junctions ◽  
Limited Diffusion

ABSTRACTThe creation of ultra-shallow junction for CMOS devices at the sub-100 nm node is driving significant efforts in developing thermal processing to give rise to high dopant activation in combination with limited diffusion. Flash-assist Rapid Thermal Annealing™ (fRTP™) is a promising new annealing technique, which involves the heating of the bulk of the wafer to an intermediate temperature using rather conventional spike RTP, followed by a short and intense pulse of light localized on the implanted wafer surface.In this work, we have systematically investigated the junction formation of different implants under fRTP anneals in terms of profile and devices. Co-implanted Ge and F species provide more box-like profiles with improved activation. Although leakage currents are higher for fRTP-annealed junctions than for spike-annealed junctions, appropriate fRTP process parameters and correct process conditions provide a critical tool to control and reduce the leakage current of co-implanted fRTP junctions to acceptable levels. Proper implant and anneal are requested for minimizing pattern effect and improving device performance.

APPLICATION OF EPITAXIAL UNIPOLAR BARRIERS TO REDUCE NOISE CURRENTS IN PHOTODETECTORS

2011 ◽  
Vol 20 (03) ◽  
pp. 557-564
Author(s):  
G. R. SAVICH ◽  
J. R. PEDRAZZANI ◽  
S. MAIMON ◽  
G. W. WICKS
Keyword(s):  
Leakage Current ◽  
Surface Passivation ◽  
Leakage Currents ◽  
Type Region ◽  
Surface Leakage Current ◽  
Unipolar Barrier ◽  
Trap Assisted Tunneling ◽  
Assisted Tunneling ◽  
Tunneling Currents ◽  
Surface Leakage

Tunneling currents and surface leakage currents are both contributors to the overall dark current which limits many semiconductor devices. Surface leakage current is generally controlled by applying a post-epitaxial passivation layer; however, surface passivation is often expensive and ineffective. Band-to-band and trap assisted tunneling currents cannot be controlled through surface passivants, thus an alternative means of control is necessary. Unipolar barriers, when appropriately applied to standard electronic device structures, can reduce the effects of both surface leakage and tunneling currents more easily and cost effectively than other methods, including surface passivation. Unipolar barriers are applied to the p -type region of a conventional, MBE grown, InAs based pn junction structures resulting in a reduction of surface leakage current. Placing the unipolar barrier in the n -type region of the device, has the added benefit of reducing trap assisted tunneling current as well as surface leakage currents. Conventional, InAs pn junctions are shown to exhibit surface leakage current while unipolar barrier photodiodes show no detectable surface currents.

Protection of railway infrastructure objects against electrical corrosion

2021 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Liudmyla Trykoz ◽  
Svetlana Kamchatnaya ◽  
Dmytro Borodin ◽  
Armen Atynian ◽  
Roman Tkachenko
Keyword(s):  
Leakage Current ◽  
Electrical Resistance ◽  
Electrical Current ◽  
Leakage Currents ◽  
Destructive Effect ◽  
Accelerated Corrosion ◽  
Content Type ◽  
Pedestrian Bridges ◽  
Railway Infrastructure ◽  
Bridge Structures

Purpose The purpose of this paper is to develop a technological method of protection against electrical corrosion. One more way to protect the objects is to prevent the electrical current from getting to them. For example, railway objects are surrounded with a material with raised electrical resistance. Design/methodology/approach The railway infrastructure objects (foundations, contact-line supports, reinforced concrete sub-bases, bridge structures, pipelines of engineering networks, supports of passenger platforms and pedestrian bridges, concrete plinth walls of station buildings) are subjected to destruction due to the action of electrical current. One of destruction factors is a corrosion of the concrete constructions which is caused by the leakage current action. Findings Leakage currents and stray currents bypass the structure of supports of high passenger platforms or pipes of engineering networks. These currents spread by the line with the least resistance outside of the structures. Research limitations/implications Electrical leakage current from the rails gets into such structures through sleepers, ballast and soil and leads to accelerated corrosion leaching of concrete. Practical implications The constructions are protected against the destructive effect of electrical corrosion on the metal or concrete of the structure. This scheme is suitable for the construction and reconstruction of railway structures which operate on electrified sections of railways. Originality/value Schemes of technological solution are proposed for protection of foundations, supports of high passenger platforms, pipelines of engineering networks, etc. For this, the arrangement of soil-contained screens with big electrical resistance is suggested.

scholarly journals KLECTOR: Design of Low Power Static Random-Access Memory Architecture with reduced Leakage Current

2021 ◽  
Author(s):  
Ananth Kumar Tamilarasan ◽  
Darwin Sundarapandi Edward ◽  
Arun Samuel Thankamony Sarasam
Keyword(s):  
Leakage Current ◽  
Random Access ◽  
Static Random Access Memory ◽  
Memory Architecture ◽  
Access Memory ◽  
Leakage Currents ◽  
Output Node ◽  
Voltage Drops ◽  
Novel Approach ◽  
Standby Mode

Abstract A novel approach called Keeper in LEakage Control Transistor (KLECTOR) is presented in this paper to reduce leakage currents in SRAM architecture. The SRAM is significantly affected by the leakage current during the "standby mode", which is caused by the fabric which has a lower threshold voltage. KLECTOR circuit employs less power consumption by restricting the flow of current through devices of less voltage drops and relies heavily on the self-controlled transistor at the output node. It has been found from the presented results that static (leakage) power in the write operation is reduced to 63% and 69 % for the read operation. This proposed approach is designed and simulated using the Virtuoso, Cadence EDA tool.

scholarly journals Studi Pola Arus Bocor Isolator Keramik Selama Waktu Pemakaian 24 Jam

2020 ◽  
Vol 3 (3) ◽  
Author(s):  
Dini Fauziah ◽  
Waluyo Waluyo ◽  
Ismail Muhammad Khaidir
Keyword(s):  
Ambient Temperature ◽  
Electric Power ◽  
Leakage Current ◽  
Distribution System ◽  
Power Transmission ◽  
Current Data ◽  
Electric Power System ◽  
Leakage Currents ◽  
Ceramic Insulator ◽  
Distribution System Reliability

ABSTRAK Isolator merupakan komponen yang penting dijaga keandalannya dalam sistem transmisi dan distribusi tenaga listrik. Isolator rentan mengalami kegagalan akibat lingkungan, karena terpapar langsung kondisi dimana isolator tersebut terpasang. Salah satu jenis isolator yang sering digunakan adalah bahan keramik, dimana memiliki kelebihan diantaranya kekuatan mekanik yang cukup handal. Namun kekurangan isolator jenis ini adalah sifat permukaannya yang hidrofilik, yaitu mudah menyerap air sehingga bila digunakan pada kelembaban tinggi cenderung memicu timbulnya arus bocor. Arus bocor merupakan parameter penting pada isolator karena sering menjadi penyebab kegagalan isolator. Untuk mengetahui seberapa besar pengaruh kondisi lingkungan terhadap arus bocor, dilakukan pengujian terhadap isolator keramik dalam waktu 24 jam. Data arus bocor diambil setiap 3 jam untuk melihat perubahannya berdasarkan perubahan kelembaban, dan suhu lingkungan. Hasilnya didapat bahwa semakin tinggi kelembaban udara, dan semakin rendah suhu lingkungan maka arus bocor semakin tinggi. Hasil penelitian ini dapat dijadikan acuan untuk mengantisipasi kegagalan isolator keramik akibat arus bocor sehingga keandalan sistem tenaga listrik dapat terjaga. Kata kunci: Isolator keramik, Lingkungan, Kelembaban, Suhu. ABSTRACT Isolator is an important component that must be maintained to keep electric power transmission and distribution system reliability. Isolators are susceptible to failure due to the environment, because they are directly exposed to conditions where the insulator installed. Ceramic insulator is one type of isolator that is often used, which has advantages including mechanical strength that is quite reliable. However, the lack of this type of isolator is its hydrophilic surface, which is easy to absorb water so that when used at high humidity tends to trigger a leakage current. Leakage current is an important parameter in an insulator because it can be a cause due to insulator failure. To find out how environmental conditions impact on leakage currents along day, a ceramic isolator is tested within 24 hours. Leakage current data is taken every 3 hours to see the changes based on changes in humidity, and ambient temperature. The result is the higher humidity of the air, and the lower ambient temperature, can make insulator leakage current rise up. The results of this study can be used as a reference to anticipate the failure of ceramic insulators due to leakage currents so that the reliability of the electric power system can be maintained. Keywords: ceramic insulator, environtment, humidity, temperature.

Electrical Characteristics of Large Chip-Size 3.3 kV SiC-JBS Diodes

2013 ◽  
Vol 740-742 ◽  
pp. 881-886 ◽  
Author(s):  
Hiroyuki Okino ◽  
Norifumi Kameshiro ◽  
Kumiko Konishi ◽  
Naomi Inada ◽  
Kazuhiro Mochizuki ◽  
...  
Keyword(s):  
Electric Field ◽  
Schottky Barrier ◽  
Leakage Current ◽  
Reverse Current ◽  
Tunneling Current ◽  
Leakage Currents ◽  
Reverse Leakage Current ◽  
Low Leakage ◽  
Chip Size ◽  
Barrier Metal

The reduction of reverse leakage currents was attempted to fabricate 4H-SiC diodes with large current capacity for high voltage applications. Firstly diodes with Schottky metal of titanium (Ti) with active areas of 2.6 mm2 were fabricated to investigate the mechanisms of reverse leakage currents. The reverse current of a Ti Schottky barrier diode (SBD) is well explained by the tunneling current through the Schottky barrier. Then, the effects of Schottky barrier height and electric field on the reverse currents were investigated. The high Schottky barrier metal of nickel (Ni) effectively reduced the reverse leakage current to 2 x 10-3 times that of the Ti SBD. The suppression of the electric field at the Schottky junction by applying a junction barrier Schottky (JBS) structure reduced the reverse leakage current to 10-2 times that of the Ni SBD. JBS structure with high Schottky barrier metal of Ni was applied to fabricate large chip-size SiC diodes and we achieved 30 A- and 75 A-diodes with low leakage current and high breakdown voltage of 4 kV.

High-κ Insulator Thin Films and Retention Properties of MFIS Diodes

2011 ◽  
Vol 1345 ◽  
Author(s):  
Yichun Zhou
Keyword(s):  
Thin Films ◽  
Leakage Current ◽  
High Speed ◽  
Random Access ◽  
Ferroelectric Thin Film ◽  
Buffer Layers ◽  
Interface Properties ◽  
Si Substrate ◽  
Device Structure ◽  
Low Leakage

ABSTRACTFerroelectric field effect transistor (FFET) is a promising candidate for non-volatile random access memory because of its high speed, single device structure, low power consumption, and nondestructive read-out operation. Currently, however, such ideal devices are commercially not available due to poor interface properties between ferroelectric film and Si substrate, such as leakage current and interdiffusion etc. So we choose YSZ and HfO2 insulating thin films as buffer layer due to they possess relatively high dielectric constant, high thermal stability, low leakage current, and good interface property with Si substrates. Two structural diodes of Pt/BNT/YSZ/Si and Pt/SBT/HfO2/Si were fabricated, and the microstructures, interface properties, C-V, I-V, and retention properties were investigated in detail. Experimental results show that the fabricated diodes exhibit excellent long-term retention properties, which is due to the good interface and the low leakage density, demonstrating that the YSZ and HfO2 buffer layers are playing a critical modulation role between the ferroelectric thin film and Si substrate.

scholarly journals Leakage Current Conduction Mechanism of Au-Pt-Ti/ HfO2-Al2O3/n-InAlAs Metal-Oxide-Semiconductor Capacitor under Reverse-Biased Condition

Coatings ◽  
2019 ◽  
Vol 9 (11) ◽  
pp. 720
Author(s):  
He Guan ◽  
Shaoxi Wang
Keyword(s):  
Metal Oxide ◽  
Leakage Current ◽  
Photoelectron Spectroscopy ◽  
Metal Oxide Semiconductor ◽  
Schottky Emission ◽  
Oxide Semiconductor ◽  
Optimized Design ◽  
Mos Capacitors ◽  
Leakage Mechanism ◽  
High K

Au-Pt-Ti/high-k/n-InAlAs metal-oxide-semiconductor (MOS) capacitors with HfO2-Al2O3 laminated dielectric were fabricated. We found that a Schottky emission leakage mechanism dominates the low bias conditions and Fowler–Nordheim tunneling became the main leakage mechanism at high fields with reverse biased condition. The sample with HfO2 (4 m)/Al2O3 (8 nm) laminated dielectric shows a high barrier height ϕB of 1.66 eV at 30 °C which was extracted from the Schottky emission mechanism, and this can be explained by fewer In–O and As–O states on the interface, as detected by the X-ray photoelectron spectroscopy test. These effects result in HfO2 (4 m)/Al2O3 (8 nm)/n-InAlAs MOS-capacitors presenting a low leakage current density of below 1.8 × 10−7 A/cm2 from −3 to 0 V at 30 °C. It is demonstrated that the HfO2/Al2O3 laminated dielectric with a thicker Al2O3 film of 8 nm is an optimized design to be the high-k dielectric used in Au-Pt-Ti/HfO2-Al2O3/InAlAs MOS capacitor applications.

Rapid Thermal Annealing of Ion Implanted p-n Junction in Silicon

1985 ◽  
Vol 52 ◽  
Author(s):  
C. Ho ◽  
R. Kwor ◽  
C. Araujo ◽  
J. Gelpey
Keyword(s):  
Leakage Current ◽  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Dwell Time ◽  
Annealing Temperature ◽  
Current Analysis ◽  
Junction Depth ◽  
Leakage Currents ◽  
Dopant Activation ◽  
Secondary Ion

ABSTRACTThe rapid thermal annealing (RTA) of p+n and n+p diodes, fabricated by the LOCOS process, and its subsequent effects on junction leakage current, junction depth and dopant activation were investigated. The reverse bias diode leakage currents of implanted Si <100> samples (As+: 60 KeY, 5×1014 5×1015 cm−2, B+: 25 KeV, l×1014, l×1015 cm−2 and BF2+: 45 KeV, 1×1015cm−2 ) were measured as functions of annealing temperature, and dwell time. The annealing was performed using an Eaton RTA system (Nova ROA-400) at temperatures ranging from 950 °C to 1150 °C. Annealing times ranged from 0.2 sec. to 10 sec. The results from the diode leakage current analysis are correlated with those from Secondary Ion Mass Spectroscopy (SIMS) and differential Hall measurements. The reverse-biased leakage currents from the RTA-treated samples are compared with those from furnace-annealed samples.

scholarly journals Reduction EMI of BLDC Motor Drive Based on Software Analysis

2016 ◽  
Vol 2016 ◽  
pp. 1-9 ◽  
Author(s):  
Navid Mousavi ◽  
Tohid Rahimi ◽  
Homayoun Meshgin Kelk
Keyword(s):  
Leakage Current ◽  
High Frequency ◽  
Common Ground ◽  
Motor Drive ◽  
Electronic Systems ◽  
Bldc Motor ◽  
Leakage Currents ◽  
Software Analysis ◽  
Frequency Components ◽  
Motor Drive System

In the BLDC motor-drive system, the leakage current from a motor to a ground network and existence of high-frequency components of the DC link current are the most important factors that cause conducting interference. The leakage currents of the motors, flow through common ground, will interfere with other equipment because of the high density of electrical and electronic systems in the spacecraft and aircrafts. Moreover, generally there are common DC buses in the mentioned systems, which aggravate the problem. Function of the electric motor causes appearance of the high-frequency components in the DC link current, which can interfere with other subsystems. In this paper, the analysis of electromagnetic noise and presentation of the proposed method based on the frequency spectrum of the DC link current and the leakage current from the motor to the ground network are done. The proposed method presents a new process based on the filtering method to overcome EMI. To cover the requirement analysis, the Maxwell software is used.

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