Thin Wafer Handling Using Mechanical- or Laser-Debondable Temporary Adhesives

2015 ◽  
Vol 2015 (DPC) ◽  
pp. 000419-000441 ◽  
Author(s):  
David Fleming ◽  
Jong-Uk Kim ◽  
Janet Okada ◽  
Kevin Wang ◽  
Michael Gallagher ◽  
...  
Keyword(s):  
Wafer Bonding ◽  
Room Temperature ◽  
High Volume ◽  
Laser Source ◽  
Clean Room ◽  
Sensitive Layer ◽  
Adhesive Film ◽  
Device Structures ◽  
Carrier Wafer ◽  
Wafer Thinning

The development of adhesives that enable handling, processing, and assembly of thin wafers and die is a key technical challenge for the realization of 3D devices. We will present on temporary adhesive technology for processing of thinned wafers that is amenable to either mechanical or laser-assisted debonding that can occur at room temperature. Temporary wafer bonding has emerged as the method of choice for handling silicon wafers during the thinning and high-temperature backside processing required for the manufacture of 3D device structures. Among the requirements for temporary wafer bonding materials to be used in high volume manufacturing are simple device and carrier wafer preparation, high-throughput wafer bonding, thermal stability to 300 °C or higher, and clean room-temperature release directly from the device wafer using either mechanical or laser-assisted debonding We will present successful temporary wafer bonding using a BCB (benzocyclobutene)-based material that can meet these requirements. The mode of adhesive release from a device wafer will be discussed in detail as it relates to wafer thinning and handling, and material physical properties and resistances will be expressed. Formulation requirements needed for successful debonding will be presented, with an emphasis on a laser-debonding scheme that utilizes either a 248nm or 308nm laser source capable of ablating a laser sensitive layer residing between a glass carrier and the temporary wafer bonding material. Successful room temperature tape-peeling of the adhesive film after ablation and carrier removal will be discussed.

Temporary and Permanent Adhesives for Thin Wafer Handling and Assembly

2013 ◽  
Vol 2013 (DPC) ◽  
pp. 001009-001032
Author(s):  
Mark Oliver ◽  
Jong-Uk Kim ◽  
Michael Gallagher ◽  
Zidong Wang ◽  
Janet Okada ◽  
...  
Keyword(s):  
Wafer Bonding ◽  
Spin Coating ◽  
Bonding Temperature ◽  
High Volume ◽  
Wafer Surface ◽  
Process Time ◽  
Adhesion Promoter ◽  
Excellent Thermal Stability ◽  
Carrier Wafer ◽  
Bonding Technology

Temporary wafer bonding has emerged as the method of choice for handling silicon wafers during the thinning and high-temperature backside processing required for the manufacture of 3D device structures. Among the requirements for temporary wafer bonding materials to be used in high volume manufacturing are simple device and carrier wafer preparation, high-throughput wafer bonding, excellent thermal stability, and clean room-temperature release directly from the device wafer. We will present successful temporary wafer bonding using a new BCB (benzocyclobutene)-based material that can meet these requirements. For this temporary wafer bonding technology, wafer preparation involves spin coating the device wafer with the BCB-based adhesive to a thickness of up to 100 μm and spin coating the carrier wafer with an adhesion promoter. The wafers can then be bonded at temperatures as low as 80 °C for as short as 30 seconds. The low bonding temperature means the wafers can be loaded into a preheated wafer bonding tool, eliminating the time needed to heat and cool the bonding chucks during the bonding cycle. Also, no curing of the material is required during the bonding, enabling a short process time and high wafer throughput. Curing of the adhesive is done as a batch oven cure at 210 °C for one hour after which the material is stable enough for backside processes up to 300 °C. The material has been designed to adhere well to the carrier wafer and debond directly from the device wafer without any chemical or radiation pretreatment, leaving a clean device wafer surface in need of only mild cleaning before further processing.

Advanced Thin Wafer Support Processes for Temporary Wafer Bonding

2010 ◽  
Vol 2010 (1) ◽  
pp. 000361-000363 ◽  
Author(s):  
Jeremy McCutcheon ◽  
Dongshun Bai
Keyword(s):  
Wafer Bonding ◽  
Room Temperature ◽  
Outer Zone ◽  
Separation Process ◽  
Carrier Wafer ◽  
Higher Temperature ◽  
Three Components

The ZoneBOND™ process has been developed to allow temporary wafer bonding at acceptable temperatures (usually less than 200°C), survival through higher-temperature processes, and then demounting at room temperature. The technology utilizes standard silicon or glass carriers and current thermoplastic adhesives developed by Brewer Science, Inc. The separation process consists of three components: removal of the adhesive in the outer zone, lamination of the device side of the pair, and separation of the carrier wafer from the adhesive. Developments of these key areas are the focus of this paper.

Room-Temperature Wafer Bonded Multi-Junction Solar Cell Grown by Solid State Molecular Beam Epitaxy

MRS Advances ◽  
2016 ◽  
Vol 1 (43) ◽  
pp. 2907-2916 ◽  
Author(s):  
Shulong Lu ◽  
Shiro Uchida
Keyword(s):  
Solar Cell ◽  
Molecular Beam Epitaxy ◽  
Wafer Bonding ◽  
Room Temperature ◽  
Molecular Beam ◽  
Short Circuit ◽  
Short Circuit Current ◽  
Short Circuit Current Density ◽  
Device Structure ◽  
Junction Solar Cell

ABSTRACTWe studied the InGaP/GaAs//InGaAsP/InGaAs four-junction solar cells grown by molecular beam epitaxy (MBE), which were fabricated by the novel wafer bonding. In order to reach a higher conversion efficiency at highly concentrated illumination, heat generation should be minimized. We have improved the device structure to reduce the thermal and electrical resistances. Especially, the bond resistance was reduced to be the lowest value of 2.5 × 10-5 Ohm cm2 ever reported for a GaAs/InP wafer bond, which was obtained by the specific combination of p+-GaAs/n-InP bonding and by using room-temperature wafer bonding. Furthermore, in order to increase the short circuit current density (Jsc) of 4-junction solar cell, we have developed the quality of InGaAsP material by increasing the growth temperature from 490 °C to 510 °C, which leads to a current matching. In a result, an efficiency of 42 % at 230 suns of the four-junction solar cell fabricated by room-temperature wafer bonding was achieved.

The Study of Surface Energy, Electrical Properties and Platelet Adhesion Behavior of a-C/a-CN Films Synthesized by PIII-D

2007 ◽  
Vol 330-332 ◽  
pp. 573-576
Author(s):  
Feng Wen ◽  
Nan Huang ◽  
Hong Sun ◽  
An Sha Zhao ◽  
Jin Wang ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Surface Energy ◽  
Room Temperature ◽  
Platelet Adhesion ◽  
Laser Source ◽  
Adhesion Behavior ◽  
Hall Effects ◽  
Type Semiconductor ◽  
Plasma Immersion Ion Implantation ◽  
Deposited Films

Amorphous carbon (a-C) and carbon nitrogen (a-CN) films were synthesized using plasma immersion ion implantation and deposition (PIII-D) under different N2 flow at room temperature (R.T.). Lifshitz-van der Waals/acid-base approach (LW-AB) was introduced in order to study films’ surface energy deeply. The results showed that the capability of the surface of the film on receive electron changed with N2 flow, which effected platelet adhesion of film strongly. Hall effects tests were employed to characterize the electrical properties of the films. The results showed that the as-deposited films exhibited n-type semiconductor characteristic, and carrier concentration of the films decreased with N2 flow increasing. Raman spectra with 514nm laser-source were employed to analyze the structural of the films.

Technologies for Wafer Level MEMS Capping based on Permanent and Temporary Wafer Bonding

2015 ◽  
Vol 2015 (DPC) ◽  
pp. 000698-000725 ◽  
Author(s):  
Kai Zoschke ◽  
Klaus-Dieter Lang
Keyword(s):  
Wafer Bonding ◽  
Rf Mems ◽  
Electrical Contacts ◽  
Bonding Process ◽  
Frame Structure ◽  
Back Side ◽  
Wafer Level ◽  
Free Standing ◽  
Carrier Wafer ◽  
Base Substrate

Further cost reduction and miniaturization of electronic systems requires new concepts for highly efficient packaging of MEMS components like RF resonators or switches, quartz crystals, bolometers, BAWs etc. This paper describes suitable base technologies for the miniaturized, low-cost wafer level chip-scale packaging of such MEMS. The approaches are based on temporary handling and permanent bonding of cap structures using adhesives or solder onto passive or active silicon wafers which are populated with MEMS components or the MEMS wafer themselves. Firstly, an overview of the possible packaging configurations based on different types of MEMS is discussed where TSV based and non-TSV based packaging solutions are distinguished in general. The cap structure for the TSV based solution can have the same size as the MEMS carrying substrate, since the electrical contacts for the MEMS can be routed either thought the cap or base substrate. Thus, full format cap wafers can be used in a regular wafer to wafer bonding process to create the wafer level cavity packages. However, if no TSVs are present in the cap or base substrate, the cap structure needs to be smaller than the base chip, so that electrical contacts outside the cap area can be accessed after the caps were bonded. Such a wafer level capping with caps smaller than the corresponding base chips can be obtained in two ways. The first approach is based on fabrication and singulation of the caps followed by their temporary face up assembly in the desired pattern on a help wafer. In a subsequent wafer to wafer bonding sequence all caps are transferred onto the base wafer. Finally the help wafer is removed from the back side of the bonded caps. This approach of reconfigured wafer bonding is especially used for uniform cap patterns or, if MEMS have an own bond frame structure. In that case no additional cap is required, since the MEMS can act as their own cap. The second approach is based on cap structure fabrication using a compound wafer stack consisting of two temporary bonded wafers. One wafer acts as carrier wafer whereas the other wafer is processed to form cap structures. Processes like thinning, silicon dry etching, deposition and structuring of polymer or metal bonding frames are performed to generate free-standing and face-up directed cap structures. The so created “cap donor wafer” is used in a wafer to wafer bonding process to bond all caps permanently to the corresponding MEMS base wafer. Finally, the temporary bonded carrier wafer is removed from the backside of the transferred caps. With that approach a fully custom specific and selective wafer level capping is possible featuring irregular cap patterns and locations on the MEMS base wafer. Examples like the selective capping process for RF MEMS switches are presented and discussed in detail. All processes were performed at 200mm wafer level.

High-Temperature Spin-On Adhesives for Temporary Wafer Bonding

2007 ◽  
Vol 4 (3) ◽  
pp. 105-111 ◽  
Author(s):  
S. Pillalamarri ◽  
R. Puligadda ◽  
C. Brubaker ◽  
M. Wimplinger ◽  
S. Pargfrieder
Keyword(s):  
High Temperature ◽  
Wafer Bonding ◽  
Heat Dissipation ◽  
Temperature Stability ◽  
High Temperature Stability ◽  
Performance Requirements ◽  
Wide Range ◽  
Bonding Properties ◽  
Partial List ◽  
Wafer Thinning

Wafer thinning has been effectively used to improve heat dissipation in power devices and to fabricate flexible substrates, small chip packages, and multiple chips in a package. Wafer handling has become an important issue due to the tendency of thinned wafers to warp and fold. Thinned wafers need to be supported during the backgrinding process, lithography, deposition, etc. Temporary wafer bonding using removable adhesives provides a feasible route to wafer thinning. Existing adhesives meet only a partial list of performance requirements. They do not meet the requirements of high-temperature stability combined with ease of removal. This paper reports on the development of a wide range of temporary adhesives to be used in wafer thinning applications that use both novel and conventional bonding and debonding methods. We have developed a series of novel removable high-temperature spin-on adhesives with excellent bonding properties and a wide range of operating temperatures for bonding and/or debonding to achieve a better processing window.

Design optimization and stability enhancement of modified inter-digital capacitive humidity transducer with cobalt ferrite nanoparticles as dielectric

2019 ◽  
Vol 42 (4) ◽  
pp. 917-923
Author(s):  
Jiss Paul ◽  
Jacob Philip
Keyword(s):  
Recovery Time ◽  
Room Temperature ◽  
Cobalt Ferrite ◽  
Dynamic Range ◽  
Ferrite Nanoparticles ◽  
Sensitive Layer ◽  
Humidity Transducer ◽  
The Stability ◽  
Stability Enhancement ◽  
Sensing Characteristics

A modified inter-digital capacitive (IDC) transducer for relative humidity (RH) measurement is fabricated by coating a thick film of polyvinyl alcohol (PVA) on the structure. The effective capacitance of the sensor, measured at 1MHz, increases with RH at room temperature. The RH sensing characteristics of PVA coated IDC transducer are analysed in terms of its sensitivity, dynamic range, frequency response, repeatability and recovery time. It is found that the stability of such a PVA based RH transducer improves remarkably by diffusing nanoparticles of CoFe2O4 in the PVA layer. A standard deviation of ± 0.05 and ± 0.01 for a sensitive layer with pure PVA and PVA-CoFe2O4 combination respectively results in a measurement error of ± 0.005 and ± 0.003.

Room temperature SiC wafer bonding using SAB methods

2019 ◽  
Author(s):  
Fengwen Mu ◽  
Yinghui Wang ◽  
Kenichi Iguchi ◽  
Haruo Nakazawa ◽  
Tadatomo Suga
Keyword(s):  
Wafer Bonding ◽  
Room Temperature ◽  
Sic Wafer
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